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Document this clock in devicetree bindings. Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/pci/qcom,pcie.txt | 1 + 1 file changed, 1 insertion(+) -- 2.29.2 Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt index 3b55310390a0..c87806f76a43 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt @@ -142,6 +142,7 @@ - "bus_slave" Slave AXI clock - "slave_q2a" Slave Q2A clock - "tbu" PCIe TBU clock + - "ddrss_sf_tbu" PCIe SF TBU clock, required on sm8250 - "pipe" PIPE clock - resets: From patchwork Tue Dec 8 00:46:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 339682 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3264581jai; Mon, 7 Dec 2020 16:48:48 -0800 (PST) X-Google-Smtp-Source: ABdhPJyxI4mXyX/6ZDdb4wUK+0SnF9JG+0Lo1p6lDRvgfx9D2Pntjy1nRLqk/kDs/YpCukkDTJPn X-Received: by 2002:a17:906:a0c3:: with SMTP id bh3mr21370933ejb.497.1607388528823; Mon, 07 Dec 2020 16:48:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607388528; cv=none; d=google.com; s=arc-20160816; b=UhdAI4RPcw/Qa0V/U85spfBwhu1yue6QGa5BeGpPV0+FsELPqJquWle9M3+pdGl7lS kSllgQlvkhP9tnQW9NB+yVWCRXLCg43726YnQu6OcwJSqWUl9q2D0milzacnpk+rNeI2 3rqH1+NwgIEqkBDNolYBaEIqAAX/nTFLHSLL3VrbDZClFK4oWQWOXrKL21JtXE97bumW YFjxXnAdUQmQMnjza/NYIRkgy+uq/7YPHTfjs6SMGoQXJndp/H+BZRln9r3CJhFZq4Qw dNoMBirduuEYKbVj5h6aY89JWCnVzlZQjhYagLEYyYuZIAs74ssxWqHM2/RVrkZTQwXa eqZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=E1u2DTU35s5v+QWW65SOSmEBZUXo9vu5arDprO0wJOA=; b=Uu6e0EuEYS2DYVxaEz2LF1PWYkP/3EeZuERKIVkS+3mu3qySllkUVbRoUg1WqAI4dj ded1QktR0dJJ7x/kMypTLNq3nQWlHktktl9bWf2ztHBj6nNnw6OcsLy0vDRSKps4D0g7 4fpWx+l48wKJi0lXsJ9BF2cQQv+/7ELa5jIgrE5c8BsBAwbCHAl9u39k3Bi605/hmdZg J759enuFScevUAKGIGoqaeubslBrGOMPq71VfIv5kbJZWk5uH93enoVTX4LFDXszyb53 ujGCT+djCiSzlu6PIpS9zZoPDqGp+4CDm1VAxVZA2u9P63FiPXoPgPj9wjtRWr8zKXTL nYfw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dcQseYuw; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Add this clock to PCIe devices nodes. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) -- 2.29.2 diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index deed186b1a84..4a6e11e78b35 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1345,14 +1345,16 @@ pcie0: pci@1c00000 { <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, <&gcc GCC_PCIE_0_SLV_AXI_CLK>, <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>, - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, + <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>; clock-names = "pipe", "aux", "cfg", "bus_master", "bus_slave", "slave_q2a", - "tbu"; + "tbu", + "ddrss_sf_tbu"; iommus = <&apps_smmu 0x1c00 0x7f>; iommu-map = <0x0 &apps_smmu 0x1c00 0x1>, @@ -1437,7 +1439,8 @@ pcie1: pci@1c08000 { <&gcc GCC_PCIE_1_SLV_AXI_CLK>, <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>, <&gcc GCC_PCIE_WIGIG_CLKREF_EN>, - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, + <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>; clock-names = "pipe", "aux", "cfg", @@ -1445,7 +1448,8 @@ pcie1: pci@1c08000 { "bus_slave", "slave_q2a", "ref", - "tbu"; + "tbu", + "ddrss_sf_tbu"; assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>; assigned-clock-rates = <19200000>; @@ -1535,7 +1539,8 @@ pcie2: pci@1c10000 { <&gcc GCC_PCIE_2_SLV_AXI_CLK>, <&gcc GCC_PCIE_2_SLV_Q2A_AXI_CLK>, <&gcc GCC_PCIE_MDM_CLKREF_EN>, - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, + <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>; clock-names = "pipe", "aux", "cfg", @@ -1543,7 +1548,8 @@ pcie2: pci@1c10000 { "bus_slave", "slave_q2a", "ref", - "tbu"; + "tbu", + "ddrss_sf_tbu"; assigned-clocks = <&gcc GCC_PCIE_2_AUX_CLK>; assigned-clock-rates = <19200000>;