From patchwork Fri Feb 2 11:41:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 126632 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp559393ljc; Fri, 2 Feb 2018 03:44:26 -0800 (PST) X-Google-Smtp-Source: AH8x2279llzAlDe2jIkYTha2vXpjLx2nn+CbVNHJD2wtHtB3ot8+JOxZIgRwKoc8aiI0zfDpbHDR X-Received: by 10.107.169.94 with SMTP id s91mr10832759ioe.83.1517571866708; Fri, 02 Feb 2018 03:44:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517571866; cv=none; d=google.com; s=arc-20160816; b=nVs1CtneEKWrmxLOkdzTW+XMwNvycCDOGE0AkhbRJd/hQDVefI8vEVjwDuw3PycpSh x+uLZqch0EaT84fleIRJMLG1i0tFjj2oDDe4yCrpogk5Q3fyWv7OaT8YrNTcYPUiSGs+ kQ4wCTsvzcafx6AQW3KaN9tRHXeqA2nsmiwzm6TfzJtmjX8mEjy+6ZhMhU6QHcnGOs8b uF8vuGeevDlDiqJYO8aFfDQ+KepPEvb3BX/s2HgcK0t7PQliAia6TAy0mNLAsFEq0Ex8 zVxpWcgOPL6jxcv6foiCiufzh+I+5oFFj65fA20qzI+y3unlweTHuH8heaIsFakr5aE4 HAjw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:cc:references:in-reply-to:message-id:date:to :from:dkim-signature:arc-authentication-results; bh=XoU3J4iB9rmxT/kYvSBjYr4ZFWfqGPfa06iAINjiBtQ=; b=EOisMtpFFk+L9vzAlDIx6aUp69Wtrad6GPAaN9W44bHvRBZzBsMgP9v1thli5KIExz hXBein3jsjfOratga161SUl/biWByXj2uIY14km2aQDvWdVqwFnO8PUDX1S0MXPp4ka5 fhtO2QxB033CYtPwRQnF1/uK55EUYh705Ittg/tA+EM7RJ2WQTCyvtcQdNmlfbxhDJk9 0k+i45G6vyU0VpFj3g96nxS8eRcE4NKlsd+coWGZoqgA04dwAx9Cwo1GxiZyMbs9qV/X vcObTK91be7itH1a9/6+AZAweHKRdT/xcEXlDywny2Ad6fPhcY27tKJmI81T8mDjjItn 2DqA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=LdjmKZaQ; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id 7si1499491iod.195.2018.02.02.03.44.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 02 Feb 2018 03:44:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=LdjmKZaQ; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ehZjB-0004IZ-9a; Fri, 02 Feb 2018 11:41:57 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ehZjA-0004II-1n for xen-devel@lists.xen.org; Fri, 02 Feb 2018 11:41:56 +0000 X-Inumbo-ID: 06ce7e3b-080e-11e8-ba59-bc764e045a96 Received: from mail-wm0-x242.google.com (unknown [2a00:1450:400c:c09::242]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 06ce7e3b-080e-11e8-ba59-bc764e045a96; Fri, 02 Feb 2018 12:41:37 +0100 (CET) Received: by mail-wm0-x242.google.com with SMTP id v71so11758293wmv.2 for ; Fri, 02 Feb 2018 03:41:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=nr/JDd3Gw3tslzGAE+cPlZH/6ssaNJ4BmhU0mW/oPZ8=; b=LdjmKZaQzn6EfK60Tu5+Z1UJabcImvHVRDtFZVnF3GtYgurEjKdo0f+7hrSQYv1WJJ QUVslLzO+TddvYok7qVLFiV1DpBJEZiQKKDF6yfz/tZO0wUrpxvSEV9Cr6+aca+aXnws ZpjOCJ4G1T10KLuL4tI8y51DWHwOOvSyZHfPI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=nr/JDd3Gw3tslzGAE+cPlZH/6ssaNJ4BmhU0mW/oPZ8=; b=SjHx+k1d0pILkzFRCMcEPuppFvV3eyvwsanC74oGliQ1xWUGqVSOq10RTA1Nz0d+gG M4AuNIs8A/kL/ijBfA9yj3wVixl/fngJayHi9ApnSse01W50gPxZDe21jNcstlsKbylw 0vNZ0LR6Ybjs/WDaMwTrKfW9galyhIQGlCAmRIR5u9LA+xuVGW//SnTUqcPdzUbFoYXG ZRi2I65WmSI8gesBghcoOCkraCjkNCEIX8hZ9WsavCQT7QD9jfkEJAjGan+zjriCpUes DBoyxFgitbea8X3Mvjk8IGBsat3xXGLrOr/xMW5rh8V8UXvn6+fo9BI//hZcrJhzglsY SA9Q== X-Gm-Message-State: AKwxytfUNtZZCZZNcLVqvx3Z/kJlXrupaSaY7WB6uVaPxOwPvK3vHSRe EUwQMKqIcdC5GZNwrKaGqTX3+f83iI8= X-Received: by 10.28.174.210 with SMTP id x201mr26728047wme.105.1517571713438; Fri, 02 Feb 2018 03:41:53 -0800 (PST) Received: from e108454-lin.cambridge.arm.com ([2001:41d0:1:6c23::1]) by smtp.gmail.com with ESMTPSA id f13sm764900wre.84.2018.02.02.03.41.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 02 Feb 2018 03:41:52 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Fri, 2 Feb 2018 11:41:48 +0000 Message-Id: <20180202114150.23817-2-julien.grall@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180202114150.23817-1-julien.grall@linaro.org> References: <20180202114150.23817-1-julien.grall@linaro.org> Cc: sstabellini@kernel.org, volodymyr_babchuk@epam.com, andre.przywara@linaro.org, Julien Grall Subject: [Xen-devel] [PATCH v2 1/3] xen/arm: vpsci: Removing dummy MIGRATE and MIGRATE_INFO_UP_CPU X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The PSCI call MIGRATE and MIGRATE_INFO_UP_CPU are optional and implemented as just returning PSCI_NOT_SUPPORTED (aka UNKNOWN_FUNCTION for SMCCC). The new SMCCC framework is able to deal with unimplemented function and return the proper error code. So remove the implementations for both function. Signed-off-by: Julien Grall --- Changes in v2: - Remove define in psci.h - Update SSSC_SMCCC_FUNCTION_COUNT --- xen/arch/arm/vpsci.c | 10 ---------- xen/arch/arm/vsmc.c | 16 +--------------- xen/include/asm-arm/perfc_defn.h | 2 -- xen/include/asm-arm/psci.h | 4 ---- 4 files changed, 1 insertion(+), 31 deletions(-) diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c index cd724904ef..979d32ed6d 100644 --- a/xen/arch/arm/vpsci.c +++ b/xen/arch/arm/vpsci.c @@ -172,21 +172,11 @@ int32_t do_psci_0_2_affinity_info(register_t target_affinity, return PSCI_0_2_AFFINITY_LEVEL_OFF; } -int32_t do_psci_0_2_migrate(uint32_t target_cpu) -{ - return PSCI_NOT_SUPPORTED; -} - uint32_t do_psci_0_2_migrate_info_type(void) { return PSCI_0_2_TOS_MP_OR_NOT_PRESENT; } -register_t do_psci_0_2_migrate_info_up_cpu(void) -{ - return PSCI_NOT_SUPPORTED; -} - void do_psci_0_2_system_off( void ) { struct domain *d = current->domain; diff --git a/xen/arch/arm/vsmc.c b/xen/arch/arm/vsmc.c index c9064de37a..997f2e0ebc 100644 --- a/xen/arch/arm/vsmc.c +++ b/xen/arch/arm/vsmc.c @@ -28,7 +28,7 @@ #define XEN_SMCCC_FUNCTION_COUNT 3 /* Number of functions currently supported by Standard Service Service Calls. */ -#define SSSC_SMCCC_FUNCTION_COUNT 13 +#define SSSC_SMCCC_FUNCTION_COUNT 11 static bool fill_uid(struct cpu_user_regs *regs, xen_uuid_t uuid) { @@ -157,11 +157,6 @@ static bool handle_sssc(struct cpu_user_regs *regs) PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_type()); return true; - case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU: - perfc_incr(vpsci_migrate_info_up_cpu); - PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_up_cpu()); - return true; - case PSCI_0_2_FN_SYSTEM_OFF: perfc_incr(vpsci_system_off); do_psci_0_2_system_off(); @@ -206,15 +201,6 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case PSCI_0_2_FN_MIGRATE: - { - uint32_t tcpu = PSCI_ARG32(regs, 1); - - perfc_incr(vpsci_cpu_migrate); - PSCI_SET_RESULT(regs, do_psci_0_2_migrate(tcpu)); - return true; - } - case ARM_SMCCC_FUNC_CALL_COUNT: return fill_function_call_count(regs, SSSC_SMCCC_FUNCTION_COUNT); diff --git a/xen/include/asm-arm/perfc_defn.h b/xen/include/asm-arm/perfc_defn.h index 5f957ee6ec..a7acb7d21c 100644 --- a/xen/include/asm-arm/perfc_defn.h +++ b/xen/include/asm-arm/perfc_defn.h @@ -27,12 +27,10 @@ PERFCOUNTER(vpsci_cpu_on, "vpsci: cpu_on") PERFCOUNTER(vpsci_cpu_off, "vpsci: cpu_off") PERFCOUNTER(vpsci_version, "vpsci: version") PERFCOUNTER(vpsci_migrate_info_type, "vpsci: migrate_info_type") -PERFCOUNTER(vpsci_migrate_info_up_cpu, "vpsci: migrate_info_up_cpu") PERFCOUNTER(vpsci_system_off, "vpsci: system_off") PERFCOUNTER(vpsci_system_reset, "vpsci: system_reset") PERFCOUNTER(vpsci_cpu_suspend, "vpsci: cpu_suspend") PERFCOUNTER(vpsci_cpu_affinity_info, "vpsci: cpu_affinity_info") -PERFCOUNTER(vpsci_cpu_migrate, "vpsci: cpu_migrate") PERFCOUNTER(vgicd_reads, "vgicd: read") PERFCOUNTER(vgicd_writes, "vgicd: write") diff --git a/xen/include/asm-arm/psci.h b/xen/include/asm-arm/psci.h index 635ea5dae4..32c1f81f21 100644 --- a/xen/include/asm-arm/psci.h +++ b/xen/include/asm-arm/psci.h @@ -37,9 +37,7 @@ int32_t do_psci_0_2_cpu_on(register_t target_cpu, register_t entry_point, register_t context_id); int32_t do_psci_0_2_affinity_info(register_t target_affinity, uint32_t lowest_affinity_level); -int32_t do_psci_0_2_migrate(uint32_t target_cpu); uint32_t do_psci_0_2_migrate_info_type(void); -register_t do_psci_0_2_migrate_info_up_cpu(void); void do_psci_0_2_system_off(void); void do_psci_0_2_system_reset(void); @@ -57,9 +55,7 @@ void do_psci_0_2_system_reset(void); #define PSCI_0_2_FN_CPU_OFF 2 #define PSCI_0_2_FN_CPU_ON 3 #define PSCI_0_2_FN_AFFINITY_INFO 4 -#define PSCI_0_2_FN_MIGRATE 5 #define PSCI_0_2_FN_MIGRATE_INFO_TYPE 6 -#define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU 7 #define PSCI_0_2_FN_SYSTEM_OFF 8 #define PSCI_0_2_FN_SYSTEM_RESET 9 From patchwork Fri Feb 2 11:41:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 126631 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp559385ljc; Fri, 2 Feb 2018 03:44:25 -0800 (PST) X-Google-Smtp-Source: AH8x225akN0Z2B7+bcxubn+ajj8GkAZwm6OTOPOCT5xdhrCwIZR34tGNzU/eYY0GDpN2vE8fgoLg X-Received: by 10.36.179.7 with SMTP id e7mr15544761itf.67.1517571865656; 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[192.237.175.120]) by mx.google.com with ESMTPS id l63si1616959ioe.279.2018.02.02.03.44.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 02 Feb 2018 03:44:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Kf+aNBCA; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ehZjD-0004J1-Gc; Fri, 02 Feb 2018 11:41:59 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ehZjC-0004Ik-8t for xen-devel@lists.xen.org; Fri, 02 Feb 2018 11:41:58 +0000 X-Inumbo-ID: 07dc480f-080e-11e8-ba59-bc764e045a96 Received: from mail-wm0-x241.google.com (unknown [2a00:1450:400c:c09::241]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 07dc480f-080e-11e8-ba59-bc764e045a96; Fri, 02 Feb 2018 12:41:39 +0100 (CET) Received: by mail-wm0-x241.google.com with SMTP id 143so11909044wma.5 for ; Fri, 02 Feb 2018 03:41:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uIwcP9qs2melcxO4Nlep8XAeT1xjPM2fuE5GQtxW3Dw=; b=Kf+aNBCA2eBW4VeAfsmaYXeCjb5rVrougUxDHXu58tFRdqyqR1AIp6v+ErwJjvkyu6 zs/wNJpKV2VSilLatraumND3ntfD5jkHD1FfqDNpR97azCzqKmZSyECOgNPfu55XBpPZ lHSJ9NEPeJ5sgXbtubPTW13+tuyKaFUo0Uqj0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=uIwcP9qs2melcxO4Nlep8XAeT1xjPM2fuE5GQtxW3Dw=; b=X9nKkCr2gt8vI9xxrGPa6R0nzvqro27r2n/v/OT7njVKs+sUpjIMOnArqh7bknkECX 2V2GhcmRCuh6nQ2CClryEWo45oG7+e24fl0ueppNLAnfez2ejAXbyYBWXxS3Zgm01n2Z oYWd8+f2MSAf0rtaGSdC2b6JXuKz8Z4jTMGgtUcNfh70sQijR3enCgPk8mazezcL1MRl pAmkhOjzARYwKaq8Q+J0hmJjGWm+bSXZjJKhozKqA02gj0rQl+QHs3dR+wZP6TFFPdWm 5ANQSBt48FfrPIA9hYB7q1ODfKwSAr/L6if+SR57sfgVIt7R9cbyglgLsh3qK1dago2N /F9w== X-Gm-Message-State: AKwxytdUoP/LWwD7e42IKkWyrBl3q46KrTDl6SrHSkhj0nKqcPu2XbWm PXcDc2aIHX2RQXCHP4g4+B5FPmPwEnw= X-Received: by 10.28.209.137 with SMTP id i131mr8478760wmg.1.1517571715338; Fri, 02 Feb 2018 03:41:55 -0800 (PST) Received: from e108454-lin.cambridge.arm.com ([2001:41d0:1:6c23::1]) by smtp.gmail.com with ESMTPSA id f13sm764900wre.84.2018.02.02.03.41.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 02 Feb 2018 03:41:54 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Fri, 2 Feb 2018 11:41:49 +0000 Message-Id: <20180202114150.23817-3-julien.grall@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180202114150.23817-1-julien.grall@linaro.org> References: <20180202114150.23817-1-julien.grall@linaro.org> Cc: sstabellini@kernel.org, volodymyr_babchuk@epam.com, andre.przywara@linaro.org, Julien Grall Subject: [Xen-devel] [PATCH v2 2/3] xen/arm: vsmc: Don't implement function ID that doesn't exist X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The current implementation of SMCCC relies on the fact only function number (bits [15:0]) is enough to identify what to implement. However, PSCI call are only available in the range 0x84000000-0x8400001F and 0xC4000000-0xC400001F. Furthermore, not all SMC32 functions have equivalent in the SMC64. This is the case of: * PSCI_VERSION * CPU_OFF * MIGRATE_INFO_TYPE * SYSTEM_OFF * SYSTEM_RESET Similarly call count, call uid, revision can only be query using smc32/hvc32 fast calls (See 6.2 in ARM DEN 0028B). Xen should only implement identifier existing in the specification in order to avoid potential clash with later revision. Therefore rework the vsmc code to use the whole function identifier rather than only the function number. At the same time, the new macros for call count, call uid, revision are renamed to better suit the spec. Lastly, update SSSC_SMCCC_FUNCTION_COUNT to match the correct number of funtions. Note that version is not updated because the number has always been wrong, and nobody could properly use it. Signed-off-by: Julien Grall --- This should be backported to Xen 4.10 as we should not implement functions identifier that does not exist toprevent clash with a later revision. Changes in v2: - Rename the call count, call uid, revision macros - Update SSSC_SMCCC_FUNCTION_COUNT --- xen/arch/arm/vsmc.c | 39 ++++++++++++++++++++++----------------- xen/include/asm-arm/smccc.h | 20 +++++++++++++++++--- 2 files changed, 39 insertions(+), 20 deletions(-) diff --git a/xen/arch/arm/vsmc.c b/xen/arch/arm/vsmc.c index 997f2e0ebc..3d8cbcc808 100644 --- a/xen/arch/arm/vsmc.c +++ b/xen/arch/arm/vsmc.c @@ -28,7 +28,7 @@ #define XEN_SMCCC_FUNCTION_COUNT 3 /* Number of functions currently supported by Standard Service Service Calls. */ -#define SSSC_SMCCC_FUNCTION_COUNT 11 +#define SSSC_SMCCC_FUNCTION_COUNT 14 static bool fill_uid(struct cpu_user_regs *regs, xen_uuid_t uuid) { @@ -84,13 +84,15 @@ static bool fill_function_call_count(struct cpu_user_regs *regs, uint32_t cnt) /* SMCCC interface for hypervisor. Tell about itself. */ static bool handle_hypervisor(struct cpu_user_regs *regs) { - switch ( smccc_get_fn(get_user_reg(regs, 0)) ) + uint32_t fid = (uint32_t)get_user_reg(regs, 0); + + switch ( fid ) { - case ARM_SMCCC_FUNC_CALL_COUNT: + case ARM_SMCCC_CALL_COUNT_FID(HYPERVISOR): return fill_function_call_count(regs, XEN_SMCCC_FUNCTION_COUNT); - case ARM_SMCCC_FUNC_CALL_UID: + case ARM_SMCCC_CALL_UID_FID(HYPERVISOR): return fill_uid(regs, XEN_SMCCC_UID); - case ARM_SMCCC_FUNC_CALL_REVISION: + case ARM_SMCCC_REVISION_FID(HYPERVISOR): return fill_revision(regs, XEN_SMCCC_MAJOR_REVISION, XEN_SMCCC_MINOR_REVISION); default: @@ -140,36 +142,37 @@ static bool handle_sssc(struct cpu_user_regs *regs) { uint32_t fid = (uint32_t)get_user_reg(regs, 0); - switch ( smccc_get_fn(fid) ) + switch ( fid ) { - case PSCI_0_2_FN_PSCI_VERSION: + case PSCI_0_2_FN32(PSCI_VERSION): perfc_incr(vpsci_version); PSCI_SET_RESULT(regs, do_psci_0_2_version()); return true; - case PSCI_0_2_FN_CPU_OFF: + case PSCI_0_2_FN32(CPU_OFF): perfc_incr(vpsci_cpu_off); PSCI_SET_RESULT(regs, do_psci_0_2_cpu_off()); return true; - case PSCI_0_2_FN_MIGRATE_INFO_TYPE: + case PSCI_0_2_FN32(MIGRATE_INFO_TYPE): perfc_incr(vpsci_migrate_info_type); PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_type()); return true; - case PSCI_0_2_FN_SYSTEM_OFF: + case PSCI_0_2_FN32(SYSTEM_OFF): perfc_incr(vpsci_system_off); do_psci_0_2_system_off(); PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); return true; - case PSCI_0_2_FN_SYSTEM_RESET: + case PSCI_0_2_FN32(SYSTEM_RESET): perfc_incr(vpsci_system_reset); do_psci_0_2_system_reset(); PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); return true; - case PSCI_0_2_FN_CPU_ON: + case PSCI_0_2_FN32(CPU_ON): + case PSCI_0_2_FN64(CPU_ON): { register_t vcpuid = PSCI_ARG(regs, 1); register_t epoint = PSCI_ARG(regs, 2); @@ -180,7 +183,8 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case PSCI_0_2_FN_CPU_SUSPEND: + case PSCI_0_2_FN32(CPU_SUSPEND): + case PSCI_0_2_FN64(CPU_SUSPEND): { uint32_t pstate = PSCI_ARG32(regs, 1); register_t epoint = PSCI_ARG(regs, 2); @@ -191,7 +195,8 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case PSCI_0_2_FN_AFFINITY_INFO: + case PSCI_0_2_FN32(AFFINITY_INFO): + case PSCI_0_2_FN64(AFFINITY_INFO): { register_t taff = PSCI_ARG(regs, 1); uint32_t laff = PSCI_ARG32(regs, 2); @@ -201,13 +206,13 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case ARM_SMCCC_FUNC_CALL_COUNT: + case ARM_SMCCC_CALL_COUNT_FID(STANDARD): return fill_function_call_count(regs, SSSC_SMCCC_FUNCTION_COUNT); - case ARM_SMCCC_FUNC_CALL_UID: + case ARM_SMCCC_CALL_UID_FID(STANDARD): return fill_uid(regs, SSSC_SMCCC_UID); - case ARM_SMCCC_FUNC_CALL_REVISION: + case ARM_SMCCC_REVISION_FID(STANDARD): return fill_revision(regs, SSSC_SMCCC_MAJOR_REVISION, SSSC_SMCCC_MINOR_REVISION); diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h index f543dea0bb..62b3a8cdf5 100644 --- a/xen/include/asm-arm/smccc.h +++ b/xen/include/asm-arm/smccc.h @@ -82,9 +82,23 @@ static inline uint32_t smccc_get_owner(register_t funcid) #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 /* List of generic function numbers */ -#define ARM_SMCCC_FUNC_CALL_COUNT 0xFF00 -#define ARM_SMCCC_FUNC_CALL_UID 0xFF01 -#define ARM_SMCCC_FUNC_CALL_REVISION 0xFF03 +#define ARM_SMCCC_CALL_COUNT_FID(owner) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_CONV_32, \ + ARM_SMCCC_OWNER_##owner, \ + 0xFF00) + +#define ARM_SMCCC_CALL_UID_FID(owner) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_CONV_32, \ + ARM_SMCCC_OWNER_##owner, \ + 0xFF01) + +#define ARM_SMCCC_REVISION_FID(owner) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_CONV_32, \ + ARM_SMCCC_OWNER_##owner, \ + 0xFF03) /* Only one error code defined in SMCCC */ #define ARM_SMCCC_ERR_UNKNOWN_FUNCTION (-1) From patchwork Fri Feb 2 11:41:50 2018 Content-Type: text/plain; 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[192.237.175.120]) by mx.google.com with ESMTPS id n198si1504400ith.27.2018.02.02.03.44.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 02 Feb 2018 03:44:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=CG6mm+lu; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ehZjE-0004Ja-Ne; Fri, 02 Feb 2018 11:42:00 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ehZjD-0004Iz-H0 for xen-devel@lists.xen.org; Fri, 02 Feb 2018 11:41:59 +0000 X-Inumbo-ID: 08981c27-080e-11e8-ba59-bc764e045a96 Received: from mail-wm0-x241.google.com (unknown [2a00:1450:400c:c09::241]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 08981c27-080e-11e8-ba59-bc764e045a96; Fri, 02 Feb 2018 12:41:40 +0100 (CET) Received: by mail-wm0-x241.google.com with SMTP id v123so11729074wmd.5 for ; Fri, 02 Feb 2018 03:41:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jRZFQPWeMXE7xm57YKfWPo/NFtsycegWpCijDTmUUCs=; b=CG6mm+luW0OtwUGMo8lWAeFQz9ktWgaYip9JQXZtEDXjHaNvuyKwmwNPg0a1LoA1SG 5ILxm6F3k24SMxKeXOYtCqW3wSi2IFYG3YMA2D8e9O0q52I13ATo45//yeAHFKT5e5H0 W9IrZW5NtyLqprak3S9dWKDL6pBqdn9CTNhw8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jRZFQPWeMXE7xm57YKfWPo/NFtsycegWpCijDTmUUCs=; b=CfxwqwuZz87gguz2x02mhpVQATE1rqV61UO9YH+3QGeHcbBWbl0EB062OxSwnfbBUE rTKu2UFlAz6YM2AAuUzlGawdQQAMqKPU/YW9xQUUBUe2rRJWQoSy/546s3nPRwAZ+4GJ /CX7iJ6BoACPy3IszJa6bXBZH6ite7G0PyHhaxPLycE32ryedkdp4y/LzrD52BAWD1bw eXKyR6Mz/FX3y/g/LseT10NkpuhegQeJDLtWuHrQzFftdxCZ/lL7A3A3pfms/xjmlGsD 4gtNdw3HEZQ0j/BpnqGzLWMboJoHss9DbMewKHYHgMorjJy+NH4N5pZoUo293PRMR3nd N90Q== X-Gm-Message-State: AKwxytfTZ4utmZZUe9frjigzjU6NtyXeizE23663msiGyeds8dH+0njF CTDSpLEjcCZQ+JK/JLrr7M/6vLWQUaw= X-Received: by 10.28.154.141 with SMTP id c135mr32456294wme.82.1517571716500; Fri, 02 Feb 2018 03:41:56 -0800 (PST) Received: from e108454-lin.cambridge.arm.com ([2001:41d0:1:6c23::1]) by smtp.gmail.com with ESMTPSA id f13sm764900wre.84.2018.02.02.03.41.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 02 Feb 2018 03:41:55 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Fri, 2 Feb 2018 11:41:50 +0000 Message-Id: <20180202114150.23817-4-julien.grall@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180202114150.23817-1-julien.grall@linaro.org> References: <20180202114150.23817-1-julien.grall@linaro.org> Cc: sstabellini@kernel.org, volodymyr_babchuk@epam.com, andre.przywara@linaro.org, Julien Grall Subject: [Xen-devel] [PATCH v2 3/3] xen/arm: vpsci: Move PSCI function dispatching from vsmc.c to vpsci.c X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" At the moment PSCI function dispatching is done in vsmc.c and the function implementation in vpsci.c. Some bits of the implementation is even done in vsmc.c (see PSCI_SYSTEM_RESET). This means that it is difficult to follow the implementation and also requires to export functions for each PSCI functions. Therefore move PSCI dispatching in two new functions do_vpsci_0_1_call and do_vpsci_0_2_call. The former will handle PSCI 0.1 call while the latter 0.2 or later call. At the same time, a new header vpsci.h was created to contain all definitions for virtual PSCI and avoid confusion with the host PSCI. Signed-off-by: Julien Grall --- Changes in v2: - Add a 'v' in the function names to help distinguish virtual vs physical PSCI - Introduce vpsci.h and VSCPI_NR_FUNCS --- xen/arch/arm/vpsci.c | 147 +++++++++++++++++++++++++++++++++++++++----- xen/arch/arm/vsmc.c | 99 ++--------------------------- xen/include/asm-arm/psci.h | 19 ------ xen/include/asm-arm/vpsci.h | 13 ++++ 4 files changed, 152 insertions(+), 126 deletions(-) create mode 100644 xen/include/asm-arm/vpsci.h diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c index 979d32ed6d..884f0fa710 100644 --- a/xen/arch/arm/vpsci.c +++ b/xen/arch/arm/vpsci.c @@ -16,7 +16,7 @@ #include #include -#include +#include #include #include @@ -91,12 +91,12 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point, return PSCI_SUCCESS; } -int32_t do_psci_cpu_on(uint32_t vcpuid, register_t entry_point) +static int32_t do_psci_cpu_on(uint32_t vcpuid, register_t entry_point) { return do_common_cpu_on(vcpuid, entry_point, 0 , PSCI_VERSION(0, 1)); } -int32_t do_psci_cpu_off(uint32_t power_state) +static int32_t do_psci_cpu_off(uint32_t power_state) { struct vcpu *v = current; if ( !test_and_set_bit(_VPF_down, &v->pause_flags) ) @@ -104,13 +104,14 @@ int32_t do_psci_cpu_off(uint32_t power_state) return PSCI_SUCCESS; } -uint32_t do_psci_0_2_version(void) +static uint32_t do_psci_0_2_version(void) { return PSCI_VERSION(0, 2); } -register_t do_psci_0_2_cpu_suspend(uint32_t power_state, register_t entry_point, - register_t context_id) +static register_t do_psci_0_2_cpu_suspend(uint32_t power_state, + register_t entry_point, + register_t context_id) { struct vcpu *v = current; @@ -123,13 +124,14 @@ register_t do_psci_0_2_cpu_suspend(uint32_t power_state, register_t entry_point, return PSCI_SUCCESS; } -int32_t do_psci_0_2_cpu_off(void) +static int32_t do_psci_0_2_cpu_off(void) { return do_psci_cpu_off(0); } -int32_t do_psci_0_2_cpu_on(register_t target_cpu, register_t entry_point, - register_t context_id) +static int32_t do_psci_0_2_cpu_on(register_t target_cpu, + register_t entry_point, + register_t context_id) { return do_common_cpu_on(target_cpu, entry_point, context_id, PSCI_VERSION(0, 2)); @@ -144,8 +146,8 @@ static const unsigned long target_affinity_mask[] = { #endif }; -int32_t do_psci_0_2_affinity_info(register_t target_affinity, - uint32_t lowest_affinity_level) +static int32_t do_psci_0_2_affinity_info(register_t target_affinity, + uint32_t lowest_affinity_level) { struct domain *d = current->domain; struct vcpu *v; @@ -172,23 +174,140 @@ int32_t do_psci_0_2_affinity_info(register_t target_affinity, return PSCI_0_2_AFFINITY_LEVEL_OFF; } -uint32_t do_psci_0_2_migrate_info_type(void) +static uint32_t do_psci_0_2_migrate_info_type(void) { return PSCI_0_2_TOS_MP_OR_NOT_PRESENT; } -void do_psci_0_2_system_off( void ) +static void do_psci_0_2_system_off( void ) { struct domain *d = current->domain; domain_shutdown(d,SHUTDOWN_poweroff); } -void do_psci_0_2_system_reset(void) +static void do_psci_0_2_system_reset(void) { struct domain *d = current->domain; domain_shutdown(d,SHUTDOWN_reboot); } +#define PSCI_SET_RESULT(reg, val) set_user_reg(reg, 0, val) +#define PSCI_ARG(reg, n) get_user_reg(reg, n) + +#ifdef CONFIG_ARM_64 +#define PSCI_ARG32(reg, n) (uint32_t)(get_user_reg(reg, n)) +#else +#define PSCI_ARG32(reg, n) PSCI_ARG(reg, n) +#endif + +/* + * PSCI 0.1 calls. It will return false if the function ID is not + * handled. + */ +bool do_vpsci_0_1_call(struct cpu_user_regs *regs, uint32_t fid) +{ + switch ( (uint32_t)get_user_reg(regs, 0) ) + { + case PSCI_cpu_off: + { + uint32_t pstate = PSCI_ARG32(regs, 1); + + perfc_incr(vpsci_cpu_off); + PSCI_SET_RESULT(regs, do_psci_cpu_off(pstate)); + return true; + } + case PSCI_cpu_on: + { + uint32_t vcpuid = PSCI_ARG32(regs, 1); + register_t epoint = PSCI_ARG(regs, 2); + + perfc_incr(vpsci_cpu_on); + PSCI_SET_RESULT(regs, do_psci_cpu_on(vcpuid, epoint)); + return true; + } + default: + return false; + } +} + +/* + * PSCI 0.2 or later calls. It will return false if the function ID is + * not handled. + */ +bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid) +{ + /* + * /!\ VPSCI_NR_FUNCS (in asm-arm/vpsci.h) should be updated when + * adding/removing a function + */ + switch ( fid ) + { + case PSCI_0_2_FN32(PSCI_VERSION): + perfc_incr(vpsci_version); + PSCI_SET_RESULT(regs, do_psci_0_2_version()); + return true; + + case PSCI_0_2_FN32(CPU_OFF): + perfc_incr(vpsci_cpu_off); + PSCI_SET_RESULT(regs, do_psci_0_2_cpu_off()); + return true; + + case PSCI_0_2_FN32(MIGRATE_INFO_TYPE): + perfc_incr(vpsci_migrate_info_type); + PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_type()); + return true; + + case PSCI_0_2_FN32(SYSTEM_OFF): + perfc_incr(vpsci_system_off); + do_psci_0_2_system_off(); + PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); + return true; + + case PSCI_0_2_FN32(SYSTEM_RESET): + perfc_incr(vpsci_system_reset); + do_psci_0_2_system_reset(); + PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); + return true; + + case PSCI_0_2_FN32(CPU_ON): + case PSCI_0_2_FN64(CPU_ON): + { + register_t vcpuid = PSCI_ARG(regs, 1); + register_t epoint = PSCI_ARG(regs, 2); + register_t cid = PSCI_ARG(regs, 3); + + perfc_incr(vpsci_cpu_on); + PSCI_SET_RESULT(regs, do_psci_0_2_cpu_on(vcpuid, epoint, cid)); + return true; + } + + case PSCI_0_2_FN32(CPU_SUSPEND): + case PSCI_0_2_FN64(CPU_SUSPEND): + { + uint32_t pstate = PSCI_ARG32(regs, 1); + register_t epoint = PSCI_ARG(regs, 2); + register_t cid = PSCI_ARG(regs, 3); + + perfc_incr(vpsci_cpu_suspend); + PSCI_SET_RESULT(regs, do_psci_0_2_cpu_suspend(pstate, epoint, cid)); + return true; + } + + case PSCI_0_2_FN32(AFFINITY_INFO): + case PSCI_0_2_FN64(AFFINITY_INFO): + { + register_t taff = PSCI_ARG(regs, 1); + uint32_t laff = PSCI_ARG32(regs, 2); + + perfc_incr(vpsci_cpu_affinity_info); + PSCI_SET_RESULT(regs, do_psci_0_2_affinity_info(taff, laff)); + return true; + } + default: + return false; + } +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/vsmc.c b/xen/arch/arm/vsmc.c index 3d8cbcc808..3d3bd95fee 100644 --- a/xen/arch/arm/vsmc.c +++ b/xen/arch/arm/vsmc.c @@ -19,16 +19,16 @@ #include #include #include -#include #include #include #include +#include /* Number of functions currently supported by Hypervisor Service. */ #define XEN_SMCCC_FUNCTION_COUNT 3 /* Number of functions currently supported by Standard Service Service Calls. */ -#define SSSC_SMCCC_FUNCTION_COUNT 14 +#define SSSC_SMCCC_FUNCTION_COUNT (3 + VPSCI_NR_FUNCS) static bool fill_uid(struct cpu_user_regs *regs, xen_uuid_t uuid) { @@ -100,41 +100,13 @@ static bool handle_hypervisor(struct cpu_user_regs *regs) } } -#define PSCI_SET_RESULT(reg, val) set_user_reg(reg, 0, val) -#define PSCI_ARG(reg, n) get_user_reg(reg, n) - -#ifdef CONFIG_ARM_64 -#define PSCI_ARG32(reg, n) (uint32_t)(get_user_reg(reg, n)) -#else -#define PSCI_ARG32(reg, n) PSCI_ARG(reg, n) -#endif - /* Existing (pre SMCCC) APIs. This includes PSCI 0.1 interface */ static bool handle_existing_apis(struct cpu_user_regs *regs) { /* Only least 32 bits are significant (ARM DEN 0028B, page 12) */ - switch ( (uint32_t)get_user_reg(regs, 0) ) - { - case PSCI_cpu_off: - { - uint32_t pstate = PSCI_ARG32(regs, 1); - - perfc_incr(vpsci_cpu_off); - PSCI_SET_RESULT(regs, do_psci_cpu_off(pstate)); - return true; - } - case PSCI_cpu_on: - { - uint32_t vcpuid = PSCI_ARG32(regs, 1); - register_t epoint = PSCI_ARG(regs, 2); + uint32_t fid = (uint32_t)get_user_reg(regs, 0); - perfc_incr(vpsci_cpu_on); - PSCI_SET_RESULT(regs, do_psci_cpu_on(vcpuid, epoint)); - return true; - } - default: - return false; - } + return do_vpsci_0_1_call(regs, fid); } /* PSCI 0.2 interface and other Standard Secure Calls */ @@ -142,70 +114,11 @@ static bool handle_sssc(struct cpu_user_regs *regs) { uint32_t fid = (uint32_t)get_user_reg(regs, 0); - switch ( fid ) - { - case PSCI_0_2_FN32(PSCI_VERSION): - perfc_incr(vpsci_version); - PSCI_SET_RESULT(regs, do_psci_0_2_version()); + if ( do_vpsci_0_2_call(regs, fid) ) return true; - case PSCI_0_2_FN32(CPU_OFF): - perfc_incr(vpsci_cpu_off); - PSCI_SET_RESULT(regs, do_psci_0_2_cpu_off()); - return true; - - case PSCI_0_2_FN32(MIGRATE_INFO_TYPE): - perfc_incr(vpsci_migrate_info_type); - PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_type()); - return true; - - case PSCI_0_2_FN32(SYSTEM_OFF): - perfc_incr(vpsci_system_off); - do_psci_0_2_system_off(); - PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); - return true; - - case PSCI_0_2_FN32(SYSTEM_RESET): - perfc_incr(vpsci_system_reset); - do_psci_0_2_system_reset(); - PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); - return true; - - case PSCI_0_2_FN32(CPU_ON): - case PSCI_0_2_FN64(CPU_ON): - { - register_t vcpuid = PSCI_ARG(regs, 1); - register_t epoint = PSCI_ARG(regs, 2); - register_t cid = PSCI_ARG(regs, 3); - - perfc_incr(vpsci_cpu_on); - PSCI_SET_RESULT(regs, do_psci_0_2_cpu_on(vcpuid, epoint, cid)); - return true; - } - - case PSCI_0_2_FN32(CPU_SUSPEND): - case PSCI_0_2_FN64(CPU_SUSPEND): - { - uint32_t pstate = PSCI_ARG32(regs, 1); - register_t epoint = PSCI_ARG(regs, 2); - register_t cid = PSCI_ARG(regs, 3); - - perfc_incr(vpsci_cpu_suspend); - PSCI_SET_RESULT(regs, do_psci_0_2_cpu_suspend(pstate, epoint, cid)); - return true; - } - - case PSCI_0_2_FN32(AFFINITY_INFO): - case PSCI_0_2_FN64(AFFINITY_INFO): + switch ( fid ) { - register_t taff = PSCI_ARG(regs, 1); - uint32_t laff = PSCI_ARG32(regs, 2); - - perfc_incr(vpsci_cpu_affinity_info); - PSCI_SET_RESULT(regs, do_psci_0_2_affinity_info(taff, laff)); - return true; - } - case ARM_SMCCC_CALL_COUNT_FID(STANDARD): return fill_function_call_count(regs, SSSC_SMCCC_FUNCTION_COUNT); diff --git a/xen/include/asm-arm/psci.h b/xen/include/asm-arm/psci.h index 32c1f81f21..3c44468e72 100644 --- a/xen/include/asm-arm/psci.h +++ b/xen/include/asm-arm/psci.h @@ -22,25 +22,6 @@ int call_psci_cpu_on(int cpu); void call_psci_system_off(void); void call_psci_system_reset(void); -/* functions to handle guest PSCI requests */ -int32_t do_psci_cpu_on(uint32_t vcpuid, register_t entry_point); -int32_t do_psci_cpu_off(uint32_t power_state); -int32_t do_psci_cpu_suspend(uint32_t power_state, register_t entry_point); -int32_t do_psci_migrate(uint32_t vcpuid); - -/* PSCI 0.2 functions to handle guest PSCI requests */ -uint32_t do_psci_0_2_version(void); -register_t do_psci_0_2_cpu_suspend(uint32_t power_state, register_t entry_point, - register_t context_id); -int32_t do_psci_0_2_cpu_off(void); -int32_t do_psci_0_2_cpu_on(register_t target_cpu, register_t entry_point, - register_t context_id); -int32_t do_psci_0_2_affinity_info(register_t target_affinity, - uint32_t lowest_affinity_level); -uint32_t do_psci_0_2_migrate_info_type(void); -void do_psci_0_2_system_off(void); -void do_psci_0_2_system_reset(void); - /* PSCI v0.2 interface */ #define PSCI_0_2_FN32(name) ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ ARM_SMCCC_CONV_32, \ diff --git a/xen/include/asm-arm/vpsci.h b/xen/include/asm-arm/vpsci.h new file mode 100644 index 0000000000..d6a890f6a2 --- /dev/null +++ b/xen/include/asm-arm/vpsci.h @@ -0,0 +1,13 @@ +#ifndef __ASM_VPSCI_H__ +#define __ASM_VPSCI_H__ + +#include + +/* Number of function implemented by virtual PSCI (only 0.2 or later) */ +#define VPSCI_NR_FUNCS 11 + +/* Functions handle PSCI calls from the guests */ +bool do_vpsci_0_1_call(struct cpu_user_regs *regs, uint32_t fid); +bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid); + +#endif /* __ASM_VPSCI_H__ */