From patchwork Fri Dec 11 17:12:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Douglas Anderson X-Patchwork-Id: 343120 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7DCA2C4361B for ; Fri, 11 Dec 2020 19:02:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 45F4C23E1B for ; Fri, 11 Dec 2020 19:02:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391373AbgLKRPx (ORCPT ); Fri, 11 Dec 2020 12:15:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42004 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2393817AbgLKRPS (ORCPT ); Fri, 11 Dec 2020 12:15:18 -0500 Received: from mail-pj1-x1041.google.com (mail-pj1-x1041.google.com [IPv6:2607:f8b0:4864:20::1041]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D4B4C0613D6 for ; Fri, 11 Dec 2020 09:14:38 -0800 (PST) Received: by mail-pj1-x1041.google.com with SMTP id hk16so2679065pjb.4 for ; Fri, 11 Dec 2020 09:14:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=uR0YjgXtKu52Ys9ozO8PBjvLYurXhASyqCjNQPfwTb4=; b=Brgm7LZVxVwcvbkIFXrexDB2orSaCca8av4L297rkICYUdeanX03+8l9Mrm3UGRRhF agAFyXef7Ta5qY/u1+sGco5pZDn8MXcQIZjtQxRMkv5HjHuK/cwTb3AdSyEhACPPNTDB 07nT1YBEgOekA4MVZx8E8Y+FigG1drsDsRXZk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=uR0YjgXtKu52Ys9ozO8PBjvLYurXhASyqCjNQPfwTb4=; b=WeQGlb8pn6hgDZev9lh/Hw3nYk4Y7Fy70wJNvmqyHg+2z9pk1xcjVAT0GCdoPlZjuj IueG2cepUCCWUY9JANYFdF8UBEglrBdU19WyfXkshNYg1I5LqIiQk0LmV2VOWds5v/WO 6RN8VtSRRi7Ie1bqstfHyEtDSmVwEGWOKKPNwhNhQfxkggIUEgC36XN4mgoTSFwEnapc CNO3lI4pFmeulTAfVPbS/z0OxlakFh1DamjFPfbA6DmxAmEIXVR3/2/faeFOlg0NdpJ1 gmB3ZalEa6l63tSnEcONvmB5d7XmKYqYXhjJxa11cz841OqnJpEX3DGGOPlc3IrU+1a6 1IaQ== X-Gm-Message-State: AOAM533aajM6L0V0H2dVKZR24+OL0eQIyQ+zBD16sBjLqV1VP7SatYju kGDg0q/ijpjkXmylbGAlP7MiJw== X-Google-Smtp-Source: ABdhPJyLmeMdzeZUCXeg52OqxkzlZcrmD5D5c2OFcExkilP+LqBoMxGKs3kJmHS0cxy79jbY6XVycA== X-Received: by 2002:a17:90b:1087:: with SMTP id gj7mr9882865pjb.41.1607706877348; Fri, 11 Dec 2020 09:14:37 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:42b0:34ff:fe3d:58e6]) by smtp.gmail.com with ESMTPSA id w70sm11149737pfd.65.2020.12.11.09.14.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Dec 2020 09:14:36 -0800 (PST) From: Douglas Anderson To: Ulf Hansson , Adrian Hunter Cc: Stephen Boyd , Taniya Das , vbadigan@codeaurora.org, Douglas Anderson , Bjorn Andersson , Andy Gross , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Subject: [PATCH v4 1/2] mmc: sdhci-msm: Warn about overclocking SD/MMC Date: Fri, 11 Dec 2020 09:12:32 -0800 Message-Id: <20201211091150.v4.1.Iec3430c7d3c2a29262695edef7b82a14aaa567e5@changeid> X-Mailer: git-send-email 2.29.2.576.ga3fc446d84-goog MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org As talked about in commit 5e4b7e82d497 ("clk: qcom: gcc-sdm845: Use floor ops for sdcc clks"), most clocks handled by the Qualcomm clock drivers are rounded _up_ by default instead of down. We should make sure SD/MMC clocks are always rounded down in the clock drivers. Let's add a warning in the Qualcomm SDHCI driver to help catch the problem. This would have saved a bunch of time [1]. NOTE: this doesn't actually fix any problems, it just makes it obvious to devs that there is a problem and that should be an indication to fix the clock driver. [1] http://lore.kernel.org/r/20201210102234.1.I096779f219625148900fc984dd0084ed1ba87c7f@changeid Suggested-by: Stephen Boyd Signed-off-by: Douglas Anderson Reviewed-by: Stephen Boyd Reviewed-by: Bjorn Andersson --- Changes in v4: - Emphasize in the commit message that this itself doesn't fix anything. Changes in v3: - Proper printf format code. Changes in v2: - Store rate in unsigned long, not unsigned int. - Reuse the clk_get_rate() in the later print. drivers/mmc/host/sdhci-msm.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 3451eb325513..50beb407dbe9 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -353,6 +353,7 @@ static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host, struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); struct mmc_ios curr_ios = host->mmc->ios; struct clk *core_clk = msm_host->bulk_clks[0].clk; + unsigned long achieved_rate; int rc; clock = msm_get_clock_rate_for_bus_mode(host, clock); @@ -363,10 +364,20 @@ static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host, curr_ios.timing); return; } + + /* + * Qualcomm clock drivers by default round clock _up_ if they can't + * make the requested rate. This is not good for SD. Yell if we + * encounter it. + */ + achieved_rate = clk_get_rate(core_clk); + if (achieved_rate > clock) + pr_warn("%s: Card appears overclocked; req %u Hz, actual %lu Hz\n", + mmc_hostname(host->mmc), clock, achieved_rate); + msm_host->clk_rate = clock; pr_debug("%s: Setting clock at rate %lu at timing %d\n", - mmc_hostname(host->mmc), clk_get_rate(core_clk), - curr_ios.timing); + mmc_hostname(host->mmc), achieved_rate, curr_ios.timing); } /* Platform specific tuning */ From patchwork Fri Dec 11 17:12:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Douglas Anderson X-Patchwork-Id: 343119 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15EB1C433FE for ; Fri, 11 Dec 2020 19:03:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CCA2123E1B for ; Fri, 11 Dec 2020 19:03:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2394929AbgLKRQ0 (ORCPT ); Fri, 11 Dec 2020 12:16:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42122 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2394954AbgLKRQB (ORCPT ); Fri, 11 Dec 2020 12:16:01 -0500 Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9501CC0617A7 for ; Fri, 11 Dec 2020 09:14:40 -0800 (PST) Received: by mail-pl1-x632.google.com with SMTP id 4so4900097plk.5 for ; Fri, 11 Dec 2020 09:14:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wUtmlJEBIq0uhPyguJ7qPFrT2WNfD/H+xrPqEI4pwGs=; b=ZHvUOLqsNTNw0JZDXwnzOaap67Czj7Hnks/XQPTrhkyKyxJ0D4iXnvb1T/tEkQj4iD DvMYK0E1BTGz6pxfLAG1+RTjgde4gBt5FASHNUI5oPHJYWIzNCpnctms6WCvKFC1Bzck 0jKFk+UoaAsE9hsgNyotXZEY/EhOEvOcoZ2R0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wUtmlJEBIq0uhPyguJ7qPFrT2WNfD/H+xrPqEI4pwGs=; b=ogqYw6QESC1CO7eLSc1dTofd+RJ0gtibyzAWP8k9++IpHxUGFT7eskXHeHD7uume1r bxstPrsYVUbOwtxgaC8d/nqz12HsL/nZ/sWMfCu3r8Dvt4fvRUqvs9DDypYOyR4w7kxQ AvtrbTbIjy1l3bm2nHWFEAx+9lyGCaELK0cX765ELNXREbB+We6VPqVfm7wDRvmKpPct TIPZTu/3R/4mGbguk+/rvO7+Co8rQIY9pQfXiQlqljxcbNqX9HG7hio4kJnwk5O1UTke XJSFcwKUla2uPJRhxILocv6dnDtvZS21/5nNffuqce4/WNcTXsmiSzkCUiAg09WGHkRa 5Izw== X-Gm-Message-State: AOAM531CVeXwTKHBCFZg0bJ3fhI5PwtSzDz7dexJfkNno1JzsscYMFM7 krlQOe84F3p1ziFjd5inxawcHg== X-Google-Smtp-Source: ABdhPJzV2xzxbWkOggNYmK1d6c9XtWif+h6BjcEUC1Cxvv/JjSXB/Rf3uToyrb4QZrOJFxpV8G/clA== X-Received: by 2002:a17:90b:16cd:: with SMTP id iy13mr13868997pjb.182.1607706879204; Fri, 11 Dec 2020 09:14:39 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:42b0:34ff:fe3d:58e6]) by smtp.gmail.com with ESMTPSA id w70sm11149737pfd.65.2020.12.11.09.14.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Dec 2020 09:14:38 -0800 (PST) From: Douglas Anderson To: Ulf Hansson , Adrian Hunter Cc: Stephen Boyd , Taniya Das , vbadigan@codeaurora.org, Douglas Anderson , Andy Gross , Bjorn Andersson , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Subject: [PATCH v4 2/2] mmc: sdhci-msm: Actually set the actual clock Date: Fri, 11 Dec 2020 09:12:33 -0800 Message-Id: <20201211091150.v4.2.I7564620993acd4baa63fa0e3925ca879a86d3ee3@changeid> X-Mailer: git-send-email 2.29.2.576.ga3fc446d84-goog In-Reply-To: <20201211091150.v4.1.Iec3430c7d3c2a29262695edef7b82a14aaa567e5@changeid> References: <20201211091150.v4.1.Iec3430c7d3c2a29262695edef7b82a14aaa567e5@changeid> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org The MSM SDHCI driver always set the "actual_clock" field to 0. It had a comment about it not being needed because we weren't using the standard SDHCI divider mechanism and we'd just fallback to "host->clock". However, it's still better to provide the actual clock. Why? 1. It will make timeout calculations slightly better. On one system I have, the eMMC requets 200 MHz (for HS400-ES) but actually gets 192 MHz. These are close, but why not get the more accurate one. 2. If things are seriously off in the clock driver and it's missing rates or picking the wrong rate (maybe it's rounding up instead of down), this will make it much more obvious what's going on. NOTE: we have to be a little careful here because the "actual_clock" field shouldn't include the multiplier that sdhci-msm needs internally. Signed-off-by: Douglas Anderson Reviewed-by: Bjorn Andersson --- Changes in v4: - ("mmc: sdhci-msm: Actually set the actual clock") new for v4. drivers/mmc/host/sdhci-msm.c | 32 ++++++++++++++------------------ 1 file changed, 14 insertions(+), 18 deletions(-) diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 50beb407dbe9..08a3960001ad 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -328,7 +328,7 @@ static void sdhci_msm_v5_variant_writel_relaxed(u32 val, writel_relaxed(val, host->ioaddr + offset); } -static unsigned int msm_get_clock_rate_for_bus_mode(struct sdhci_host *host, +static unsigned int msm_get_clock_mult_for_bus_mode(struct sdhci_host *host, unsigned int clock) { struct mmc_ios ios = host->mmc->ios; @@ -342,8 +342,8 @@ static unsigned int msm_get_clock_rate_for_bus_mode(struct sdhci_host *host, ios.timing == MMC_TIMING_MMC_DDR52 || ios.timing == MMC_TIMING_MMC_HS400 || host->flags & SDHCI_HS400_TUNING) - clock *= 2; - return clock; + return 2; + return 1; } static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host, @@ -354,14 +354,16 @@ static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host, struct mmc_ios curr_ios = host->mmc->ios; struct clk *core_clk = msm_host->bulk_clks[0].clk; unsigned long achieved_rate; + unsigned int desired_rate; + unsigned int mult; int rc; - clock = msm_get_clock_rate_for_bus_mode(host, clock); - rc = dev_pm_opp_set_rate(mmc_dev(host->mmc), clock); + mult = msm_get_clock_mult_for_bus_mode(host, clock); + desired_rate = clock * mult; + rc = dev_pm_opp_set_rate(mmc_dev(host->mmc), desired_rate); if (rc) { pr_err("%s: Failed to set clock at rate %u at timing %d\n", - mmc_hostname(host->mmc), clock, - curr_ios.timing); + mmc_hostname(host->mmc), desired_rate, curr_ios.timing); return; } @@ -371,11 +373,12 @@ static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host, * encounter it. */ achieved_rate = clk_get_rate(core_clk); - if (achieved_rate > clock) + if (achieved_rate > desired_rate) pr_warn("%s: Card appears overclocked; req %u Hz, actual %lu Hz\n", - mmc_hostname(host->mmc), clock, achieved_rate); + mmc_hostname(host->mmc), desired_rate, achieved_rate); + host->mmc->actual_clock = achieved_rate / mult; - msm_host->clk_rate = clock; + msm_host->clk_rate = desired_rate; pr_debug("%s: Setting clock at rate %lu at timing %d\n", mmc_hostname(host->mmc), achieved_rate, curr_ios.timing); } @@ -1756,13 +1759,6 @@ static unsigned int sdhci_msm_get_min_clock(struct sdhci_host *host) static void __sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock) { u16 clk; - /* - * Keep actual_clock as zero - - * - since there is no divider used so no need of having actual_clock. - * - MSM controller uses SDCLK for data timeout calculation. If - * actual_clock is zero, host->clock is taken for calculation. - */ - host->mmc->actual_clock = 0; sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); @@ -1785,7 +1781,7 @@ static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock) struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); if (!clock) { - msm_host->clk_rate = clock; + host->mmc->actual_clock = msm_host->clk_rate = 0; goto out; }