From patchwork Sun Dec 20 16:58:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 346269 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3855751jai; Sun, 20 Dec 2020 09:00:55 -0800 (PST) X-Google-Smtp-Source: ABdhPJzCJHC8Nwe62PkHi6cU+Ht7bhRb3gPV8Fsy+oRfdBh8P21gM+ZWNk6OticTJfbB6IAs8adQ X-Received: by 2002:a17:907:d09:: with SMTP id gn9mr12142786ejc.349.1608483655829; Sun, 20 Dec 2020 09:00:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1608483655; cv=none; d=google.com; s=arc-20160816; b=tmxqRXX3cNmGNYeif2mUd+kPb61hiKIJFAtsKako1njNQIkf3Am/Sw00G84pTm7Sd/ udkgSb/qrwvH3T4ZsQj0+NwVWG1WSDon9YAtkbVmqYJiIBnagXse8G+kMB2LHOiNoq60 ICgmDGNBfHL0osRQAyRk2hYgCAhTWFeobnm7gQh0wHLV5eqN4Ejl/trgiT82BNvR74bQ sHr/ZvXiSYPjZRHw2aByce/m5CarcmiHY3IiThOwt40YR0lZA6bmHr1Av1J4fI4uV+Pv 75CvyLs5a87cZQyD6QN7tC9lu8nL4a8Tv3bEPDMiMuBbwZhsmOptdgQNfyiT14meTu9r HTeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=OALKDRfm16NOHszzu3Sf+9Poh/Mp+Pc80V3eS3Rpmxg=; b=DnG7ddo6v2QWVWzXlHc2opaJa09a5jQPRXk7EokAmPuE+jS2dxFxpG266+7O/Up0hu TjcV2EnJgkunqoCHJAaCYA92XeOB4OQhZRmaaG9ibiP7c6LPyOwl1UvGKkNBapXz2HrH 8sPRyCs7VjpY3YaVnbY+0oPwUfIg5cxgyVTzDVSDRjC56ArXDbaJHseUxmboAPFhp2Xo mXGpoEW/Ui5CwWHhpgCWccRf7SDVeAgS/bKhbhNlrNg7ncvhTrtEtfz5GGkrXUpt1IU0 zymnbrv0+TiHfyUxOdXuLBHC90MQ2JJP5I1oi1vTEzOlw2OnhPLnROoX5c+RWeStfTbF Ba5Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bZrKg7fF; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id bo6si9171342edb.434.2020.12.20.09.00.55; Sun, 20 Dec 2020 09:00:55 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bZrKg7fF; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726410AbgLTQ7m (ORCPT + 7 others); Sun, 20 Dec 2020 11:59:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727770AbgLTQ7i (ORCPT ); Sun, 20 Dec 2020 11:59:38 -0500 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8EBE7C061257 for ; Sun, 20 Dec 2020 08:58:57 -0800 (PST) Received: by mail-lf1-x12f.google.com with SMTP id y19so17949298lfa.13 for ; Sun, 20 Dec 2020 08:58:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=OALKDRfm16NOHszzu3Sf+9Poh/Mp+Pc80V3eS3Rpmxg=; b=bZrKg7fFy4O+JK6xZyYKrTr5TNhfzQ5Q9RST5OyDxo1egVe4RxCea3D4mFNp/WJrff jDHLSEplkeDh+STeIr1z8wCy2H586kqLRLOoAenmIx2HRYcY3s5aZnzmZdeVKAgEfEIu 5nqS9kuIcJuEckQgfn7ck3tkhtZLhic7iszjuAjzjt60lFcWR22bOZhGumpyXXyHAAsx GfZE4CkF/DK13csY7QipwObgvIZhShevY2FIMMufW0xYKS92hFfatuZLawBWXa4zol6r inGEP8dCtTpyBbVamqSvTrzyjFeq587qKXHIBHgd0S53p9YXCOKKw6Miy1eobgDEtdL3 Htmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OALKDRfm16NOHszzu3Sf+9Poh/Mp+Pc80V3eS3Rpmxg=; b=sVXayvkIKZ50WNQH6uJLe2bV3Eyh1raIq5CTtQCqvM41cWqBZBLI5cssdz0Ys5LRQC MZUxOJkgQ/SRVtuiZZxGEbOGdUu1S2Jo8VuYV6kqJA4h9KDnIaP/i64+VVsrNe0PYqrM 5QDm8KKyRzjjR7AOasBaydNI5etFbRw3N6UBOEVUuRrdWZWGnI/O9goW0qNuzJUNVXMj 8sEkSXZ/NC86Cqvjvbi4YonkkB3aFJ6qQUlnp0jzKmJKSFXFtWAe9Hf3qDjjEI2gcIgo mf537hyRL1Kco8tAOryTmhxcwRmphjlPMYjIqiX9Yj+957YY7FiODWNwqLLx0u6tY89w 8B8A== X-Gm-Message-State: AOAM5324eG8nU/1C+askiTwkNc/sp0mPeSZ3gjt+eCLymxeEK8B8FAH2 gBZwiK0CXz+z/GGhTdpC+Esg+A== X-Received: by 2002:a2e:b04b:: with SMTP id d11mr5510701ljl.281.1608483534711; Sun, 20 Dec 2020 08:58:54 -0800 (PST) Received: from eriador.lumag.spb.ru ([188.162.64.15]) by smtp.gmail.com with ESMTPSA id t30sm1696638lft.266.2020.12.20.08.58.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Dec 2020 08:58:54 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Lee Jones Cc: linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/4] dt-bindings: mfd: qcom, qca639x: add binding for QCA639x defvice Date: Sun, 20 Dec 2020 19:58:42 +0300 Message-Id: <20201220165845.3712599-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201220165845.3712599-1-dmitry.baryshkov@linaro.org> References: <20201220165845.3712599-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Qualcomm QCA639x is a family of WiFi + Bluetooth SoCs, with BT part being controlled through the UART and WiFi being present on PCIe bus. Both blocks share common power sources. Add binding to describe power sequencing required to power up this device. Signed-off-by: Dmitry Baryshkov --- .../devicetree/bindings/mfd/qcom,qca639x.yaml | 84 +++++++++++++++++++ 1 file changed, 84 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/qcom,qca639x.yaml -- 2.29.2 diff --git a/Documentation/devicetree/bindings/mfd/qcom,qca639x.yaml b/Documentation/devicetree/bindings/mfd/qcom,qca639x.yaml new file mode 100644 index 000000000000..d43c75da136f --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/qcom,qca639x.yaml @@ -0,0 +1,84 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/mfd/qcom,qca639x.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm QCA639x WiFi + Bluetoot SoC bindings + +maintainers: + - Andy Gross + - Bjorn Andersson + +description: | + This binding describes thes Qualcomm QCA6390 or QCA6391 power supplies and + enablement pins. + +properties: + compatible: + const: qcom,qca639x + + '#power-domain-cells': + const: 0 + + pinctrl-0: true + pinctrl-1: true + + pinctrl-names: + items: + - const: default + - const: active + + vddaon-supply: + description: + 0.95V always-on LDO power input + + vddpmu-supply: + description: + 0.95V LDO power input to PMU + + vddrfa1-supply: + description: + 0.95V LDO power input to RFA + + vddrfa2-supply: + description: + 1.25V LDO power input to RFA + + vddrfa3-supply: + description: + 2V LDO power input to RFA + + vddpcie1-supply: + description: + 1.25V LDO power input to PCIe part + + vddpcie2-supply: + description: + 2V LDO power input to PCIe part + + vddio-supply: + description: + 1.8V VIO input + +additionalProperties: false + +examples: + - | + qca639x: qca639x { + compatible = "qcom,qca639x"; + #power-domain-cells = <0>; + + vddaon-supply = <&vreg_s6a_0p95>; + vddpmu-supply = <&vreg_s2f_0p95>; + vddrfa1-supply = <&vreg_s2f_0p95>; + vddrfa2-supply = <&vreg_s8c_1p3>; + vddrfa3-supply = <&vreg_s5a_1p9>; + vddpcie1-supply = <&vreg_s8c_1p3>; + vddpcie2-supply = <&vreg_s5a_1p9>; + vddio-supply = <&vreg_s4a_1p8>; + pinctrl-names = "default", "active"; + pinctrl-0 = <&wlan_default_state &bt_default_state>; + pinctrl-1 = <&wlan_active_state &bt_active_state>; + }; +... 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Both blocks share common power sources. So add mfd device driver handling power sequencing of QCA6390/1. Signed-off-by: Dmitry Baryshkov --- drivers/mfd/Kconfig | 12 +++ drivers/mfd/Makefile | 1 + drivers/mfd/qcom-qca639x.c | 168 +++++++++++++++++++++++++++++++++++++ 3 files changed, 181 insertions(+) create mode 100644 drivers/mfd/qcom-qca639x.c -- 2.29.2 diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index bdfce7b15621..2fd6b9770ad0 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1036,6 +1036,18 @@ config MFD_PM8XXX Say M here if you want to include support for PM8xxx chips as a module. This will build a module called "pm8xxx-core". +config MFD_QCOM_QCA639X + tristate "Qualcomm QCA639x WiFi/Bluetooth module support" + depends on REGULATOR && PM_GENERIC_DOMAINS + help + If you say yes to this option, support will be included for Qualcomm + QCA639x family of WiFi and Bluetooth SoCs. Note, this driver supports + only power control for this SoC, you still have to enable individual + Bluetooth and WiFi drivers. + + Say M here if you want to include support for QCA639x chips as a + module. This will build a module called "qcom-qca639x". + config MFD_QCOM_RPM tristate "Qualcomm Resource Power Manager (RPM)" depends on ARCH_QCOM && OF diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 14fdb188af02..da5747508faf 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -202,6 +202,7 @@ obj-$(CONFIG_MFD_SI476X_CORE) += si476x-core.o obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o omap-usb-tll.o obj-$(CONFIG_MFD_PM8XXX) += qcom-pm8xxx.o ssbi.o +obj-$(CONFIG_MFD_QCOM_QCA639X) += qcom-qca639x.o obj-$(CONFIG_MFD_QCOM_RPM) += qcom_rpm.o obj-$(CONFIG_MFD_SPMI_PMIC) += qcom-spmi-pmic.o obj-$(CONFIG_TPS65911_COMPARATOR) += tps65911-comparator.o diff --git a/drivers/mfd/qcom-qca639x.c b/drivers/mfd/qcom-qca639x.c new file mode 100644 index 000000000000..1ecc2e2e5bfd --- /dev/null +++ b/drivers/mfd/qcom-qca639x.c @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, Linaro Limited + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_NUM_REGULATORS 8 + +static struct vreg { + const char *name; + unsigned int load_uA; +} vregs[MAX_NUM_REGULATORS] = { + /* 2.0 V */ + { "vddpcie2", 15000 }, + { "vddrfa3", 400000 }, + + /* 0.95 V */ + { "vddaon", 100000 }, + { "vddpmu", 1250000 }, + { "vddrfa1", 200000 }, + + /* 1.35 V */ + { "vddrfa2", 400000 }, + { "vddpcie1", 35000 }, + + /* 1.8 V */ + { "vddio", 20000 }, +}; + +struct qca639x_data { + struct regulator_bulk_data regulators[MAX_NUM_REGULATORS]; + size_t num_vregs; + struct device *dev; + struct pinctrl_state *active_state; + struct generic_pm_domain pd; +}; + +#define domain_to_data(domain) container_of(domain, struct qca639x_data, pd) + +static int qca639x_power_on(struct generic_pm_domain *domain) +{ + struct qca639x_data *data = domain_to_data(domain); + int ret; + + dev_warn(&domain->dev, "DUMMY POWER ON\n"); + + ret = regulator_bulk_enable(data->num_vregs, data->regulators); + if (ret) { + dev_err(data->dev, "Failed to enable regulators"); + return ret; + } + + /* Wait for 1ms before toggling enable pins. */ + usleep_range(1000, 2000); + + ret = pinctrl_select_state(data->dev->pins->p, data->active_state); + if (ret) { + dev_err(data->dev, "Failed to select active state"); + return ret; + } + + /* Wait for all power levels to stabilize */ + usleep_range(6000, 7000); + + return 0; +} + +static int qca639x_power_off(struct generic_pm_domain *domain) +{ + struct qca639x_data *data = domain_to_data(domain); + + dev_warn(&domain->dev, "DUMMY POWER OFF\n"); + + pinctrl_select_default_state(data->dev); + regulator_bulk_disable(data->num_vregs, data->regulators); + + return 0; +} + +static int qca639x_probe(struct platform_device *pdev) +{ + struct qca639x_data *data; + struct device *dev = &pdev->dev; + int i, ret; + + if (!dev->pins || IS_ERR_OR_NULL(dev->pins->default_state)) + return -EINVAL; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->dev = dev; + data->num_vregs = ARRAY_SIZE(vregs); + + data->active_state = pinctrl_lookup_state(dev->pins->p, "active"); + if (IS_ERR(data->active_state)) { + ret = PTR_ERR(data->active_state); + dev_err(dev, "Failed to get active_state: %d\n", ret); + return ret; + } + + for (i = 0; i < data->num_vregs; i++) + data->regulators[i].supply = vregs[i].name; + ret = devm_regulator_bulk_get(dev, data->num_vregs, data->regulators); + if (ret < 0) + return ret; + + for (i = 0; i < data->num_vregs; i++) { + ret = regulator_set_load(data->regulators[i].consumer, vregs[i].load_uA); + if (ret) + return ret; + } + + data->pd.name = dev_name(dev); + data->pd.power_on = qca639x_power_on; + data->pd.power_off = qca639x_power_off; + + ret = pm_genpd_init(&data->pd, NULL, true); + if (ret < 0) + return ret; + + ret = of_genpd_add_provider_simple(dev->of_node, &data->pd); + if (ret < 0) { + pm_genpd_remove(&data->pd); + return ret; + } + + platform_set_drvdata(pdev, data); + + return 0; +} + +static int qca639x_remove(struct platform_device *pdev) +{ + struct qca639x_data *data = platform_get_drvdata(pdev); + + pm_genpd_remove(&data->pd); + + return 0; +} + +static const struct of_device_id qca639x_of_match[] = { + { .compatible = "qcom,qca639x" }, +}; + +static struct platform_driver qca639x_driver = { + .probe = qca639x_probe, + .remove = qca639x_remove, + .driver = { + .name = "qca639x", + .of_match_table = qca639x_of_match, + }, +}; + +module_platform_driver(qca639x_driver); +MODULE_AUTHOR("Dmitry Baryshkov "); +MODULE_DESCRIPTION("Power control for Qualcomm QCA639x BT/WiFi chip"); +MODULE_LICENSE("GPL v2"); From patchwork Sun Dec 20 16:58:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 346272 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3855821jai; Sun, 20 Dec 2020 09:00:59 -0800 (PST) X-Google-Smtp-Source: ABdhPJxrTu14rUmwXRAPaUrO7OwM3ybl0+sUvaV87aHireHmo+g8633OiGF8+1ScYlRmfGD2XsT1 X-Received: by 2002:a17:906:16d6:: with SMTP id t22mr12328145ejd.154.1608483659077; Sun, 20 Dec 2020 09:00:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1608483659; cv=none; d=google.com; s=arc-20160816; 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[23.128.96.18]) by mx.google.com with ESMTP id bo6si9171342edb.434.2020.12.20.09.00.58; Sun, 20 Dec 2020 09:00:59 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RYQQZNz7; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727826AbgLTRAT (ORCPT + 7 others); Sun, 20 Dec 2020 12:00:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42762 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727396AbgLTRAS (ORCPT ); Sun, 20 Dec 2020 12:00:18 -0500 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B90DAC0611D0 for ; Sun, 20 Dec 2020 08:58:59 -0800 (PST) Received: by mail-lf1-x136.google.com with SMTP id a12so18070545lfl.6 for ; Sun, 20 Dec 2020 08:58:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=y5W4txAZ3GE7OBSlwDNmPew8Z4ZGoIzAKXrW8t0fFDs=; b=RYQQZNz78v2X1T+ZYZAiV9DeWegSWSe+KASeSXAd75iMZDdUIYMig3Bgs9lzeATWaJ kGAHgKqeglZVwaJxQOa7wDkqmPzgN8Y9P7wtVL2bquEPkP0y/sYiiAS4YorzKPqCf3pR XmdrTXWL6jqrAeA/KcR66QYkZR4t+Bi0XAoU329wb3crqsoVzajgyINROIRnW0U/9EB2 9udvkYHBwFu7A3vUH1MRugJRhTng11m4ZkD13M8cvYYdQ660o/Xo2aStiEUs+EiBNBUq Ws2MRt5yNSpdjhxYbDwvm+B5rvbCz/OxzWVu0JOW17e6AapHvRMjK8MRsaPigQmggHZw O27w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=y5W4txAZ3GE7OBSlwDNmPew8Z4ZGoIzAKXrW8t0fFDs=; b=mFv+nZ7yDIqOIlDAiONQe0nu9vYFvMzv9xJsTcm0nqMaOask5aR5BFsltXAYj7+2kG gpHGytb2nEgk9dj69DUrrPbU8liq/lxckH8hFoYg6VbbBZ+U7zZWNG7rzI74JnE+bHcN vbHaMf95eIc2aHybRCMTWay/IdAkbnzfT1of3eTgZv6nwR9ID2DPnh9PgaWWpC0qE5b1 k8NHzlq1Q6te58Cpih3YbhQtGYtquEV3l+gNB1hHNfZN2HxMXhni/0/pv/Bnz5gLTghP h3xHlMzudnCA8TV/jeiQCnLg0m7QOoMq6odTIC2Rl7RIGLlKcL7QhrNhURsjY47SD5Kg leTw== X-Gm-Message-State: AOAM533HrbawiX5nmjBCOpleZjr5hg3bt0OZPgCfhXBNjjJnueoI2vPS 6XeV5mxkzW8KqYVPkh1pUvziRQ== X-Received: by 2002:a05:651c:1063:: with SMTP id y3mr5372919ljm.431.1608483538304; Sun, 20 Dec 2020 08:58:58 -0800 (PST) Received: from eriador.lumag.spb.ru ([188.162.64.15]) by smtp.gmail.com with ESMTPSA id t30sm1696638lft.266.2020.12.20.08.58.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Dec 2020 08:58:57 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Lee Jones Cc: linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/4] arm64: dts: qcom: Add Bluetooth support on RB5 Date: Sun, 20 Dec 2020 19:58:44 +0300 Message-Id: <20201220165845.3712599-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201220165845.3712599-1-dmitry.baryshkov@linaro.org> References: <20201220165845.3712599-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Manivannan Sadhasivam Add Bluetooth support on RB5 using the onboard QCA6391 WLAN+BT chipset. Signed-off-by: Manivannan Sadhasivam [DB: added qca639x power domain] Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 97 ++++++++++++++++++++++++ 1 file changed, 97 insertions(+) -- 2.29.2 diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts index 1be984d89f48..e6bab9960cea 100644 --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts @@ -17,6 +17,7 @@ / { compatible = "qcom,qrb5165-rb5", "qcom,sm8250"; aliases { + hsuart0 = &uart6; serial0 = &uart12; sdhc2 = &sdhc_2; }; @@ -118,6 +119,23 @@ vreg_s4a_1p8: vreg-s4a-1p8 { regulator-max-microvolt = <1800000>; regulator-always-on; }; + + qca639x: qca639x { + compatible = "qcom,qca639x"; + #power-domain-cells = <0>; + + vddaon-supply = <&vreg_s6a_0p95>; + vddpmu-supply = <&vreg_s2f_0p95>; + vddrfa1-supply = <&vreg_s2f_0p95>; + vddrfa2-supply = <&vreg_s8c_1p3>; + vddrfa3-supply = <&vreg_s5a_1p9>; + vddpcie1-supply = <&vreg_s8c_1p3>; + vddpcie2-supply = <&vreg_s5a_1p9>; + vddio-supply = <&vreg_s4a_1p8>; + pinctrl-names = "default", "active"; + pinctrl-0 = <&wlan_default_state &bt_default_state>; + pinctrl-1 = <&wlan_active_state &bt_active_state>; + }; }; &apps_rsc { @@ -131,6 +149,13 @@ pm8009-rpmh-regulators { vdd-l5-l6-supply = <&vreg_bob>; vdd-l7-supply = <&vreg_s4a_1p8>; + vreg_s2f_0p95: smps2 { + regulator-name = "vreg_s2f_0p95"; + regulator-min-microvolt = <512000>; + regulator-max-microvolt = <1100000>; + regulator-initial-mode = ; + }; + vreg_l1f_1p1: ldo1 { regulator-name = "vreg_l1f_1p1"; regulator-min-microvolt = <1104000>; @@ -513,6 +538,26 @@ &pm8150_rtc { status = "okay"; }; +&qup_uart6_default { + ctsrx { + pins = "gpio16", "gpio19"; + drive-strength = <2>; + bias-disable; + }; + + rts { + pins = "gpio17"; + drive-strength = <2>; + bias-disable; + }; + + tx { + pins = "gpio18"; + drive-strength = <2>; + bias-pull-up; + }; +}; + &qupv3_id_0 { status = "okay"; }; @@ -738,6 +783,28 @@ &tlmm { "HST_WLAN_UART_TX", "HST_WLAN_UART_RX"; + bt_default_state: bt-default-state { + bt-en { + pins = "gpio21"; + function = "gpio"; + + drive-strength = <16>; + output-low; + bias-pull-up; + }; + }; + + bt_active_state: bt-active-state { + bt-en { + pins = "gpio21"; + function = "gpio"; + + drive-strength = <16>; + output-high; + bias-pull-up; + }; + }; + pcie0_default_state: pcie0-default { clkreq { pins = "gpio80"; @@ -838,6 +905,36 @@ sdc2_card_det_n: sd-card-det-n { function = "gpio"; bias-pull-up; }; + + wlan_default_state: wlan-default-state { + wlan-en { + pins = "gpio20"; + function = "gpio"; + + drive-strength = <16>; + output-low; + bias-pull-up; + }; + }; + + wlan_active_state: wlan-active-state { + wlan-en { + pins = "gpio20"; + function = "gpio"; + + drive-strength = <16>; + output-high; + bias-pull-up; + }; + }; +}; + +&uart6 { + status = "okay"; + bluetooth { + compatible = "qcom,qca6390-bt"; + power-domains = <&qca639x>; + }; }; &uart12 { From patchwork Sun Dec 20 16:58:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 346271 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3855831jai; Sun, 20 Dec 2020 09:00:59 -0800 (PST) X-Google-Smtp-Source: ABdhPJx4w/HnCCrOwcnOqTKioEsNVjPJdt/NuZlJ6tL/9RpCABk6+YXzQYRt+NYqww4SWR5k/35I X-Received: by 2002:a17:906:178b:: with SMTP id t11mr11866082eje.152.1608483659536; Sun, 20 Dec 2020 09:00:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1608483659; cv=none; d=google.com; s=arc-20160816; b=K5OOuXDzpjqdAsF5+AMKD7D46Jf4pVRwKaDvExi79Jn0J6IGLxzK6xUqwNd6tnzWX2 udh028JkAOX2e996lf4z00eXaGuMPZikq8OKMjfurIT2BKPIl/jjRbeRX9zzpooS5qdv BO5IeG/Rvcv4jtvf8z9GUSIUYKtDl+M97vTebg5NzEaK1mYO8pa/UsrHePgqlH7VA/gZ sACus/OcZfR5Tf70woYmye5WVhPKZrHbtSxlE/zia3BsoTjlGmCm6sw62wiwmlUq3Fv/ 1rRUiflSGy/0M3jd3Sn/OWXWpUGLm1F00rS3ffnJ0GhgvMkZChwNv9vutf4DqNX3apFV JKBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6ACQLhZ/DjpUcMSHfzCdjeEO3CADfnxSX7nisOAf+8Q=; b=YSIvVUVj788S5GNZIuQnLi7WvaYQFMgNFcN6bRnAmnz3LZM+Jpt9orviOENJPdTbHh /HhwBkmpFSGh0yAtx2EdSLHdgFI+ZTVjP9SMERQM6X/yrT8z11KRejBweG4YKGLWFDhf cnwQGEMCQZQdLUC8mHD9sgurzZiKr3swey/6EkYMGvIH3tw0gbY3GnEBPt4vFXrrM9Qy q4fE4kZcpd31MAZjOnMLu5Pw9j3kEsIjWAi2JSeUVw8GtrzNlNWV/9gy+Dffc8lsYN4z ZcQKTT7QGd0VtmTwxF/0QI56TvAxW6fv01exXQf5c772+EYOGBJh9m+dvtHeFf2tuG83 7sSw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="f1/S2sTp"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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To ease device power up support, use qca639x as pcie0 phy power-domain. This allows us to make sure that QCA6391 chip is powered on before PCIe0 probe happens. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 3 +++ 1 file changed, 3 insertions(+) -- 2.29.2 diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts index e6bab9960cea..9aa7793cd7c0 100644 --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts @@ -457,6 +457,9 @@ &pcie0_phy { status = "okay"; vdda-phy-supply = <&vreg_l5a_0p88>; vdda-pll-supply = <&vreg_l9a_1p2>; + + /* Power on QCA639x chip, otherwise PCIe bus timeouts */ + power-domains = <&qca639x>; }; &pcie1 {