From patchwork Tue Dec 22 13:44:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 346914 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12245C433E9 for ; Tue, 22 Dec 2020 13:45:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D6E2D23103 for ; Tue, 22 Dec 2020 13:45:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727058AbgLVNpt (ORCPT ); Tue, 22 Dec 2020 08:45:49 -0500 Received: from mail-eopbgr70082.outbound.protection.outlook.com ([40.107.7.82]:47333 "EHLO EUR04-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726903AbgLVNps (ORCPT ); Tue, 22 Dec 2020 08:45:48 -0500 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=kHHQ2T3iT/dx90wXB4/CCyr1Uzo2nv6P1kilMpTSSDULLh++1gcx2QnZckpy27Du/9f1PNOGC35os8txMYGjNjZsREMQ9PVdHFKQNPo9K7cNx0Mt5Blwbj9SOxjhWn4rZt9OBZlPoDLmTlsmt3wdMClYrotfoGR8dq5/7zLcTx2mMK09FEsVsRiFYBkHxnYfxtCid+TLaMk9aqL3ecw+3ArtuP3+jOi8On4Kyy9u9cZqWeo/x6Jb0u+TVX+OONuTV2iZclDpNZiS9eLIm4bfnEj8srle001OY24vvn8FtIpJStb8QE11FrKTiX930iZn7q5t+kVl/yXDPrsuYpMbug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=L+d5xhPj/GLMd7MBwU51JpSFrsa12OAlDAimbUaMw+o=; b=OM4WfBxKc8/dwW7Zj5LrDu/QUh9jU+a6KQKhWaqa1PxcH+jA9yaJUHMhRzeNM7ElSOMz85Wy2vpgR6GjEZMWSZRqg9lCfnDxibAsDCtdyP7Te10m2nDXqOBM+2ezWS8oTKw86uh0pcw55F1nxMIeOO/TC1uTysDhAvcXY7FFHzs75AF4Ss61GKRlsDce/fWyarn8nVtMfBkof2eaPJIYKJQKafBQb3DrECbv8vItiAqtH4gS36njEGKU5CImkVSgDZLEkVuUTqPtRsVbFBs0cMGDL8jo+PPna+zqfYfLEWTcGQOI9VrECahCBlFh2Jn5A1s3TxGQfXFsT272BNORzg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=L+d5xhPj/GLMd7MBwU51JpSFrsa12OAlDAimbUaMw+o=; b=BnbB6MmLzF2f65EmMvvk6xTFlf+UulF1YaRLtsiFH+ywQPLUf4dLg2FJzHWu1zqGPVu5QuE0mVHUDceUrUjSqbl4xUUtVG8c0Z8U4Hi928mwULxlGZ9iJKx1y1RurR3qDL+i6gBpg5VNlq91vdPKBe8dDyjL+rU9z2VN/kbYp/k= Authentication-Results: lunn.ch; dkim=none (message not signed) header.d=none;lunn.ch; dmarc=none action=none header.from=nxp.com; Received: from VI1PR04MB5696.eurprd04.prod.outlook.com (2603:10a6:803:e7::13) by VE1PR04MB7408.eurprd04.prod.outlook.com (2603:10a6:800:1b3::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.25; Tue, 22 Dec 2020 13:44:54 +0000 Received: from VI1PR04MB5696.eurprd04.prod.outlook.com ([fe80::2dd6:8dc:2da7:ad84]) by VI1PR04MB5696.eurprd04.prod.outlook.com ([fe80::2dd6:8dc:2da7:ad84%5]) with mapi id 15.20.3676.033; Tue, 22 Dec 2020 13:44:54 +0000 From: Vladimir Oltean To: Andrew Lunn , Florian Fainelli , Vivien Didelot Cc: Richard Cochran , Claudiu Manoil , Alexandru Marginean , Alexandre Belloni , Xiaoliang Yang , Hongbo Wang , Po Liu , Yangbo Lu , "David S . Miller" , Jakub Kicinski , netdev@vger.kernel.org, UNGLinuxDriver@microchip.com Subject: [RFC PATCH v2 net-next 01/15] net: dsa: tag_8021q: add helpers to deduce whether a VLAN ID is RX or TX VLAN Date: Tue, 22 Dec 2020 15:44:25 +0200 Message-Id: <20201222134439.2478449-2-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201222134439.2478449-1-vladimir.oltean@nxp.com> References: <20201222134439.2478449-1-vladimir.oltean@nxp.com> X-Originating-IP: [188.25.2.120] X-ClientProxiedBy: VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) To VI1PR04MB5696.eurprd04.prod.outlook.com (2603:10a6:803:e7::13) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (188.25.2.120) by VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.29 via Frontend Transport; Tue, 22 Dec 2020 13:44:53 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: cf8bf1e7-ab52-4945-5741-08d8a67fc37e X-MS-TrafficTypeDiagnostic: VE1PR04MB7408: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7691; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 6kcJ8ijFLpp7mIowqMqypG/b0v7VsCq2oFkuy/hP/yPUxevqE6pkHQWuA/y6uVbGQ3Y12N5wKKPxRAckzD5PfupJHEOabuFVICIuF7y++cGck6mSrbXkPOA6Q4uTVw+/88j9woY2qo0kUJb7kZEC3V1TlB0uzEkNt06AMxaJf79Lw86BGsTwom1YdU3ewE0yDJ0XV+m11X1PncA9alLZq2gjm652BhzZPCFj/LAT4wew85uqi6eNjCgQo0mPzVJR1V8z+YAz4XxPeZSDDOGbgL04JQfjR9d1YFQxrh19pxwJ0B+umP2sy09WEzL4r1G8IeD6yje3VnwieIxcUllug6J3TiMXUUB5OQorDWdQO6soRPN6opQ5dPKmi1l131tiax+GhltJZlBHPtojCfm4fXriaRIWNaSF3D5hSb+ZsjP6R31i7V/xlnxfOiaqYVG2W03FBv0pa0yqrg1CzXGqfw== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:VI1PR04MB5696.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(52116002)(69590400010)(8676002)(956004)(186003)(4326008)(36756003)(2616005)(6512007)(498600001)(16526019)(44832011)(2906002)(83380400001)(8936002)(110136005)(54906003)(26005)(6666004)(66476007)(5660300002)(6486002)(86362001)(6506007)(66946007)(1076003)(66556008); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: IennnJH/udpkBQSizJgX1eiWU6haMYy0I7vqhofW7SNsvr+rEcVhGjPxxhV+TQzUQ33PHXR/h8NyOUvZCZZI+wMosanf9yhen0X0SbhzV+mveVYsG1EAJwL8SzpTTRpbPTXM7tZ0T/ETZvX/kofPmgyafD0d8ic4Yh77EVP15yIsILD67rV+3UqYvP0WCDh7jrTQ7ReqVnXFHl/kCvxPoXFyPWoxUsx3k5plE4pGWOwzjoeYlRWhZrq1NtPLj7uAktrTbf1gg9NNkasrn7qSseD7aun1aUoF3yhNN3u6aG+v19PBMuTmMFTSGpjuugLQZTtk9aS75mEXqzyl739WBkfphMxsNi9c9CITCNHlNWwSnYaFiuHkkES8RHgevev1g+ilYMByJN3WnEV6cot2hTYWW9Fwxsz1/cE3uKQaXzJ1sY1mYI6SUqJim1ztLcFALSWZXooTiNEiAar4uAENgvol1G0n0M9JAOxPe3mbmaVWQvojK+Umu29nUnNgeXb6LlLUhnBWj6Gp2SsXj4hOO4d4oGabo0+o3C0BsoXm5VPPAdQvZXdHxQJEMG/AnQ1H+uJ9JH9Fv23v9OFbfmwSoJavkBxYo1/1zKq4Ne1pfhIAlAJYaqoLcyo+8gXli0tJFwxuV3IutDDBlXOIJHydk0pMC8rDtUjN6A1JI4c2Cf8y32IxoxVu+TcAczI/Uiz9otTewlze+oDwOEvdcXvgCgGB2CstIovoRMBheIVcZX6CJ/ksHsJY25H+Aw5EmfJUTKiZh/L94gNbvmFQESQy2iWXV9gAhg95bRBZJRKE6TAihZP6sxWdozzekqZuJlpU9wnvxHCnaKCraZ7Ji/upFWgk0eaMe3q4Bby1fEzahDvOsCH9bBKcxwLmsQGoS94KBlFSL9PCy5TC2sjC21e4ADNMX/o/CFfYjcUfSNYxrzcP9EK59CTHhhNDJJGfKKme9Lehyy9r8ugTNc7gxDAosyd2L7jNl9z1NBnmJMv52Eslsck73jArKtebRcqCKX5w X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5696.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2020 13:44:54.2830 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-Network-Message-Id: cf8bf1e7-ab52-4945-5741-08d8a67fc37e X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: i0GJKHNqd6i2NBtxcPt3FCvanUoWQnJNm7Ws1eVCEWZKLmzrNrmpfN6YXni51L0/25Bnsxf4pqhcsrdygJLK4w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB7408 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The sja1105 implementation can be blind about this, but the felix driver doesn't do exactly what it's being told, so it needs to know whether it is a TX or an RX VLAN, so it can install the appropriate type of TCAM rule. Signed-off-by: Vladimir Oltean --- Changes in v2: None. include/linux/dsa/8021q.h | 14 ++++++++++++++ net/dsa/tag_8021q.c | 15 +++++++++++++-- 2 files changed, 27 insertions(+), 2 deletions(-) diff --git a/include/linux/dsa/8021q.h b/include/linux/dsa/8021q.h index 88cd72dfa4e0..b12b05f1c8b4 100644 --- a/include/linux/dsa/8021q.h +++ b/include/linux/dsa/8021q.h @@ -64,6 +64,10 @@ int dsa_8021q_rx_source_port(u16 vid); u16 dsa_8021q_rx_subvlan(u16 vid); +bool vid_is_dsa_8021q_rxvlan(u16 vid); + +bool vid_is_dsa_8021q_txvlan(u16 vid); + bool vid_is_dsa_8021q(u16 vid); #else @@ -123,6 +127,16 @@ u16 dsa_8021q_rx_subvlan(u16 vid) return 0; } +bool vid_is_dsa_8021q_rxvlan(u16 vid) +{ + return false; +} + +bool vid_is_dsa_8021q_txvlan(u16 vid) +{ + return false; +} + bool vid_is_dsa_8021q(u16 vid) { return false; diff --git a/net/dsa/tag_8021q.c b/net/dsa/tag_8021q.c index 8e3e8a5b8559..008c1ec6e20c 100644 --- a/net/dsa/tag_8021q.c +++ b/net/dsa/tag_8021q.c @@ -133,10 +133,21 @@ u16 dsa_8021q_rx_subvlan(u16 vid) } EXPORT_SYMBOL_GPL(dsa_8021q_rx_subvlan); +bool vid_is_dsa_8021q_rxvlan(u16 vid) +{ + return (vid & DSA_8021Q_DIR_MASK) == DSA_8021Q_DIR_RX; +} +EXPORT_SYMBOL_GPL(vid_is_dsa_8021q_rxvlan); + +bool vid_is_dsa_8021q_txvlan(u16 vid) +{ + return (vid & DSA_8021Q_DIR_MASK) == DSA_8021Q_DIR_TX; +} +EXPORT_SYMBOL_GPL(vid_is_dsa_8021q_txvlan); + bool vid_is_dsa_8021q(u16 vid) { - return ((vid & DSA_8021Q_DIR_MASK) == DSA_8021Q_DIR_RX || - (vid & DSA_8021Q_DIR_MASK) == DSA_8021Q_DIR_TX); + return vid_is_dsa_8021q_rxvlan(vid) || vid_is_dsa_8021q_txvlan(vid); } EXPORT_SYMBOL_GPL(vid_is_dsa_8021q); From patchwork Tue Dec 22 13:44:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 346913 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0136C433E0 for ; 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Miller" , Jakub Kicinski , netdev@vger.kernel.org, UNGLinuxDriver@microchip.com Subject: [RFC PATCH v2 net-next 02/15] net: mscc: ocelot: export VCAP structures to include/soc/mscc Date: Tue, 22 Dec 2020 15:44:26 +0200 Message-Id: <20201222134439.2478449-3-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201222134439.2478449-1-vladimir.oltean@nxp.com> References: <20201222134439.2478449-1-vladimir.oltean@nxp.com> X-Originating-IP: [188.25.2.120] X-ClientProxiedBy: VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) To VI1PR04MB5696.eurprd04.prod.outlook.com (2603:10a6:803:e7::13) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (188.25.2.120) by VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.29 via Frontend Transport; Tue, 22 Dec 2020 13:44:54 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 4ed7e59c-3d1a-4320-ed5a-08d8a67fc415 X-MS-TrafficTypeDiagnostic: VE1PR04MB7408: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5236; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: pFo50mveQiRbqlKfbwUTvJo/VGt7qXU0W+IDXTfVLVA9vYx6llvOOcy4uI3coIHfQdMllVUUKmL6WX9+ZYIPPBO9xzFralRUE0Th9qM6t6DJ7I/mhUgWT2y3+pB5ngkDf2GsuydhEn5kENo1d7DnsU+Bnuyba3qJzIoemyInt79YMPFeb6iGOTbjIViudmSxJd9cF/uNvMcBFTqhxJ2Xk2m6G7WhuUk5j0xJ3tOcLeg/o/i5bnze034AnEvzq9TQeBF/gHL5ZCREEc4enhjIjobjRd0a5LL7bv1FDDksl/L05mnPODytuDnymeqYQ0dVku2sfR1YEBJhRDQt//OKOgVP+ZOTycQnpmkypZeat5zjz7zfl9J+JOVi2lcJwDtCCtkwN/qSq1gOCCs6EFDZpS3zJhLq1hHwd2JeStqP+Nsz9ix2I/8q7wYmB9n0l+wk X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:VI1PR04MB5696.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(52116002)(69590400010)(8676002)(956004)(186003)(4326008)(36756003)(2616005)(6512007)(498600001)(16526019)(44832011)(2906002)(83380400001)(8936002)(110136005)(54906003)(26005)(6666004)(66476007)(5660300002)(6486002)(86362001)(6506007)(30864003)(66946007)(1076003)(66556008); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: x8OBZ3LoHSOeFsAW1bOZZk/UOYUvHTnqQoVNyHUKAzGZ5Ad1GvcXmUyymvnIbgI+x4RGSpLOZ54N9TyejU0TuC8YOt4LB4lBpglgtWlSG9A5QMovu7zbPwrEvMkKS0HoTS3V+H+SLRTJ19pBrqqqh6eS3MizhZdaQ4FFVzZem8t+lQkHw1nvZgruzuLJUwKU43VnqOpMjVomcm1Dwd30jL4E3kTpZmJd/7kxQK3TibLeb0s1wX8ha7C8dIA6GnaGkBDmftKUGwOWVChE5xAK8aiXW7cvMenRZriNtB5r+/G1UxTeAteiOJj9I/al/x2yqqiloKDAzGCss7vMbGgdSIYnGaWRaqAF7CqQrDY7eznGM+3aupHDgDxNCZ5mNYbGZsJB+8o6W4i0ecwNGqOpE9Y8p7eOJgJA/57X3Rd7j2wmrcPebqPFLcRzueykyFOIrXnk8pBhHcIFDvncnYiNzVGolfF17roUYo5E42ZD5OeYy3mRTcSftUV/qu8iCw7xttnPw4LRe25xSNWeySesmBIQstABcdxXRUyoFWkyJV3fAFrrCNK86Kpt16pMC2/T7lAmUx72OOdA91SD74tWF6fEpyjbKyqO0S2k+YElhvHTCWFl837BL4nya6VNPfL4S4poEKUdbb5f3xJqMSrfetWLVc2cbF7w06+zoh0dF7gDI+m/nCk3uM5IKIyDCVQE2NMcN4wSX54L8zwM6Vk33DcevB9SEJQmgaPaYn2QRxX6T6tVxhnCJrPqhZ9eO5lyokiBuMC2G95sK5De1RjqUuVrG9MZKC2UIolI2MwK0d1QSFnz03kMGERvrLOil80KVOgiyN8cQl75Vesse1B64J+3NSXfiXLg5nys3w2VQkIY6pyv6Nr7GZWI2VP3g/uFEdiJ5QfChjQcKt9mzG1yRFwUT1fRvb+WndNz4wd79vsCORau5nZjLLaEFYNBe3FZWohriwM/EUwWmMIGnDZnEgSusbW5/tmJcNx1VUdcmVP4MuYqKsmAXYwAD4nZRze5 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5696.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2020 13:44:55.1515 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-Network-Message-Id: 4ed7e59c-3d1a-4320-ed5a-08d8a67fc415 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: sKXxdCeIcSoCJEjhz3D42L/6wZ9TpMe+/NxWTCv1K7Z/SYq5JurupUsnFLj9eI0F30D5SRB7zX830XET6TleAA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB7408 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The Felix driver will need to preinstall some VCAP filters for its tag_8021q implementation (outside of the tc-flower offload logic), so these need to be exported to the common includes. Signed-off-by: Vladimir Oltean --- Changes in v2: Patch is new. drivers/net/ethernet/mscc/ocelot_net.c | 1 + drivers/net/ethernet/mscc/ocelot_vcap.h | 293 +----------------------- include/soc/mscc/ocelot_vcap.h | 289 +++++++++++++++++++++++ 3 files changed, 292 insertions(+), 291 deletions(-) diff --git a/drivers/net/ethernet/mscc/ocelot_net.c b/drivers/net/ethernet/mscc/ocelot_net.c index 2bd2840d88bd..3a3bbd5e7883 100644 --- a/drivers/net/ethernet/mscc/ocelot_net.c +++ b/drivers/net/ethernet/mscc/ocelot_net.c @@ -5,6 +5,7 @@ */ #include +#include #include "ocelot.h" #include "ocelot_vcap.h" diff --git a/drivers/net/ethernet/mscc/ocelot_vcap.h b/drivers/net/ethernet/mscc/ocelot_vcap.h index 82fd10581a14..cfc8b976d1de 100644 --- a/drivers/net/ethernet/mscc/ocelot_vcap.h +++ b/drivers/net/ethernet/mscc/ocelot_vcap.h @@ -7,300 +7,11 @@ #define _MSCC_OCELOT_VCAP_H_ #include "ocelot.h" -#include "ocelot_police.h" -#include -#include +#include +#include #define OCELOT_POLICER_DISCARD 0x17f -struct ocelot_ipv4 { - u8 addr[4]; -}; - -enum ocelot_vcap_bit { - OCELOT_VCAP_BIT_ANY, - OCELOT_VCAP_BIT_0, - OCELOT_VCAP_BIT_1 -}; - -struct ocelot_vcap_u8 { - u8 value[1]; - u8 mask[1]; -}; - -struct ocelot_vcap_u16 { - u8 value[2]; - u8 mask[2]; -}; - -struct ocelot_vcap_u24 { - u8 value[3]; - u8 mask[3]; -}; - -struct ocelot_vcap_u32 { - u8 value[4]; - u8 mask[4]; -}; - -struct ocelot_vcap_u40 { - u8 value[5]; - u8 mask[5]; -}; - -struct ocelot_vcap_u48 { - u8 value[6]; - u8 mask[6]; -}; - -struct ocelot_vcap_u64 { - u8 value[8]; - u8 mask[8]; -}; - -struct ocelot_vcap_u128 { - u8 value[16]; - u8 mask[16]; -}; - -struct ocelot_vcap_vid { - u16 value; - u16 mask; -}; - -struct ocelot_vcap_ipv4 { - struct ocelot_ipv4 value; - struct ocelot_ipv4 mask; -}; - -struct ocelot_vcap_udp_tcp { - u16 value; - u16 mask; -}; - -struct ocelot_vcap_port { - u8 value; - u8 mask; -}; - -enum ocelot_vcap_key_type { - OCELOT_VCAP_KEY_ANY, - OCELOT_VCAP_KEY_ETYPE, - OCELOT_VCAP_KEY_LLC, - OCELOT_VCAP_KEY_SNAP, - OCELOT_VCAP_KEY_ARP, - OCELOT_VCAP_KEY_IPV4, - OCELOT_VCAP_KEY_IPV6 -}; - -struct ocelot_vcap_key_vlan { - struct ocelot_vcap_vid vid; /* VLAN ID (12 bit) */ - struct ocelot_vcap_u8 pcp; /* PCP (3 bit) */ - enum ocelot_vcap_bit dei; /* DEI */ - enum ocelot_vcap_bit tagged; /* Tagged/untagged frame */ -}; - -struct ocelot_vcap_key_etype { - struct ocelot_vcap_u48 dmac; - struct ocelot_vcap_u48 smac; - struct ocelot_vcap_u16 etype; - struct ocelot_vcap_u16 data; /* MAC data */ -}; - -struct ocelot_vcap_key_llc { - struct ocelot_vcap_u48 dmac; - struct ocelot_vcap_u48 smac; - - /* LLC header: DSAP at byte 0, SSAP at byte 1, Control at byte 2 */ - struct ocelot_vcap_u32 llc; -}; - -struct ocelot_vcap_key_snap { - struct ocelot_vcap_u48 dmac; - struct ocelot_vcap_u48 smac; - - /* SNAP header: Organization Code at byte 0, Type at byte 3 */ - struct ocelot_vcap_u40 snap; -}; - -struct ocelot_vcap_key_arp { - struct ocelot_vcap_u48 smac; - enum ocelot_vcap_bit arp; /* Opcode ARP/RARP */ - enum ocelot_vcap_bit req; /* Opcode request/reply */ - enum ocelot_vcap_bit unknown; /* Opcode unknown */ - enum ocelot_vcap_bit smac_match; /* Sender MAC matches SMAC */ - enum ocelot_vcap_bit dmac_match; /* Target MAC matches DMAC */ - - /**< Protocol addr. length 4, hardware length 6 */ - enum ocelot_vcap_bit length; - - enum ocelot_vcap_bit ip; /* Protocol address type IP */ - enum ocelot_vcap_bit ethernet; /* Hardware address type Ethernet */ - struct ocelot_vcap_ipv4 sip; /* Sender IP address */ - struct ocelot_vcap_ipv4 dip; /* Target IP address */ -}; - -struct ocelot_vcap_key_ipv4 { - enum ocelot_vcap_bit ttl; /* TTL zero */ - enum ocelot_vcap_bit fragment; /* Fragment */ - enum ocelot_vcap_bit options; /* Header options */ - struct ocelot_vcap_u8 ds; - struct ocelot_vcap_u8 proto; /* Protocol */ - struct ocelot_vcap_ipv4 sip; /* Source IP address */ - struct ocelot_vcap_ipv4 dip; /* Destination IP address */ - struct ocelot_vcap_u48 data; /* Not UDP/TCP: IP data */ - struct ocelot_vcap_udp_tcp sport; /* UDP/TCP: Source port */ - struct ocelot_vcap_udp_tcp dport; /* UDP/TCP: Destination port */ - enum ocelot_vcap_bit tcp_fin; - enum ocelot_vcap_bit tcp_syn; - enum ocelot_vcap_bit tcp_rst; - enum ocelot_vcap_bit tcp_psh; - enum ocelot_vcap_bit tcp_ack; - enum ocelot_vcap_bit tcp_urg; - enum ocelot_vcap_bit sip_eq_dip; /* SIP equals DIP */ - enum ocelot_vcap_bit sport_eq_dport; /* SPORT equals DPORT */ - enum ocelot_vcap_bit seq_zero; /* TCP sequence number is zero */ -}; - -struct ocelot_vcap_key_ipv6 { - struct ocelot_vcap_u8 proto; /* IPv6 protocol */ - struct ocelot_vcap_u128 sip; /* IPv6 source (byte 0-7 ignored) */ - struct ocelot_vcap_u128 dip; /* IPv6 destination (byte 0-7 ignored) */ - enum ocelot_vcap_bit ttl; /* TTL zero */ - struct ocelot_vcap_u8 ds; - struct ocelot_vcap_u48 data; /* Not UDP/TCP: IP data */ - struct ocelot_vcap_udp_tcp sport; - struct ocelot_vcap_udp_tcp dport; - enum ocelot_vcap_bit tcp_fin; - enum ocelot_vcap_bit tcp_syn; - enum ocelot_vcap_bit tcp_rst; - enum ocelot_vcap_bit tcp_psh; - enum ocelot_vcap_bit tcp_ack; - enum ocelot_vcap_bit tcp_urg; - enum ocelot_vcap_bit sip_eq_dip; /* SIP equals DIP */ - enum ocelot_vcap_bit sport_eq_dport; /* SPORT equals DPORT */ - enum ocelot_vcap_bit seq_zero; /* TCP sequence number is zero */ -}; - -enum ocelot_mask_mode { - OCELOT_MASK_MODE_NONE, - OCELOT_MASK_MODE_PERMIT_DENY, - OCELOT_MASK_MODE_POLICY, - OCELOT_MASK_MODE_REDIRECT, -}; - -enum ocelot_es0_tag { - OCELOT_NO_ES0_TAG, - OCELOT_ES0_TAG, - OCELOT_FORCE_PORT_TAG, - OCELOT_FORCE_UNTAG, -}; - -enum ocelot_tag_tpid_sel { - OCELOT_TAG_TPID_SEL_8021Q, - OCELOT_TAG_TPID_SEL_8021AD, -}; - -struct ocelot_vcap_action { - union { - /* VCAP ES0 */ - struct { - enum ocelot_es0_tag push_outer_tag; - enum ocelot_es0_tag push_inner_tag; - enum ocelot_tag_tpid_sel tag_a_tpid_sel; - int tag_a_vid_sel; - int tag_a_pcp_sel; - u16 vid_a_val; - u8 pcp_a_val; - u8 dei_a_val; - enum ocelot_tag_tpid_sel tag_b_tpid_sel; - int tag_b_vid_sel; - int tag_b_pcp_sel; - u16 vid_b_val; - u8 pcp_b_val; - u8 dei_b_val; - }; - - /* VCAP IS1 */ - struct { - bool vid_replace_ena; - u16 vid; - bool vlan_pop_cnt_ena; - int vlan_pop_cnt; - bool pcp_dei_ena; - u8 pcp; - u8 dei; - bool qos_ena; - u8 qos_val; - u8 pag_override_mask; - u8 pag_val; - }; - - /* VCAP IS2 */ - struct { - bool cpu_copy_ena; - u8 cpu_qu_num; - enum ocelot_mask_mode mask_mode; - unsigned long port_mask; - bool police_ena; - struct ocelot_policer pol; - u32 pol_ix; - }; - }; -}; - -struct ocelot_vcap_stats { - u64 bytes; - u64 pkts; - u64 used; -}; - -enum ocelot_vcap_filter_type { - OCELOT_VCAP_FILTER_DUMMY, - OCELOT_VCAP_FILTER_PAG, - OCELOT_VCAP_FILTER_OFFLOAD, -}; - -struct ocelot_vcap_filter { - struct list_head list; - - enum ocelot_vcap_filter_type type; - int block_id; - int goto_target; - int lookup; - u8 pag; - u16 prio; - u32 id; - - struct ocelot_vcap_action action; - struct ocelot_vcap_stats stats; - /* For VCAP IS1 and IS2 */ - unsigned long ingress_port_mask; - /* For VCAP ES0 */ - struct ocelot_vcap_port ingress_port; - struct ocelot_vcap_port egress_port; - - enum ocelot_vcap_bit dmac_mc; - enum ocelot_vcap_bit dmac_bc; - struct ocelot_vcap_key_vlan vlan; - - enum ocelot_vcap_key_type key_type; - union { - /* OCELOT_VCAP_KEY_ANY: No specific fields */ - struct ocelot_vcap_key_etype etype; - struct ocelot_vcap_key_llc llc; - struct ocelot_vcap_key_snap snap; - struct ocelot_vcap_key_arp arp; - struct ocelot_vcap_key_ipv4 ipv4; - struct ocelot_vcap_key_ipv6 ipv6; - } key; -}; - -int ocelot_vcap_filter_add(struct ocelot *ocelot, - struct ocelot_vcap_filter *rule, - struct netlink_ext_ack *extack); -int ocelot_vcap_filter_del(struct ocelot *ocelot, - struct ocelot_vcap_filter *rule); int ocelot_vcap_filter_stats_update(struct ocelot *ocelot, struct ocelot_vcap_filter *rule); struct ocelot_vcap_filter * diff --git a/include/soc/mscc/ocelot_vcap.h b/include/soc/mscc/ocelot_vcap.h index 96300adf3648..7f1b82fba63c 100644 --- a/include/soc/mscc/ocelot_vcap.h +++ b/include/soc/mscc/ocelot_vcap.h @@ -400,4 +400,293 @@ enum vcap_es0_action_field { VCAP_ES0_ACT_HIT_STICKY, }; +struct ocelot_ipv4 { + u8 addr[4]; +}; + +enum ocelot_vcap_bit { + OCELOT_VCAP_BIT_ANY, + OCELOT_VCAP_BIT_0, + OCELOT_VCAP_BIT_1 +}; + +struct ocelot_vcap_u8 { + u8 value[1]; + u8 mask[1]; +}; + +struct ocelot_vcap_u16 { + u8 value[2]; + u8 mask[2]; +}; + +struct ocelot_vcap_u24 { + u8 value[3]; + u8 mask[3]; +}; + +struct ocelot_vcap_u32 { + u8 value[4]; + u8 mask[4]; +}; + +struct ocelot_vcap_u40 { + u8 value[5]; + u8 mask[5]; +}; + +struct ocelot_vcap_u48 { + u8 value[6]; + u8 mask[6]; +}; + +struct ocelot_vcap_u64 { + u8 value[8]; + u8 mask[8]; +}; + +struct ocelot_vcap_u128 { + u8 value[16]; + u8 mask[16]; +}; + +struct ocelot_vcap_vid { + u16 value; + u16 mask; +}; + +struct ocelot_vcap_ipv4 { + struct ocelot_ipv4 value; + struct ocelot_ipv4 mask; +}; + +struct ocelot_vcap_udp_tcp { + u16 value; + u16 mask; +}; + +struct ocelot_vcap_port { + u8 value; + u8 mask; +}; + +enum ocelot_vcap_key_type { + OCELOT_VCAP_KEY_ANY, + OCELOT_VCAP_KEY_ETYPE, + OCELOT_VCAP_KEY_LLC, + OCELOT_VCAP_KEY_SNAP, + OCELOT_VCAP_KEY_ARP, + OCELOT_VCAP_KEY_IPV4, + OCELOT_VCAP_KEY_IPV6 +}; + +struct ocelot_vcap_key_vlan { + struct ocelot_vcap_vid vid; /* VLAN ID (12 bit) */ + struct ocelot_vcap_u8 pcp; /* PCP (3 bit) */ + enum ocelot_vcap_bit dei; /* DEI */ + enum ocelot_vcap_bit tagged; /* Tagged/untagged frame */ +}; + +struct ocelot_vcap_key_etype { + struct ocelot_vcap_u48 dmac; + struct ocelot_vcap_u48 smac; + struct ocelot_vcap_u16 etype; + struct ocelot_vcap_u16 data; /* MAC data */ +}; + +struct ocelot_vcap_key_llc { + struct ocelot_vcap_u48 dmac; + struct ocelot_vcap_u48 smac; + + /* LLC header: DSAP at byte 0, SSAP at byte 1, Control at byte 2 */ + struct ocelot_vcap_u32 llc; +}; + +struct ocelot_vcap_key_snap { + struct ocelot_vcap_u48 dmac; + struct ocelot_vcap_u48 smac; + + /* SNAP header: Organization Code at byte 0, Type at byte 3 */ + struct ocelot_vcap_u40 snap; +}; + +struct ocelot_vcap_key_arp { + struct ocelot_vcap_u48 smac; + enum ocelot_vcap_bit arp; /* Opcode ARP/RARP */ + enum ocelot_vcap_bit req; /* Opcode request/reply */ + enum ocelot_vcap_bit unknown; /* Opcode unknown */ + enum ocelot_vcap_bit smac_match; /* Sender MAC matches SMAC */ + enum ocelot_vcap_bit dmac_match; /* Target MAC matches DMAC */ + + /**< Protocol addr. length 4, hardware length 6 */ + enum ocelot_vcap_bit length; + + enum ocelot_vcap_bit ip; /* Protocol address type IP */ + enum ocelot_vcap_bit ethernet; /* Hardware address type Ethernet */ + struct ocelot_vcap_ipv4 sip; /* Sender IP address */ + struct ocelot_vcap_ipv4 dip; /* Target IP address */ +}; + +struct ocelot_vcap_key_ipv4 { + enum ocelot_vcap_bit ttl; /* TTL zero */ + enum ocelot_vcap_bit fragment; /* Fragment */ + enum ocelot_vcap_bit options; /* Header options */ + struct ocelot_vcap_u8 ds; + struct ocelot_vcap_u8 proto; /* Protocol */ + struct ocelot_vcap_ipv4 sip; /* Source IP address */ + struct ocelot_vcap_ipv4 dip; /* Destination IP address */ + struct ocelot_vcap_u48 data; /* Not UDP/TCP: IP data */ + struct ocelot_vcap_udp_tcp sport; /* UDP/TCP: Source port */ + struct ocelot_vcap_udp_tcp dport; /* UDP/TCP: Destination port */ + enum ocelot_vcap_bit tcp_fin; + enum ocelot_vcap_bit tcp_syn; + enum ocelot_vcap_bit tcp_rst; + enum ocelot_vcap_bit tcp_psh; + enum ocelot_vcap_bit tcp_ack; + enum ocelot_vcap_bit tcp_urg; + enum ocelot_vcap_bit sip_eq_dip; /* SIP equals DIP */ + enum ocelot_vcap_bit sport_eq_dport; /* SPORT equals DPORT */ + enum ocelot_vcap_bit seq_zero; /* TCP sequence number is zero */ +}; + +struct ocelot_vcap_key_ipv6 { + struct ocelot_vcap_u8 proto; /* IPv6 protocol */ + struct ocelot_vcap_u128 sip; /* IPv6 source (byte 0-7 ignored) */ + struct ocelot_vcap_u128 dip; /* IPv6 destination (byte 0-7 ignored) */ + enum ocelot_vcap_bit ttl; /* TTL zero */ + struct ocelot_vcap_u8 ds; + struct ocelot_vcap_u48 data; /* Not UDP/TCP: IP data */ + struct ocelot_vcap_udp_tcp sport; + struct ocelot_vcap_udp_tcp dport; + enum ocelot_vcap_bit tcp_fin; + enum ocelot_vcap_bit tcp_syn; + enum ocelot_vcap_bit tcp_rst; + enum ocelot_vcap_bit tcp_psh; + enum ocelot_vcap_bit tcp_ack; + enum ocelot_vcap_bit tcp_urg; + enum ocelot_vcap_bit sip_eq_dip; /* SIP equals DIP */ + enum ocelot_vcap_bit sport_eq_dport; /* SPORT equals DPORT */ + enum ocelot_vcap_bit seq_zero; /* TCP sequence number is zero */ +}; + +enum ocelot_mask_mode { + OCELOT_MASK_MODE_NONE, + OCELOT_MASK_MODE_PERMIT_DENY, + OCELOT_MASK_MODE_POLICY, + OCELOT_MASK_MODE_REDIRECT, +}; + +enum ocelot_es0_tag { + OCELOT_NO_ES0_TAG, + OCELOT_ES0_TAG, + OCELOT_FORCE_PORT_TAG, + OCELOT_FORCE_UNTAG, +}; + +enum ocelot_tag_tpid_sel { + OCELOT_TAG_TPID_SEL_8021Q, + OCELOT_TAG_TPID_SEL_8021AD, +}; + +struct ocelot_vcap_action { + union { + /* VCAP ES0 */ + struct { + enum ocelot_es0_tag push_outer_tag; + enum ocelot_es0_tag push_inner_tag; + enum ocelot_tag_tpid_sel tag_a_tpid_sel; + int tag_a_vid_sel; + int tag_a_pcp_sel; + u16 vid_a_val; + u8 pcp_a_val; + u8 dei_a_val; + enum ocelot_tag_tpid_sel tag_b_tpid_sel; + int tag_b_vid_sel; + int tag_b_pcp_sel; + u16 vid_b_val; + u8 pcp_b_val; + u8 dei_b_val; + }; + + /* VCAP IS1 */ + struct { + bool vid_replace_ena; + u16 vid; + bool vlan_pop_cnt_ena; + int vlan_pop_cnt; + bool pcp_dei_ena; + u8 pcp; + u8 dei; + bool qos_ena; + u8 qos_val; + u8 pag_override_mask; + u8 pag_val; + }; + + /* VCAP IS2 */ + struct { + bool cpu_copy_ena; + u8 cpu_qu_num; + enum ocelot_mask_mode mask_mode; + unsigned long port_mask; + bool police_ena; + struct ocelot_policer pol; + u32 pol_ix; + }; + }; +}; + +struct ocelot_vcap_stats { + u64 bytes; + u64 pkts; + u64 used; +}; + +enum ocelot_vcap_filter_type { + OCELOT_VCAP_FILTER_DUMMY, + OCELOT_VCAP_FILTER_PAG, + OCELOT_VCAP_FILTER_OFFLOAD, +}; + +struct ocelot_vcap_filter { + struct list_head list; + + enum ocelot_vcap_filter_type type; + int block_id; + int goto_target; + int lookup; + u8 pag; + u16 prio; + u32 id; + + struct ocelot_vcap_action action; + struct ocelot_vcap_stats stats; + /* For VCAP IS1 and IS2 */ + unsigned long ingress_port_mask; + /* For VCAP ES0 */ + struct ocelot_vcap_port ingress_port; + struct ocelot_vcap_port egress_port; + + enum ocelot_vcap_bit dmac_mc; + enum ocelot_vcap_bit dmac_bc; + struct ocelot_vcap_key_vlan vlan; + + enum ocelot_vcap_key_type key_type; + union { + /* OCELOT_VCAP_KEY_ANY: No specific fields */ + struct ocelot_vcap_key_etype etype; + struct ocelot_vcap_key_llc llc; + struct ocelot_vcap_key_snap snap; + struct ocelot_vcap_key_arp arp; + struct ocelot_vcap_key_ipv4 ipv4; + struct ocelot_vcap_key_ipv6 ipv6; + } key; +}; + +int ocelot_vcap_filter_add(struct ocelot *ocelot, + struct ocelot_vcap_filter *rule, + struct netlink_ext_ack *extack); +int ocelot_vcap_filter_del(struct ocelot *ocelot, + struct ocelot_vcap_filter *rule); + #endif /* _OCELOT_VCAP_H_ */ From patchwork Tue Dec 22 13:44:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 346912 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0597FC433E0 for ; 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dkim=none (message not signed) header.d=none;lunn.ch; dmarc=none action=none header.from=nxp.com; Received: from VI1PR04MB5696.eurprd04.prod.outlook.com (2603:10a6:803:e7::13) by VE1PR04MB7408.eurprd04.prod.outlook.com (2603:10a6:800:1b3::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.25; Tue, 22 Dec 2020 13:44:57 +0000 Received: from VI1PR04MB5696.eurprd04.prod.outlook.com ([fe80::2dd6:8dc:2da7:ad84]) by VI1PR04MB5696.eurprd04.prod.outlook.com ([fe80::2dd6:8dc:2da7:ad84%5]) with mapi id 15.20.3676.033; Tue, 22 Dec 2020 13:44:57 +0000 From: Vladimir Oltean To: Andrew Lunn , Florian Fainelli , Vivien Didelot Cc: Richard Cochran , Claudiu Manoil , Alexandru Marginean , Alexandre Belloni , Xiaoliang Yang , Hongbo Wang , Po Liu , Yangbo Lu , "David S . Miller" , Jakub Kicinski , netdev@vger.kernel.org, UNGLinuxDriver@microchip.com Subject: [RFC PATCH v2 net-next 04/15] net: dsa: felix: add new VLAN-based tagger Date: Tue, 22 Dec 2020 15:44:28 +0200 Message-Id: <20201222134439.2478449-5-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201222134439.2478449-1-vladimir.oltean@nxp.com> References: <20201222134439.2478449-1-vladimir.oltean@nxp.com> X-Originating-IP: [188.25.2.120] X-ClientProxiedBy: VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) To VI1PR04MB5696.eurprd04.prod.outlook.com (2603:10a6:803:e7::13) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (188.25.2.120) by VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.29 via Frontend Transport; Tue, 22 Dec 2020 13:44:56 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 6c259ee3-a18f-4ac5-1005-08d8a67fc552 X-MS-TrafficTypeDiagnostic: VE1PR04MB7408: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:10000; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: xQSRcqHnpCC551PwGq4qkyawhzB4OizsW8bHXy920bUuUBqkO+nRoWLHJhPHFvZzdm/v3dCxfdJDJIQa+cJF/tVjY8GQgPGSMeO209qzgi41vhX5JejwsbDgDQOW73tIorCkmeeJ+C0Bg+AQlYMyoMn4CRoaEzaKKGzJPNlPpEFBy/6RGVwPTF/b3u/U2ET/TAoLbsX79AOVqQlyRy8TS7xM7+m7qmA6N+S/izGEibRYwaMHUML+4WjQVkcV5BMDbcbOY0EpU0DXPXuwPjm9Whvp3EqSm3lUZGXpJxyUShrsqyuhAs8naJZMzlHvHBD75f4XubgE8XOhViQD6huoCbTg5+o2XueXXYpNVHshrzc/KrgHSIbHuv+R9YuB8Hlw8Y72SX8fOb/koiL399ab6MtelG5GXxiw/jCDb4VrPFIINZ6059iGpvaxBbe4COCYnxWIjoc6ds7/xGOJQiERfA== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:VI1PR04MB5696.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(52116002)(69590400010)(8676002)(956004)(186003)(4326008)(36756003)(2616005)(6512007)(498600001)(16526019)(44832011)(2906002)(83380400001)(8936002)(110136005)(54906003)(26005)(6666004)(66476007)(5660300002)(6486002)(86362001)(6506007)(30864003)(66946007)(1076003)(66556008); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: 7EMId5EyO/m5/aIw/fyP4tWqi0xK0R/b+6Jc+VXCq14It6rH8nz75jd3W46T5eGA1foxJodByBghR66jDP28JXNVnZv4sDiCcP1qgOgMp/G6gkgKFtoKQ/ukXT/JOZbJC6R824VfF8x1SasFdPN3isUF4XtCEiUFQsjZbgbO8ejVxfoZr5J3GkTtffg1d4S8UP2mxxNrVS67Yww0E6K9ti22syNd3LQMAA/BM9/ZepXiN5TB3IhCCiH+snw0zxVJiIHdjrBekU0Is6Af5s8Licl/IMs8kxXl+ETpQbTQoEod6wym1WxjySVuD3mJxLVQ89pvk0iJud3X+q0Z/HiNtfqGyxMljzOgl8lyBbwtSahTEqyQFHQEZ8zlND3rpj1JK3lxG9gaFOQyj8/+01uZWgBVwkkjkoHcE/FNGb7zt+iK6f5u/KG9I1xExyGTu/KfF0EXmiAwh9QAH76WM+FP3Jis6Cc758KhZhnMKWh0QT4+OzE2NlPJVLAKeKZ21qKIAg4S4AK4M+/oJwAvqeDTEMKzp98DRZ6Ld4Gl3Ilm2Y83nzNI5MQtsOikSEQlOPsDqsvc9yKeGHWRE16NxdYq6FJu8Yaz9FLyNrDRrT0GA5PRZlbzTuXJ06MOZnEGjI8djVa5Fyj3aALvsQ9dCS5YsVCrC8hLA0yCBjekagUQe51/hQXlAscXIGGLc3jLBgrqmBasSN4uBt2rI5UtJYh/8XIgQ/59t9j7ptP2gGNh2g2PXRsH0DHzJsBm5BHznfJ8DcWFOEywFWUAjzixHgS4ZHVFHKX3Q+Tv2TMl12zqc312LRENV9yHQL5LmBtH3KttMuv44nTn8KqMxehcPZPw8bsVTwObDzI/6ciIe6WVKfTz6xRlpz7awfsgeuJy3+eh5/jdlg/6853w8m2Y2EulTj24c/7bzOU8wMDzqYRMF6AFiGxjJ8TQ1ZFcHB7nKRjKywj82v/UkFbnf8TWFsvF3capfjG3vpkGQ9fsqKzEDycOfRXc9AJovrlWktX3J+f8 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5696.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2020 13:44:57.2993 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-Network-Message-Id: 6c259ee3-a18f-4ac5-1005-08d8a67fc552 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: qzD2tkTooV6D1FIGm12KixRxZugcBV+L2ZtM/U24Vrk8+kyalWbjV7FNvjd24P2GdppUDuBa+oL22izLy1cF/g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB7408 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org There are use cases for which the existing tagger, based on the NPI (Node Processor Interface) functionality, is insufficient. Namely: - Frames injected through the NPI port bypass the frame analyzer, so no source address learning is performed, no TSN stream classification, etc. - Flow control is not functional over an NPI port (PAUSE frames are encapsulated in the same Extraction Frame Header as all other frames) - There can be at most one NPI port configured for an Ocelot switch. But in NXP LS1028A and T1040 there are two Ethernet CPU ports. The non-NPI port is currently either disabled, or operated as a plain user port (albeit an internally-facing one). Having the ability to configure the two CPU ports symmetrically could pave the way for e.g. creating a LAG between them, to increase bandwidth seamlessly for the system. So, there is a desire to have an alternative to the NPI mode. This patch brings an implementation of the software-defined tag_8021q.c tagger format, which also preserves full functionality under a vlan_filtering bridge (unlike sja1105, the only other user of tag_8021q). It does this by using the TCAM engines for: - pushing the RX VLAN as a second, outer tag, on egress towards the CPU port - redirecting towards the correct front port based on TX VLAN and popping that on egress Signed-off-by: Vladimir Oltean --- Changes in v2: Clean up the hardcoding of random VCAP filter IDs and the inclusion of a private ocelot header. MAINTAINERS | 1 + drivers/net/dsa/ocelot/Kconfig | 4 +- drivers/net/dsa/ocelot/Makefile | 5 + drivers/net/dsa/ocelot/felix.c | 108 +++++++++++++-- drivers/net/dsa/ocelot/felix.h | 1 + drivers/net/dsa/ocelot/felix_tag_8021q.c | 166 +++++++++++++++++++++++ drivers/net/dsa/ocelot/felix_tag_8021q.h | 20 +++ drivers/net/ethernet/mscc/ocelot.c | 18 ++- include/soc/mscc/ocelot.h | 1 + net/dsa/Kconfig | 34 +++++ net/dsa/Makefile | 3 +- net/dsa/tag_ocelot_8021q.c | 61 +++++++++ 12 files changed, 399 insertions(+), 23 deletions(-) create mode 100644 drivers/net/dsa/ocelot/felix_tag_8021q.c create mode 100644 drivers/net/dsa/ocelot/felix_tag_8021q.h create mode 100644 net/dsa/tag_ocelot_8021q.c diff --git a/MAINTAINERS b/MAINTAINERS index a355db292486..a9cb0b659c00 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12736,6 +12736,7 @@ F: drivers/net/dsa/ocelot/* F: drivers/net/ethernet/mscc/ F: include/soc/mscc/ocelot* F: net/dsa/tag_ocelot.c +F: net/dsa/tag_ocelot_8021q.c F: tools/testing/selftests/drivers/net/ocelot/* OCXL (Open Coherent Accelerator Processor Interface OpenCAPI) DRIVER diff --git a/drivers/net/dsa/ocelot/Kconfig b/drivers/net/dsa/ocelot/Kconfig index c110e82a7973..ab8de14c4dae 100644 --- a/drivers/net/dsa/ocelot/Kconfig +++ b/drivers/net/dsa/ocelot/Kconfig @@ -2,11 +2,11 @@ config NET_DSA_MSCC_FELIX tristate "Ocelot / Felix Ethernet switch support" depends on NET_DSA && PCI + depends on NET_DSA_TAG_OCELOT_NPI || NET_DSA_TAG_OCELOT_8021Q depends on NET_VENDOR_MICROSEMI depends on NET_VENDOR_FREESCALE depends on HAS_IOMEM select MSCC_OCELOT_SWITCH_LIB - select NET_DSA_TAG_OCELOT select FSL_ENETC_MDIO select PCS_LYNX help @@ -16,10 +16,10 @@ config NET_DSA_MSCC_FELIX config NET_DSA_MSCC_SEVILLE tristate "Ocelot / Seville Ethernet switch support" depends on NET_DSA + depends on NET_DSA_TAG_OCELOT_NPI || NET_DSA_TAG_OCELOT_8021Q depends on NET_VENDOR_MICROSEMI depends on HAS_IOMEM select MSCC_OCELOT_SWITCH_LIB - select NET_DSA_TAG_OCELOT select PCS_LYNX help This driver supports the VSC9953 (Seville) switch, which is embedded diff --git a/drivers/net/dsa/ocelot/Makefile b/drivers/net/dsa/ocelot/Makefile index f6dd131e7491..e9ea8c0331d8 100644 --- a/drivers/net/dsa/ocelot/Makefile +++ b/drivers/net/dsa/ocelot/Makefile @@ -9,3 +9,8 @@ mscc_felix-objs := \ mscc_seville-objs := \ felix.o \ seville_vsc9953.o + +ifdef CONFIG_NET_DSA_TAG_OCELOT_8021Q +mscc_felix-objs += felix_tag_8021q.o +mscc_seville-objs += felix_tag_8021q.o +endif diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c index 7dc230677b78..77f73c6bad0b 100644 --- a/drivers/net/dsa/ocelot/felix.c +++ b/drivers/net/dsa/ocelot/felix.c @@ -23,6 +23,7 @@ #include #include #include "felix.h" +#include "felix_tag_8021q.h" static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds, int port, @@ -439,6 +440,7 @@ static int felix_init_structs(struct felix *felix, int num_phys_ports) { struct ocelot *ocelot = &felix->ocelot; phy_interface_t *port_phy_modes; + enum ocelot_tag_prefix prefix; struct resource res; int port, i, err; @@ -448,6 +450,11 @@ static int felix_init_structs(struct felix *felix, int num_phys_ports) if (!ocelot->ports) return -ENOMEM; + if (IS_ENABLED(CONFIG_NET_DSA_TAG_OCELOT_NPI)) + prefix = OCELOT_TAG_PREFIX_SHORT; + else if (IS_ENABLED(CONFIG_NET_DSA_TAG_OCELOT_8021Q)) + prefix = OCELOT_TAG_PREFIX_NONE; + ocelot->map = felix->info->map; ocelot->stats_layout = felix->info->stats_layout; ocelot->num_stats = felix->info->num_stats; @@ -455,8 +462,8 @@ static int felix_init_structs(struct felix *felix, int num_phys_ports) ocelot->num_mact_rows = felix->info->num_mact_rows; ocelot->vcap = felix->info->vcap; ocelot->ops = felix->info->ops; - ocelot->inj_prefix = OCELOT_TAG_PREFIX_SHORT; - ocelot->xtr_prefix = OCELOT_TAG_PREFIX_SHORT; + ocelot->inj_prefix = prefix; + ocelot->xtr_prefix = prefix; port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t), GFP_KERNEL); @@ -578,6 +585,15 @@ static void felix_npi_port_init(struct ocelot *ocelot, int port) ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0); } +static void felix_8021q_cpu_port_init(struct ocelot *ocelot, int port) +{ + ocelot->dsa_8021q_cpu = port; + + /* Overwrite PGID_CPU with the non-tagging port */ + ocelot_write_rix(ocelot, BIT(ocelot->dsa_8021q_cpu), + ANA_PGID_PGID, PGID_CPU); +} + /* Hardware initialization done here so that we can allocate structures with * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing * us to allocate structures twice (leak memory) and map PCI memory twice @@ -587,7 +603,7 @@ static int felix_setup(struct dsa_switch *ds) { struct ocelot *ocelot = ds->priv; struct felix *felix = ocelot_to_felix(ocelot); - int port, err; + int port, cpu = -1, err; err = felix_init_structs(felix, ds->num_ports); if (err) @@ -607,10 +623,20 @@ static int felix_setup(struct dsa_switch *ds) } for (port = 0; port < ds->num_ports; port++) { + if (dsa_is_unused_port(ds, port)) + continue; + ocelot_init_port(ocelot, port); - if (dsa_is_cpu_port(ds, port)) - felix_npi_port_init(ocelot, port); + cpu = dsa_upstream_port(ds, port); + if (port == cpu) + continue; + + /* Allow forwarding to and from the CPU port */ + ocelot_rmw_rix(ocelot, BIT(cpu), BIT(cpu), + ANA_PGID_PGID, PGID_SRC + port); + ocelot_rmw_rix(ocelot, BIT(port), BIT(port), + ANA_PGID_PGID, PGID_SRC + cpu); /* Set the default QoS Classification based on PCP and DEI * bits of vlan tag. @@ -618,14 +644,70 @@ static int felix_setup(struct dsa_switch *ds) felix_port_qos_map_init(ocelot, port); } - /* Include the CPU port module in the forwarding mask for unknown - * unicast - the hardware default value for ANA_FLOODING_FLD_UNICAST - * excludes BIT(ocelot->num_phys_ports), and so does ocelot_init, since - * Ocelot relies on whitelisting MAC addresses towards PGID_CPU. - */ - ocelot_write_rix(ocelot, - ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)), - ANA_PGID_PGID, PGID_UC); + if (IS_ENABLED(CONFIG_NET_DSA_TAG_OCELOT_NPI)) { + unsigned long flood_mask = BIT(ocelot->num_phys_ports); + + felix_npi_port_init(ocelot, cpu); + + /* Include the CPU port module (and indirectly, the NPI port) + * in the forwarding mask for unknown unicast - the hardware + * default value for ANA_FLOODING_FLD_UNICAST excludes + * BIT(ocelot->num_phys_ports), and so does ocelot_init, + * since Ocelot relies on whitelisting MAC addresses towards + * PGID_CPU. + * We do this because DSA does not yet perform RX filtering, + * and the NPI port does not perform source address learning, + * so traffic sent to Linux is effectively unknown from the + * switch's perspective. + */ + for (port = 0; port < ds->num_ports; port++) { + if (dsa_is_unused_port(ds, port)) + continue; + + flood_mask |= BIT(port); + } + + ocelot_write_rix(ocelot, ANA_PGID_PGID_PGID(flood_mask), + ANA_PGID_PGID, PGID_UC); + } else if (IS_ENABLED(CONFIG_NET_DSA_TAG_OCELOT_8021Q)) { + unsigned long flood_mask = 0; + + felix_8021q_cpu_port_init(ocelot, cpu); + + for (port = 0; port < ds->num_ports; port++) { + if (dsa_is_unused_port(ds, port)) + continue; + + flood_mask |= BIT(port); + + /* This overwrites ocelot_init(): + * Do not forward BPDU frames to the CPU port module, + * for 2 reasons: + * - When these packets are injected from the tag_8021q + * CPU port, we want them to go out, not loop back + * into the system. + * - STP traffic ingressing on a user port should go to + * the tag_8021q CPU port, not to the hardware CPU + * port module. + */ + ocelot_write_gix(ocelot, + ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0), + ANA_PORT_CPU_FWD_BPDU_CFG, port); + } + + /* In tag_8021q mode, the CPU port module is unused. So we + * want to disable flooding of any kind to the CPU port module + * (which is BIT(ocelot->num_phys_ports)). + */ + ocelot_write_rix(ocelot, ANA_PGID_PGID_PGID(flood_mask), + ANA_PGID_PGID, PGID_UC); + ocelot_write_rix(ocelot, ANA_PGID_PGID_PGID(flood_mask), + ANA_PGID_PGID, PGID_MC); + + err = felix_setup_8021q_tagging(ocelot); + if (err) + return err; + } ds->mtu_enforcement_ingress = true; ds->configure_vlan_while_not_filtering = true; diff --git a/drivers/net/dsa/ocelot/felix.h b/drivers/net/dsa/ocelot/felix.h index 4c717324ac2f..71f343326c00 100644 --- a/drivers/net/dsa/ocelot/felix.h +++ b/drivers/net/dsa/ocelot/felix.h @@ -50,6 +50,7 @@ struct felix { struct lynx_pcs **pcs; resource_size_t switch_base; resource_size_t imdio_base; + struct dsa_8021q_context *dsa_8021q_ctx; }; struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port); diff --git a/drivers/net/dsa/ocelot/felix_tag_8021q.c b/drivers/net/dsa/ocelot/felix_tag_8021q.c new file mode 100644 index 000000000000..f209273bbf69 --- /dev/null +++ b/drivers/net/dsa/ocelot/felix_tag_8021q.c @@ -0,0 +1,166 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright 2020 NXP Semiconductors + * + * An implementation of the software-defined tag_8021q.c tagger format, which + * also preserves full functionality under a vlan_filtering bridge. It does + * this by using the TCAM engines for: + * - pushing the RX VLAN as a second, outer tag, on egress towards the CPU port + * - redirecting towards the correct front port based on TX VLAN and popping + * that on egress + */ +#include +#include +#include +#include "felix.h" +#include "felix_tag_8021q.h" + +static int felix_tag_8021q_rxvlan_add(struct ocelot *ocelot, int port, u16 vid, + bool pvid, bool untagged) +{ + const struct vcap_props *vcap = &ocelot->vcap[VCAP_ES0]; + int key_length = vcap->keys[VCAP_ES0_IGR_PORT].length; + struct ocelot_vcap_filter *outer_tagging_rule; + + /* We don't need to install the rxvlan into the other ports' filtering + * tables, because we're just pushing the rxvlan when sending towards + * the CPU + */ + if (!pvid) + return 0; + + outer_tagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter), + GFP_KERNEL); + if (!outer_tagging_rule) + return -ENOMEM; + + outer_tagging_rule->key_type = OCELOT_VCAP_KEY_ANY; + outer_tagging_rule->prio = 1; + outer_tagging_rule->id.cookie = port; + outer_tagging_rule->id.tc_offload = false; + outer_tagging_rule->block_id = VCAP_ES0; + outer_tagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD; + outer_tagging_rule->lookup = 0; + outer_tagging_rule->ingress_port.value = port; + outer_tagging_rule->ingress_port.mask = GENMASK(key_length - 1, 0); + outer_tagging_rule->egress_port.value = ocelot->dsa_8021q_cpu; + outer_tagging_rule->egress_port.mask = GENMASK(key_length - 1, 0); + outer_tagging_rule->action.push_outer_tag = OCELOT_ES0_TAG; + outer_tagging_rule->action.tag_a_tpid_sel = OCELOT_TAG_TPID_SEL_8021AD; + outer_tagging_rule->action.tag_a_vid_sel = 1; + outer_tagging_rule->action.vid_a_val = vid; + + return ocelot_vcap_filter_add(ocelot, outer_tagging_rule, NULL); +} + +static int felix_tag_8021q_txvlan_add(struct ocelot *ocelot, int port, u16 vid, + bool pvid, bool untagged) +{ + struct ocelot_vcap_filter *untagging_rule; + struct ocelot_vcap_filter *redirect_rule; + int ret; + + /* tag_8021q.c assumes we are implementing this via port VLAN + * membership, which we aren't. So we don't need to add any VCAP filter + * for the CPU port. + */ + if (port == ocelot->dsa_8021q_cpu) + return 0; + + untagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL); + if (!untagging_rule) + return -ENOMEM; + + redirect_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL); + if (!redirect_rule) { + kfree(untagging_rule); + return -ENOMEM; + } + + untagging_rule->key_type = OCELOT_VCAP_KEY_ANY; + untagging_rule->ingress_port_mask = BIT(ocelot->dsa_8021q_cpu); + untagging_rule->vlan.vid.value = vid; + untagging_rule->vlan.vid.mask = VLAN_VID_MASK; + untagging_rule->prio = 1; + untagging_rule->id.cookie = port; + untagging_rule->id.tc_offload = false; + untagging_rule->block_id = VCAP_IS1; + untagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD; + untagging_rule->lookup = 0; + untagging_rule->action.vlan_pop_cnt_ena = true; + untagging_rule->action.vlan_pop_cnt = 1; + untagging_rule->action.pag_override_mask = 0xff; + untagging_rule->action.pag_val = port; + + ret = ocelot_vcap_filter_add(ocelot, untagging_rule, NULL); + if (ret) { + kfree(untagging_rule); + kfree(redirect_rule); + return ret; + } + + redirect_rule->key_type = OCELOT_VCAP_KEY_ANY; + redirect_rule->ingress_port_mask = BIT(ocelot->dsa_8021q_cpu); + redirect_rule->pag = port; + redirect_rule->prio = 1; + redirect_rule->id.cookie = port; + redirect_rule->id.tc_offload = false; + redirect_rule->block_id = VCAP_IS2; + redirect_rule->type = OCELOT_VCAP_FILTER_OFFLOAD; + redirect_rule->lookup = 0; + redirect_rule->action.mask_mode = OCELOT_MASK_MODE_REDIRECT; + redirect_rule->action.port_mask = BIT(port); + + ret = ocelot_vcap_filter_add(ocelot, redirect_rule, NULL); + if (ret) { + ocelot_vcap_filter_del(ocelot, untagging_rule); + kfree(redirect_rule); + return ret; + } + + return 0; +} + +static int felix_tag_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid, + u16 flags) +{ + bool untagged = flags & BRIDGE_VLAN_INFO_UNTAGGED; + bool pvid = flags & BRIDGE_VLAN_INFO_PVID; + struct ocelot *ocelot = ds->priv; + + if (vid_is_dsa_8021q_rxvlan(vid)) + return felix_tag_8021q_rxvlan_add(ocelot, port, vid, pvid, + untagged); + + if (vid_is_dsa_8021q_txvlan(vid)) + return felix_tag_8021q_txvlan_add(ocelot, port, vid, pvid, + untagged); + + return 0; +} + +static const struct dsa_8021q_ops felix_tag_8021q_ops = { + .vlan_add = felix_tag_8021q_vlan_add, +}; + +int felix_setup_8021q_tagging(struct ocelot *ocelot) +{ + struct felix *felix = ocelot_to_felix(ocelot); + struct dsa_switch *ds = felix->ds; + int ret; + + felix->dsa_8021q_ctx = devm_kzalloc(ds->dev, + sizeof(*felix->dsa_8021q_ctx), + GFP_KERNEL); + if (!felix->dsa_8021q_ctx) + return -ENOMEM; + + felix->dsa_8021q_ctx->ops = &felix_tag_8021q_ops; + felix->dsa_8021q_ctx->proto = htons(ETH_P_8021AD); + felix->dsa_8021q_ctx->ds = ds; + + rtnl_lock(); + ret = dsa_8021q_setup(felix->dsa_8021q_ctx, true); + rtnl_unlock(); + + return ret; +} diff --git a/drivers/net/dsa/ocelot/felix_tag_8021q.h b/drivers/net/dsa/ocelot/felix_tag_8021q.h new file mode 100644 index 000000000000..47684a18c96e --- /dev/null +++ b/drivers/net/dsa/ocelot/felix_tag_8021q.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright 2020 NXP Semiconductors + */ +#ifndef _MSCC_FELIX_TAG_8021Q_H +#define _MSCC_FELIX_TAG_8021Q_H + +#if IS_ENABLED(CONFIG_NET_DSA_TAG_OCELOT_8021Q) + +int felix_setup_8021q_tagging(struct ocelot *ocelot); + +#else + +static inline int felix_setup_8021q_tagging(struct ocelot *ocelot) +{ + return -EOPNOTSUPP; +} + +#endif /* IS_ENABLED(CONFIG_NET_DSA_TAG_OCELOT_8021Q) */ + +#endif /* _MSCC_FELIX_TAG_8021Q_H */ diff --git a/drivers/net/ethernet/mscc/ocelot.c b/drivers/net/ethernet/mscc/ocelot.c index 0b9992bd6626..be4671bfe95f 100644 --- a/drivers/net/ethernet/mscc/ocelot.c +++ b/drivers/net/ethernet/mscc/ocelot.c @@ -911,8 +911,13 @@ void ocelot_bridge_stp_state_set(struct ocelot *ocelot, int port, u8 state) * a source for the other ports. */ for (p = 0; p < ocelot->num_phys_ports; p++) { + unsigned long mask = 0; + + if (p == ocelot->dsa_8021q_cpu) + continue; + if (ocelot->bridge_fwd_mask & BIT(p)) { - unsigned long mask = ocelot->bridge_fwd_mask & ~BIT(p); + mask = ocelot->bridge_fwd_mask & ~BIT(p); for (i = 0; i < ocelot->num_phys_ports; i++) { unsigned long bond_mask = ocelot->lags[i]; @@ -925,13 +930,12 @@ void ocelot_bridge_stp_state_set(struct ocelot *ocelot, int port, u8 state) break; } } - - ocelot_write_rix(ocelot, mask, - ANA_PGID_PGID, PGID_SRC + p); - } else { - ocelot_write_rix(ocelot, 0, - ANA_PGID_PGID, PGID_SRC + p); } + + if (ocelot->dsa_8021q_cpu >= 0) + mask |= ocelot->dsa_8021q_cpu; + + ocelot_write_rix(ocelot, mask, ANA_PGID_PGID, PGID_SRC + p); } } EXPORT_SYMBOL(ocelot_bridge_stp_state_set); diff --git a/include/soc/mscc/ocelot.h b/include/soc/mscc/ocelot.h index 2f4cd3288bcc..4cbb7655ef0c 100644 --- a/include/soc/mscc/ocelot.h +++ b/include/soc/mscc/ocelot.h @@ -631,6 +631,7 @@ struct ocelot { u8 num_phys_ports; int npi; + int dsa_8021q_cpu; enum ocelot_tag_prefix inj_prefix; enum ocelot_tag_prefix xtr_prefix; diff --git a/net/dsa/Kconfig b/net/dsa/Kconfig index dfecd7b22fd7..a4ff1385d270 100644 --- a/net/dsa/Kconfig +++ b/net/dsa/Kconfig @@ -111,6 +111,40 @@ config NET_DSA_TAG_OCELOT Say Y or M if you want to enable support for tagging frames for the Ocelot switches (VSC7511, VSC7512, VSC7513, VSC7514, VSC9959). +choice + prompt "Tagging format" + depends on NET_DSA_TAG_OCELOT + default NET_DSA_TAG_OCELOT_NPI + help + Choose the tagging format for frames delivered by the Ocelot + switches to the CPU. + +config NET_DSA_TAG_OCELOT_NPI + bool "Native tagging over NPI" + help + Say Y if you want to enable NPI tagging for the Ocelot switches. + In this mode, the frames over the Ethernet CPU port are prepended + with a hardware-defined injection/extraction frame header. + Flow control (PAUSE frames) over the CPU port is not supported + when operating in this mode. + + If unsure, say Y. + +config NET_DSA_TAG_OCELOT_8021Q + bool "VLAN-based tagging" + select NET_DSA_TAG_8021Q + help + Say Y if you want to enable support for tagging frames with a custom + VLAN-based header. Frames that require timestamping, such as PTP, are + not delivered over Ethernet but over register-based MMIO. Flow + control over the CPU port is functional in this mode. When using this + mode, less TCAM resources (VCAP IS1, IS2, ES0) are available for use + with tc-flower. + + If unsure, say N. + +endchoice + config NET_DSA_TAG_QCA tristate "Tag driver for Qualcomm Atheros QCA8K switches" help diff --git a/net/dsa/Makefile b/net/dsa/Makefile index 0fb2b75a7ae3..0e0d828fec51 100644 --- a/net/dsa/Makefile +++ b/net/dsa/Makefile @@ -14,7 +14,8 @@ obj-$(CONFIG_NET_DSA_TAG_KSZ) += tag_ksz.o obj-$(CONFIG_NET_DSA_TAG_RTL4_A) += tag_rtl4_a.o obj-$(CONFIG_NET_DSA_TAG_LAN9303) += tag_lan9303.o obj-$(CONFIG_NET_DSA_TAG_MTK) += tag_mtk.o -obj-$(CONFIG_NET_DSA_TAG_OCELOT) += tag_ocelot.o +obj-$(CONFIG_NET_DSA_TAG_OCELOT_NPI) += tag_ocelot.o +obj-$(CONFIG_NET_DSA_TAG_OCELOT_8021Q) += tag_ocelot_8021q.o obj-$(CONFIG_NET_DSA_TAG_QCA) += tag_qca.o obj-$(CONFIG_NET_DSA_TAG_SJA1105) += tag_sja1105.o obj-$(CONFIG_NET_DSA_TAG_TRAILER) += tag_trailer.o diff --git a/net/dsa/tag_ocelot_8021q.c b/net/dsa/tag_ocelot_8021q.c new file mode 100644 index 000000000000..fa89c6a5bb7d --- /dev/null +++ b/net/dsa/tag_ocelot_8021q.c @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright 2020 NXP Semiconductors + */ +#include +#include "dsa_priv.h" + +static struct sk_buff *ocelot_xmit(struct sk_buff *skb, + struct net_device *netdev) +{ + struct dsa_port *dp = dsa_slave_to_port(netdev); + u16 tx_vid = dsa_8021q_tx_vid(dp->ds, dp->index); + u16 queue_mapping = skb_get_queue_mapping(skb); + u8 pcp = netdev_txq_to_tc(netdev, queue_mapping); + + return dsa_8021q_xmit(skb, netdev, ETH_P_8021Q, + ((pcp << VLAN_PRIO_SHIFT) | tx_vid)); +} + +static struct sk_buff *ocelot_rcv(struct sk_buff *skb, + struct net_device *netdev, + struct packet_type *pt) +{ + int src_port, switch_id, qos_class; + u16 vid, tci; + + skb_push_rcsum(skb, ETH_HLEN); + if (skb_vlan_tag_present(skb)) { + tci = skb_vlan_tag_get(skb); + __vlan_hwaccel_clear_tag(skb); + } else { + __skb_vlan_pop(skb, &tci); + } + skb_pull_rcsum(skb, ETH_HLEN); + + vid = tci & VLAN_VID_MASK; + src_port = dsa_8021q_rx_source_port(vid); + switch_id = dsa_8021q_rx_switch_id(vid); + qos_class = (tci & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT; + + skb->dev = dsa_master_find_slave(netdev, switch_id, src_port); + if (!skb->dev) + return NULL; + + skb->offload_fwd_mark = 1; + skb->priority = qos_class; + + return skb; +} + +static struct dsa_device_ops ocelot_netdev_ops = { + .name = "ocelot", + .proto = DSA_TAG_PROTO_OCELOT, + .xmit = ocelot_xmit, + .rcv = ocelot_rcv, + .overhead = VLAN_HLEN, +}; + +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_OCELOT); + +module_dsa_tag_driver(ocelot_netdev_ops); From patchwork Tue Dec 22 13:44:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 346911 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 485C6C433E6 for ; Tue, 22 Dec 2020 13:46:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 16CB523103 for ; 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Miller" , Jakub Kicinski , netdev@vger.kernel.org, UNGLinuxDriver@microchip.com Subject: [RFC PATCH v2 net-next 06/15] net: mscc: ocelot: only drain extraction queue on error Date: Tue, 22 Dec 2020 15:44:30 +0200 Message-Id: <20201222134439.2478449-7-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201222134439.2478449-1-vladimir.oltean@nxp.com> References: <20201222134439.2478449-1-vladimir.oltean@nxp.com> X-Originating-IP: [188.25.2.120] X-ClientProxiedBy: VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) To VI1PR04MB5696.eurprd04.prod.outlook.com (2603:10a6:803:e7::13) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (188.25.2.120) by VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.29 via Frontend Transport; Tue, 22 Dec 2020 13:44:58 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: b7cab140-b285-4576-7f5e-08d8a67fc663 X-MS-TrafficTypeDiagnostic: VE1PR04MB7408: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bcyEw6ZwLO8OeeU6mhE7msUA9IDlRPlZoFr42vv5WvZURewyKdhO2ihrXZrnriSa6iWjIbxDP0MayJdCYVYM6bCKOYlieSr316wzfe+nY6B7Mqf0keslbnPHHIZs4LNuU1B+pvFm1wAfEwk4hMwgssplPlNnizVV2vCeO49MEwoV86jl2aFUHUyyI++a3yg9rctYRW7r7+X0pKOrteRVdzEts8S3804g9YjF6KRy8s0XqiM+kbZ7TDDJpZQ3Zda0yZoc+Sl8NPzJiKNV+qAKRKIwnsmpaILogkG6OWDWKYOTUmONPw1iCtdKYRNVEhXcbzQ48xCIrPXIRKJWfZ1jQKV6w1LLg0Ych/mIW17xs9OGSCzQ481cZEhnahNOawCskuder28oqHB+9BtotcSIAMU/M8FewFHcAH4SatoBO1m6Yp5dMqI7RhuIhxTgams0O3Wc53xig2cqx3Xq9Ql0rg== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:VI1PR04MB5696.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(52116002)(69590400010)(8676002)(956004)(186003)(4326008)(36756003)(2616005)(6512007)(498600001)(16526019)(44832011)(2906002)(83380400001)(8936002)(110136005)(54906003)(26005)(6666004)(66476007)(5660300002)(6486002)(86362001)(6506007)(66946007)(1076003)(66556008); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: 4gmueqGKC+hpZ8mPqZySMtkxo+Za9M6nJbaK8NIX5uU2EFdJfIFEkLgo0wyLrbg8/dBu0q/qA+BykOGtcBmulJ5fiz6fXJV6bMNGrBe9G4zw2/isRQbw/Ncf2kgvO0GHcoWDssw1UNCyEmnvLsZkk6m1jqYGIDe2vPC/jrYDmcOHRNqk/JsEVtwQdMsGwRnEMZkRWmvwEbSkUIu8f83Tj5pyT2vZHtqvL4LjcUTkqVrih4JX1MW8MDq5yiShOPjoPJUw6yNhEOPNKYGM8ygFogn/mfIGCdCfBB7FmiG5xWbjqpTDsUF0Q3ITieslh2Lj11CV3Bz7D2RvWuJbSbvaUoaYhUed0Ff7mb63lpeK7zTW/fnqn0MWVE+SHkpC/1OrnXyQnAQdLyON6fd61CPXQPCKKtyj2s6R0MyPuu0bZTpp1wwmcHLbIGrhVpBiPo2hH4Wxfxt2pbOoQ8nl6cmUUhcPsvdcqzM3QqHmG5pTTQr4sJZGc/mHyENH2fR4ZHLaMtZD4a2hS8+OrEDfJXJ2VBA/k9DSlK4MnuC8arzQiEHH5yN5IvI+1QnVvKhQwz3e1Ii/jUhuuOdjVsaoSBMnkDupzT6XVHBM7hfAlE9iPGT6eFHU35KfdMbXjm1cQJDlqy/ONfGiIwmluWOCTQTcsgLRQL70lVMMxKNlD1tslyveQ1h2UYZHazFAb4fcV23uW50HQ0Z7gxdQKl+hzZ3q0KV7N1v/yzdhI6/uEhPnnQR1ZcaT97lMTHSrgdUie9pmvz6izqgmCNG2x4QJ6IiwBbjb1IpL1+vyGuGwoZiannSsszdi+Ou/0CVJNdLxXwT6t9R0kA4WujIJElRtIz91IlRAhy9FmyyhdktRMVlC2t3uD3hZf/My5ivlC8nqj6xS3/xhZq84k5KHPo/faifgLnaMpeGyOn37XKdPEGPi07rFtAGzIwkfZ6YEswrJnfsjzuTbfIb3C7Pv//Ll3cVCspDhEMag/vhuwKulcKDPTBnnyhBos742M8KZp9oa5o3t X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5696.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2020 13:44:59.0792 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-Network-Message-Id: b7cab140-b285-4576-7f5e-08d8a67fc663 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 6Mc5MH9ikpeYo7SzqcnerHwYyh8aM4wJAki2MbG95uCa3Ka0dYArFp2dkfGAz3ECp/qBLiANRFJGYpneMf7vuQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB7408 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org It appears that the intention of this snippet of code is to not exit ocelot_xtr_irq_handler() while in the middle of extracting a frame. The problem in extracting it word by word is that future extraction attempts are really easy to get desynchronized, since the IRQ handler assumes that the first 16 bytes are the IFH, which give further information about the frame, such as frame length. But during normal operation, "err" will not be 0, but 4, set from here: for (i = 0; i < OCELOT_TAG_LEN / 4; i++) { err = ocelot_rx_frame_word(ocelot, grp, true, &ifh[i]); if (err != 4) break; } if (err != 4) break; In that case, draining the extraction queue is a no-op. So explicitly make this code execute only on negative err. Signed-off-by: Vladimir Oltean --- Changes in v2: Patch is new. drivers/net/ethernet/mscc/ocelot_vsc7514.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mscc/ocelot_vsc7514.c b/drivers/net/ethernet/mscc/ocelot_vsc7514.c index 00c6d9838970..ed632dd79245 100644 --- a/drivers/net/ethernet/mscc/ocelot_vsc7514.c +++ b/drivers/net/ethernet/mscc/ocelot_vsc7514.c @@ -702,7 +702,7 @@ static irqreturn_t ocelot_xtr_irq_handler(int irq, void *arg) dev->stats.rx_packets++; } - if (err) + if (err < 0) while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp)) ocelot_read_rix(ocelot, QS_XTR_RD, grp); From patchwork Tue Dec 22 13:44:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 346910 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6A94C433E6 for ; Tue, 22 Dec 2020 13:46:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BE1EA23105 for ; Tue, 22 Dec 2020 13:46:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727435AbgLVNqo (ORCPT ); Tue, 22 Dec 2020 08:46:44 -0500 Received: from mail-eopbgr70089.outbound.protection.outlook.com ([40.107.7.89]:35431 "EHLO EUR04-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727377AbgLVNqm (ORCPT ); Tue, 22 Dec 2020 08:46:42 -0500 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Ut2Z5rhHMj9VKMFbm75IQr7ORO90c/NHrEOBIzQU/cH0SQCdqeaABDe7px2fAbEWNCY43YBVgcmScRQOzUlbzB6bWvkKisGEmnTVUu9MfLqbi2MlpUeiATFUlJR6PBAbM/W7ZZ+8tlGLa1RJJcCLXeHabccV7XcBKzsxkWTLgAllZ/dHGi0y0WjXh+497mQaRWINpgxkh+02y80/LIZBZhN13Iseqls/0/8F71vdcXt/pCVqqwDxEAGz+0j5CBzkrYVyVVVxIrt8Xa9i+Yg62B+18nrLNiMXLqmjyfm68IabeZljAIBABCm/o3eerAi+dPX9eqXSxdedb8aJ1o/X6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=j9QDmrt2i1e7NOxu9jGYSWG/E4mUywvq5IcTM12+mtE=; b=WSicxYRiMY5rmSV9EhpO39Ky6axugBCe20T4yMsjm+R3am9Mp28iw24n8bbRGN4BMNe3TF3ABaij671Dn1amqCHjrSe9tDvO2Fi5iq1syH77OoDDjJxWkcdt9HiULwSc/o8O9qIGrX7PATu4gOOqgR75IOLlHmcINmJvzmiTP2KD2QEAusjpUfW6qE8vsk6TIcLSw7a8IItmpKXqMRPuAbNwA17VsxK3NzehmjTQTeUENxWTKrEobdovC//lwMdYWYFUzrOWUZyhs1nV7zfuaMmfGNwKVcscnhVsq1XoH5buesUYeGr/Cl27WQwihPFSK7H57M8ADHl9UK4SlFkKvA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=j9QDmrt2i1e7NOxu9jGYSWG/E4mUywvq5IcTM12+mtE=; b=nEEtEmVtS/U0mZ2aUDls2KtIP+/Wg/+CToq+cocz5zIn5YjU/FQgB+Oy3q84BXHpdLBRnW/FjuCdVCwXluVqoeyKp9Z3/su8DDn4lx1AtdTktZAwBnT1u/Z5ZyYvTgq6bsCYJGLTd3ZeDIS3EWRzhRSbtoFsQlE4Gut0JUCi7z4= Authentication-Results: lunn.ch; dkim=none (message not signed) header.d=none;lunn.ch; dmarc=none action=none header.from=nxp.com; Received: from VI1PR04MB5696.eurprd04.prod.outlook.com (2603:10a6:803:e7::13) by VE1PR04MB7408.eurprd04.prod.outlook.com (2603:10a6:800:1b3::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.25; Tue, 22 Dec 2020 13:45:01 +0000 Received: from VI1PR04MB5696.eurprd04.prod.outlook.com ([fe80::2dd6:8dc:2da7:ad84]) by VI1PR04MB5696.eurprd04.prod.outlook.com ([fe80::2dd6:8dc:2da7:ad84%5]) with mapi id 15.20.3676.033; Tue, 22 Dec 2020 13:45:01 +0000 From: Vladimir Oltean To: Andrew Lunn , Florian Fainelli , Vivien Didelot Cc: Richard Cochran , Claudiu Manoil , Alexandru Marginean , Alexandre Belloni , Xiaoliang Yang , Hongbo Wang , Po Liu , Yangbo Lu , "David S . Miller" , Jakub Kicinski , netdev@vger.kernel.org, UNGLinuxDriver@microchip.com Subject: [RFC PATCH v2 net-next 09/15] net: mscc: ocelot: use DIV_ROUND_UP helper in ocelot_port_inject_frame Date: Tue, 22 Dec 2020 15:44:33 +0200 Message-Id: <20201222134439.2478449-10-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201222134439.2478449-1-vladimir.oltean@nxp.com> References: <20201222134439.2478449-1-vladimir.oltean@nxp.com> X-Originating-IP: [188.25.2.120] X-ClientProxiedBy: VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) To VI1PR04MB5696.eurprd04.prod.outlook.com (2603:10a6:803:e7::13) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (188.25.2.120) by VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.29 via Frontend Transport; Tue, 22 Dec 2020 13:45:00 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 1e74b275-f04e-4dc7-a73f-08d8a67fc7d1 X-MS-TrafficTypeDiagnostic: VE1PR04MB7408: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:747; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: o0ZLr5/rnmsbtN9/SI8aGORtdZrbfbSkTzXr/pFqWMmdXKbhsOn5b5grGg7ifwKPwEqn1bcDRq87PABNTvnadutbI6grlfpaaGVHF7NWVLgqDuUsazcwUVrJxq/gGjjr7bYAoL042QIF6fL2cNPLU//x8WwIXN0MrRMK+2MUA3tPY1V/cg1E8St5r7MEFpbJB2/2aQdXsIZeeUUfMMqlNFCZBTQb2FXVjVpw6i9gZyr9xqOBfBuAtFI2l1ckrGcSibIpfnBtahVmHpBBzH7Vtf7ZTORNWJgY9OW/s+NbTfp1tKCJn/GYi3+tTS6LjlU6TMfyF2UvkbQucLpYjapPz0wpewti8DFFWAJDY3XB5ui0TN8Rl29uxlW+zjklcEM+lsiVQwDhC9F/J/am7fgNmh4A+pxrvg7dMxQ8d5Ib1sVQuif3C3B0rPUm/b0R07cIljQxnF1N5ymt00mDDAtNsg== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:VI1PR04MB5696.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(52116002)(69590400010)(8676002)(956004)(186003)(4326008)(36756003)(2616005)(6512007)(498600001)(16526019)(44832011)(2906002)(83380400001)(8936002)(110136005)(54906003)(26005)(6666004)(66476007)(5660300002)(6486002)(86362001)(6506007)(66946007)(1076003)(4744005)(66556008); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: JhOrydke4NDnIz2N2tTyCyaml5pV+rPDLKu0bohwnHOkpNQJ+bWKJaBPAO5ah5+rOzzRMUbZ1mtiN1J9UwQaWMQiYaMh26I6UGJhwcSaPWUoXFKGcB5A2j8WaWsw/oZVKKmQT3RZZ8EmQSsanmSWZmdd+rnmW+H82FdNhEPos6mKXFzv1hQN6vQtQG/bYLgoEG9NYXcMYBoypDHyE9oL315xtbvvHBRE9uLYyemhCZWC7/XRP5TMl7ZtJ5XYvUsnJ9xIzTKdkvgHvt8Hmmep6xUZc5gHaOfq/9pwS/toAXwoFaIJ/HKu0ACk/AKob6yjIhHCO3iUZoYXS7ZKya9H4PHg0RlYZFZ2Y4m+bDIMKe1TAC5254IO7ro9xkVYL2tivNt5NSQKigKC/2m9sDPowXD5BbspL901jJJtwT8ZDdeZqO3xNhtFlDaLVQMD83/LKNHQeup2/DgIUBgq/OzQUhkkDI6eilblnVb28pZTUoP5mhLB2bdncWHyR/x6ObuP9rKGABMMGgV+mrcGJ48f8jRCG3T1+aJ2J2V2Tt3mtyXaS3OmRz1RyhoAX0HQMdzpFaFaclEGtzK8LztmtwjBFQqGP2UgBnJbPAoED5NwsdtxhHu1J4Wkd8VbCyIY2Ro66hbeN5FmaI9Ze33sGOWkE4PO+GQNsPMTRa2YstXNrBoKqBGAnmqpdA5q9/LvhXuhviOmCLDEwj2F+AD+fTzCSB2Ju02GgHktBcNB9Te/x0Ia6wCAKoK+3BZcDf4ZEdPv+gPux2pOgCbpYRg3ULzHPsr+7bgxB9cVAdilfh7ZQFhaEJ2cKPFbX2QeGdpkCArt4ycqbOywiNyWUUvegYttISAPPAjBODSTqK5milyAO2Xr//0PTHIVF/5vG0UxlUW3F8COSjSr4cXWWVIJRHXP15/cxFbtezYxS5KzyHT0xwFvN1FfeyBhQfDSWZNr4Oq6BF6wpN96izGe3+HoyQkZV3wq1hqiqtvPKHOjsB8ODT8QEE4Jx+L+PxRHhA+65RR/ X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5696.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2020 13:45:01.5309 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-Network-Message-Id: 1e74b275-f04e-4dc7-a73f-08d8a67fc7d1 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: m4HWZflInsQPz9lsfWSyRFwIFgvpYs913b79Rev4EaPSvklXEM7kRBIo2yehyx7e99v016541qlOdEZKZsefag== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB7408 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This looks a bit nicer than the open-coded "(x + 3) % 4" idiom. Signed-off-by: Vladimir Oltean --- Changes in v2: Patch is new. drivers/net/ethernet/mscc/ocelot_net.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mscc/ocelot_net.c b/drivers/net/ethernet/mscc/ocelot_net.c index 3a3bbd5e7883..7cc0fcd1df8d 100644 --- a/drivers/net/ethernet/mscc/ocelot_net.c +++ b/drivers/net/ethernet/mscc/ocelot_net.c @@ -386,7 +386,7 @@ static int ocelot_port_xmit(struct sk_buff *skb, struct net_device *dev) ocelot_write_rix(ocelot, (__force u32)cpu_to_be32(ifh[i]), QS_INJ_WR, grp); - count = (skb->len + 3) / 4; + count = DIV_ROUND_UP(skb->len, 4); last = skb->len % 4; for (i = 0; i < count; i++) ocelot_write_rix(ocelot, ((u32 *)skb->data)[i], QS_INJ_WR, grp); From patchwork Tue Dec 22 13:44:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 346909 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B36BC433DB for ; Tue, 22 Dec 2020 13:47:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3A1B323103 for ; Tue, 22 Dec 2020 13:47:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727459AbgLVNq7 (ORCPT ); Tue, 22 Dec 2020 08:46:59 -0500 Received: from mail-eopbgr70042.outbound.protection.outlook.com ([40.107.7.42]:47547 "EHLO EUR04-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727301AbgLVNq6 (ORCPT ); Tue, 22 Dec 2020 08:46:58 -0500 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=TzqAEQ8AmCIGAWKYVQ4UXc2z2EHTl/AUkgtu+YF4iBqF0fMKakJNBF9Z98QATU85xjJ9b+/HcZSlOUK8MqoGpVBD5+O666mvfyjTPhZ3dXGCMs4EGZOItgZKxrhEGev/HJqaN57xZAVYnwNGChAI/QzLlxEFj92x7TRT31gXf4iB7ufQiTcLiOnCaSptrF5UKP7+oFoO4mbgPvmorgapzivT6gwFOhxWqzQ3hVDMdGu0YdV9msC0i/4hiUfSAM05hOGXIATqHvCPLv1OYqbv1IBZRTigHFx3AD/5iezV1kjXlxAR8tOwnrgmeZlPD62amyRB+KHpTrQ2N2ARK8D0pg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=XdZ8F7p3/C0TLMp/aAxe+MnBlSUZ4lgUKryXWa/5zOk=; b=mqLPqn1k7pPAY+dbQ2DxDKL1jQqvjwcWSCH0RS2RL+JnOZJ0wbWHxiYLGbXi6iVYuBEjkUUjL2HJGPk403fDmtY+bkiDZni3IHB0igA1d7bH6BwQft+5CQ1xBa8GALKmL7Jc0lQLXcocZRxldxrczVGv1vaBYmWmLkFqKjeGBBgWJou91q6L1DSFC2eq+qQxHr9JO6/ZlFRrxOrtGom5RdZOUNXhBSrhJ2uM6ubP3fIFfSIgnn1cDCdytnPtHTJs/NCQpjjKN3CBiUxQURCF3VMU1W1/7NzWzjKOYjsNFyb7e1SxqSnEkdPJeEs3/e2d1OVpottR+778MSPbmxdClw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=XdZ8F7p3/C0TLMp/aAxe+MnBlSUZ4lgUKryXWa/5zOk=; b=Y15uJ8U8EWfB3xtJiJeJ6HmXwBd/lcOsxLZb5oErw6H7jvyQoqS+juXUuGso/fyzy4+3lng+VoSR5xdKChc3EZy1UG15M5ASShZgELNPXlsP7L8NypC1we+y7rqwcsIEAGs1t9HiF5CtbGUrO2X0EhV5W3Uv+Fv0k/YGlyga08U= Authentication-Results: lunn.ch; dkim=none (message not signed) header.d=none;lunn.ch; dmarc=none action=none header.from=nxp.com; Received: from VI1PR04MB5696.eurprd04.prod.outlook.com (2603:10a6:803:e7::13) by VE1PR04MB7408.eurprd04.prod.outlook.com (2603:10a6:800:1b3::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.25; Tue, 22 Dec 2020 13:45:02 +0000 Received: from VI1PR04MB5696.eurprd04.prod.outlook.com ([fe80::2dd6:8dc:2da7:ad84]) by VI1PR04MB5696.eurprd04.prod.outlook.com ([fe80::2dd6:8dc:2da7:ad84%5]) with mapi id 15.20.3676.033; Tue, 22 Dec 2020 13:45:02 +0000 From: Vladimir Oltean To: Andrew Lunn , Florian Fainelli , Vivien Didelot Cc: Richard Cochran , Claudiu Manoil , Alexandru Marginean , Alexandre Belloni , Xiaoliang Yang , Hongbo Wang , Po Liu , Yangbo Lu , "David S . Miller" , Jakub Kicinski , netdev@vger.kernel.org, UNGLinuxDriver@microchip.com Subject: [RFC PATCH v2 net-next 10/15] net: mscc: ocelot: refactor ocelot_port_inject_frame out of ocelot_port_xmit Date: Tue, 22 Dec 2020 15:44:34 +0200 Message-Id: <20201222134439.2478449-11-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201222134439.2478449-1-vladimir.oltean@nxp.com> References: <20201222134439.2478449-1-vladimir.oltean@nxp.com> X-Originating-IP: [188.25.2.120] X-ClientProxiedBy: VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) To VI1PR04MB5696.eurprd04.prod.outlook.com (2603:10a6:803:e7::13) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (188.25.2.120) by VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.29 via Frontend Transport; Tue, 22 Dec 2020 13:45:01 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: bc5d7e0f-f279-420e-6502-08d8a67fc860 X-MS-TrafficTypeDiagnostic: VE1PR04MB7408: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6108; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bxrUqYuVyTxGgl+BF+iu3/ROjigzeOXQYDec2S9P3H263OAD7sXbGKqc1ipZtHa7Z/1EwNVhmVxXU3SCa//NWQh92sb/TpEr9dCtkyje9cp538OJIQKkpxqnNGNP8YAK+1gV1nog1VTTsvh6QPlCTxA1Vlx3Fa/ujiiS/A4KKqdLYw9/7dioSZJKmjI7zCjMWEnEDf8c0Tz38IaKiugiPpeGLVMcAXF9/r/q2+DwXnw9QF2hDMKEBUU6/H83kKJZUuT0P36MZmHqCPc4z02vGmO4ClKbt2aQj1nTwyR1EIaDIP+hCs8iRuxGq+Xhtb3utLQKOIIe1XF64+z2RDi1wQRBJIBKxjwS16cwW/zzQycSj9IXmiIHEwKIh+aG2lKiaUNS0hpl2UOc2btS8fmpHEsa3yTiIJhFHVHmFxLbSmKrHkDjIkhETp+He1OtVHX6BW/+HYrdztTNnX9/xppXNg== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:VI1PR04MB5696.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(52116002)(69590400010)(8676002)(956004)(186003)(4326008)(36756003)(2616005)(6512007)(498600001)(16526019)(44832011)(2906002)(83380400001)(8936002)(110136005)(54906003)(26005)(6666004)(66476007)(5660300002)(6486002)(86362001)(6506007)(66946007)(1076003)(66556008); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: HQ/w90Oi9+V8CRg04M971JOUDo1+njJzZl6mqAzhlDgOaoe9gLPCtasz2wfy463wZCQAW9aJbmibqqIt/eIVRJ0uXzdUrxPw1PDHlFZCZ2/vHsSFKzg/fzo2avhBmtTyxAVH62BA8ubK/WD/a7ZqjjSIQ+0cSoHUeMv1yvXy+NrKYjyGza46VJ0Q0VLMU+1HEJJ1l9xS2vAgIYI8jusaMn/nxncfcqEWmc97iHlgmCLPj38OOcAfHy0AqAvrda67XPjt0QoluV8uhloArLcNA8nkKVj/tOw4B4tQ+NtlyZrccQqHhJUruiPRVzFokn72eTkVJiNnkSeR4X7iwvqkEYNeMp/0xcbe2L+XoFiRU449fqz9kYCMtat2N2tyxc32NUiXcLJvboVv0jTTE7wRzzOqdQDkmyKezCyiLZqV8mmA/SUrNu35w3xtLmE7TUNfv1ueFkGd8Cs7ey/demXrG0Ryy4SskxPQDjs3PNB9zdrTIXgBz0huq4Ofc0RVRNZO6K8u4C/gdfSoZRuXjLckamTsUqL2dt5XQgbvuLNfpnYUr2f22JiE8MtbfvhEKDufBohJCJnoXpY+IyNXx+OfJ4G4QLL/5cli6yHcEDUXc1Tzopnuk0+vtVVMCOb6JUSQ7wpn307+gWXK1JiusKdGT1KGGgZCsDnL24KuM0nGA9VYiF84uUXEF1suaUqBodoLjzwAMJPi9L1s+qGwyDueWLzZsQRpTzMrfQJRpG4PyZrzQodCUY0FVZDFqiuvC9Nt1bn+QO4u1uCyBNhyuHDaDs3fqRT1QAGHBVMFcC3AyduXp41M3wA8+lTrKtt0J/edvjjlw1mvh/0NFgKzqK/t01+5JCyvxSQz4UYqAjzIBTkojzIhQSkI+XEi77Wg5I+Fz7jWSgrqsCz+4SLX/9dTsO+PEVBecZ9OtkYYYUN+5BseD6PbIiGB4nc1J+OGz0z36JTtC8TNTO+StOxzpd374vdVNLNOCnMObgkoX+x16ouGUw2J5tSJhxJNt6bcGl/s X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5696.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2020 13:45:02.4183 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-Network-Message-Id: bc5d7e0f-f279-420e-6502-08d8a67fc860 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: J7hXl9wW00GB3jKxkwkfr3KzCDFd4+tqndQceEJUVHPj4NwKNSeimJrSiixaBE5nKeO+dGziCbXrMtFeUpEUnQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB7408 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The felix DSA driver will inject some frames through register MMIO, same as ocelot switchdev currently does. So we need to be able to reuse the common code. Signed-off-by: Vladimir Oltean --- Changes in v2: Patch is new. drivers/net/ethernet/mscc/ocelot.c | 78 +++++++++++++++++++++++++ drivers/net/ethernet/mscc/ocelot.h | 4 ++ drivers/net/ethernet/mscc/ocelot_net.c | 81 +++----------------------- 3 files changed, 89 insertions(+), 74 deletions(-) diff --git a/drivers/net/ethernet/mscc/ocelot.c b/drivers/net/ethernet/mscc/ocelot.c index be4671bfe95f..52f6c986aef0 100644 --- a/drivers/net/ethernet/mscc/ocelot.c +++ b/drivers/net/ethernet/mscc/ocelot.c @@ -566,6 +566,84 @@ void ocelot_get_txtstamp(struct ocelot *ocelot) } EXPORT_SYMBOL(ocelot_get_txtstamp); +/* Generate the IFH for frame injection + * + * The IFH is a 128bit-value + * bit 127: bypass the analyzer processing + * bit 56-67: destination mask + * bit 28-29: pop_cnt: 3 disables all rewriting of the frame + * bit 20-27: cpu extraction queue mask + * bit 16: tag type 0: C-tag, 1: S-tag + * bit 0-11: VID + */ +static int ocelot_gen_ifh(u32 *ifh, struct frame_info *info) +{ + ifh[0] = IFH_INJ_BYPASS | ((0x1ff & info->rew_op) << 21); + ifh[1] = (0xf00 & info->port) >> 8; + ifh[2] = (0xff & info->port) << 24; + ifh[3] = (info->tag_type << 16) | info->vid; + + return 0; +} + +bool ocelot_can_inject(struct ocelot *ocelot, int grp) +{ + u32 val = ocelot_read(ocelot, QS_INJ_STATUS); + + if (!(val & QS_INJ_STATUS_FIFO_RDY(BIT(grp)))) + return false; + if (val & QS_INJ_STATUS_WMARK_REACHED(BIT(grp))) + return false; + + return true; +} + +void ocelot_port_inject_frame(struct ocelot *ocelot, int port, int grp, + u32 rew_op, struct sk_buff *skb) +{ + struct frame_info info = {}; + u32 ifh[OCELOT_TAG_LEN / 4]; + unsigned int i, count, last; + + ocelot_write_rix(ocelot, QS_INJ_CTRL_GAP_SIZE(1) | + QS_INJ_CTRL_SOF, QS_INJ_CTRL, grp); + + info.port = BIT(port); + info.tag_type = IFH_TAG_TYPE_C; + info.vid = skb_vlan_tag_get(skb); + info.rew_op = rew_op; + + ocelot_gen_ifh(ifh, &info); + + for (i = 0; i < OCELOT_TAG_LEN / 4; i++) + ocelot_write_rix(ocelot, (__force u32)cpu_to_be32(ifh[i]), + QS_INJ_WR, grp); + + count = DIV_ROUND_UP(skb->len, 4); + last = skb->len % 4; + for (i = 0; i < count; i++) + ocelot_write_rix(ocelot, ((u32 *)skb->data)[i], QS_INJ_WR, grp); + + /* Add padding */ + while (i < (OCELOT_BUFFER_CELL_SZ / 4)) { + ocelot_write_rix(ocelot, 0, QS_INJ_WR, grp); + i++; + } + + /* Indicate EOF and valid bytes in last word */ + ocelot_write_rix(ocelot, QS_INJ_CTRL_GAP_SIZE(1) | + QS_INJ_CTRL_VLD_BYTES(skb->len < OCELOT_BUFFER_CELL_SZ ? 0 : last) | + QS_INJ_CTRL_EOF, + QS_INJ_CTRL, grp); + + /* Add dummy CRC */ + ocelot_write_rix(ocelot, 0, QS_INJ_WR, grp); + skb_tx_timestamp(skb); + + skb->dev->stats.tx_packets++; + skb->dev->stats.tx_bytes += skb->len; +} + int ocelot_fdb_add(struct ocelot *ocelot, int port, const unsigned char *addr, u16 vid) { diff --git a/drivers/net/ethernet/mscc/ocelot.h b/drivers/net/ethernet/mscc/ocelot.h index 291d39d49c4e..e7685a58b7e2 100644 --- a/drivers/net/ethernet/mscc/ocelot.h +++ b/drivers/net/ethernet/mscc/ocelot.h @@ -126,6 +126,10 @@ void ocelot_set_cpu_port(struct ocelot *ocelot, int cpu, enum ocelot_tag_prefix injection, enum ocelot_tag_prefix extraction); +bool ocelot_can_inject(struct ocelot *ocelot, int grp); +void ocelot_port_inject_frame(struct ocelot *ocelot, int port, int grp, + u32 rew_op, struct sk_buff *skb); + extern struct notifier_block ocelot_netdevice_nb; extern struct notifier_block ocelot_switchdev_nb; extern struct notifier_block ocelot_switchdev_blocking_nb; diff --git a/drivers/net/ethernet/mscc/ocelot_net.c b/drivers/net/ethernet/mscc/ocelot_net.c index 7cc0fcd1df8d..942eb56535b7 100644 --- a/drivers/net/ethernet/mscc/ocelot_net.c +++ b/drivers/net/ethernet/mscc/ocelot_net.c @@ -311,53 +311,20 @@ static int ocelot_port_stop(struct net_device *dev) return 0; } -/* Generate the IFH for frame injection - * - * The IFH is a 128bit-value - * bit 127: bypass the analyzer processing - * bit 56-67: destination mask - * bit 28-29: pop_cnt: 3 disables all rewriting of the frame - * bit 20-27: cpu extraction queue mask - * bit 16: tag type 0: C-tag, 1: S-tag - * bit 0-11: VID - */ -static int ocelot_gen_ifh(u32 *ifh, struct frame_info *info) -{ - ifh[0] = IFH_INJ_BYPASS | ((0x1ff & info->rew_op) << 21); - ifh[1] = (0xf00 & info->port) >> 8; - ifh[2] = (0xff & info->port) << 24; - ifh[3] = (info->tag_type << 16) | info->vid; - - return 0; -} - -static int ocelot_port_xmit(struct sk_buff *skb, struct net_device *dev) +static netdev_tx_t ocelot_port_xmit(struct sk_buff *skb, struct net_device *dev) { struct ocelot_port_private *priv = netdev_priv(dev); - struct skb_shared_info *shinfo = skb_shinfo(skb); struct ocelot_port *ocelot_port = &priv->port; struct ocelot *ocelot = ocelot_port->ocelot; - u32 val, ifh[OCELOT_TAG_LEN / 4]; - struct frame_info info = {}; - u8 grp = 0; /* Send everything on CPU group 0 */ - unsigned int i, count, last; int port = priv->chip_port; + u32 rew_op = 0; - val = ocelot_read(ocelot, QS_INJ_STATUS); - if (!(val & QS_INJ_STATUS_FIFO_RDY(BIT(grp))) || - (val & QS_INJ_STATUS_WMARK_REACHED(BIT(grp)))) + if (!ocelot_can_inject(ocelot, 0)) return NETDEV_TX_BUSY; - ocelot_write_rix(ocelot, QS_INJ_CTRL_GAP_SIZE(1) | - QS_INJ_CTRL_SOF, QS_INJ_CTRL, grp); - - info.port = BIT(port); - info.tag_type = IFH_TAG_TYPE_C; - info.vid = skb_vlan_tag_get(skb); - /* Check if timestamping is needed */ - if (ocelot->ptp && (shinfo->tx_flags & SKBTX_HW_TSTAMP)) { - info.rew_op = ocelot_port->ptp_cmd; + if (ocelot->ptp && (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) { + rew_op = ocelot_port->ptp_cmd; if (ocelot_port->ptp_cmd == IFH_REW_OP_TWO_STEP_PTP) { struct sk_buff *clone; @@ -370,45 +337,11 @@ static int ocelot_port_xmit(struct sk_buff *skb, struct net_device *dev) ocelot_port_add_txtstamp_skb(ocelot, port, clone); - info.rew_op |= clone->cb[0] << 3; + rew_op |= clone->cb[0] << 3; } } - if (ocelot->ptp && shinfo->tx_flags & SKBTX_HW_TSTAMP) { - info.rew_op = ocelot_port->ptp_cmd; - if (ocelot_port->ptp_cmd == IFH_REW_OP_TWO_STEP_PTP) - info.rew_op |= skb->cb[0] << 3; - } - - ocelot_gen_ifh(ifh, &info); - - for (i = 0; i < OCELOT_TAG_LEN / 4; i++) - ocelot_write_rix(ocelot, (__force u32)cpu_to_be32(ifh[i]), - QS_INJ_WR, grp); - - count = DIV_ROUND_UP(skb->len, 4); - last = skb->len % 4; - for (i = 0; i < count; i++) - ocelot_write_rix(ocelot, ((u32 *)skb->data)[i], QS_INJ_WR, grp); - - /* Add padding */ - while (i < (OCELOT_BUFFER_CELL_SZ / 4)) { - ocelot_write_rix(ocelot, 0, QS_INJ_WR, grp); - i++; - } - - /* Indicate EOF and valid bytes in last word */ - ocelot_write_rix(ocelot, QS_INJ_CTRL_GAP_SIZE(1) | - QS_INJ_CTRL_VLD_BYTES(skb->len < OCELOT_BUFFER_CELL_SZ ? 0 : last) | - QS_INJ_CTRL_EOF, - QS_INJ_CTRL, grp); - - /* Add dummy CRC */ - ocelot_write_rix(ocelot, 0, QS_INJ_WR, grp); - skb_tx_timestamp(skb); - - dev->stats.tx_packets++; - dev->stats.tx_bytes += skb->len; + ocelot_port_inject_frame(ocelot, port, 0, rew_op, skb); kfree_skb(skb); From patchwork Tue Dec 22 13:44:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 346908 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 016BCC433E6 for ; Tue, 22 Dec 2020 13:47:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B44F023103 for ; Tue, 22 Dec 2020 13:47:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727514AbgLVNrI (ORCPT ); Tue, 22 Dec 2020 08:47:08 -0500 Received: from mail-eopbgr70089.outbound.protection.outlook.com ([40.107.7.89]:35431 "EHLO EUR04-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727052AbgLVNrH (ORCPT ); Tue, 22 Dec 2020 08:47:07 -0500 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=TGepN5T02fze7Qd5HMeTBAEKq92XZ5iXpW6gQ76onHDVta3imw3IBn5YeFLDdDkQvCMXq6b0XGVDv6ZSbHmY1B38A1BRwnBEbKyl6gksog8IJVqYwaECPeuJyl75i22dn+3COWrCxK3/ypRWJWpqJT0nwrMqEDch9XGa4Pc5c4x8nwWxMGhV+Zn7UPMzLSup9eFuX6qlL84pOuMnD0nP+Bw39BKAY7zjIVjFvu8NOX9eEiB6ZTYdtsdsl/7/ijoRSooSCJjsaWVuG4CNYlU04Hd66PMfy+BMRPzlx9eD/n4cWa5dxFitpmupmyc5wPtoTNvZGzDYSC51yFSKU5VQbQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=OeC2ykBWXlKOnx21mjQxTrlKstDkJD5SZopTilkp5DY=; b=hjzfZmVQJhcHzzLRmdOR8ywGQkSwWuXiIIayI8kVpBm+Gu4SL6z7cgd1BtvdfxgrLQJXFI4W3OM79IRx2VYKCVlZAdtSygeoNzw8z5M+urfCVk8uN4CUwAylT2vVccrxUIq0CPL8OcD+GrNS2jABmWytMWqEfRqxE6MpZOuxHImg417XqWLBI3ymdLbvIusJRePZIII2EsZ5KJsD26pjAOHwBTBEiwk/j8aD7l5XwjKeK3sB9urzFyiCbzTl2LW2dqvZSgl7W50W89jxywf4z+LVvlgQuTRSy2nGMU1nQDm3DLw/134+NWv3DDK2dUgDLQ5WflKZrfHfzebTdVbdPw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=OeC2ykBWXlKOnx21mjQxTrlKstDkJD5SZopTilkp5DY=; b=D5OIs5WmjqNny/KtyTis2i0zRnNuL/qHXPVe7L28baH/8ory7TCjuu5I9xwvPr3LGxUdRM/1ZJziQpmN4DB54b2shJDNVXcpo6YT7fyhD0wAbmruo9xBMZv+9jECpn3YPJubpPB20xIhHr8Sx1lu4AWS0Qbfzvh5wkgzqhwD4Ug= Authentication-Results: lunn.ch; dkim=none (message not signed) header.d=none;lunn.ch; dmarc=none action=none header.from=nxp.com; Received: from VI1PR04MB5696.eurprd04.prod.outlook.com (2603:10a6:803:e7::13) by VE1PR04MB7408.eurprd04.prod.outlook.com (2603:10a6:800:1b3::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.25; Tue, 22 Dec 2020 13:45:04 +0000 Received: from VI1PR04MB5696.eurprd04.prod.outlook.com ([fe80::2dd6:8dc:2da7:ad84]) by VI1PR04MB5696.eurprd04.prod.outlook.com ([fe80::2dd6:8dc:2da7:ad84%5]) with mapi id 15.20.3676.033; Tue, 22 Dec 2020 13:45:04 +0000 From: Vladimir Oltean To: Andrew Lunn , Florian Fainelli , Vivien Didelot Cc: Richard Cochran , Claudiu Manoil , Alexandru Marginean , Alexandre Belloni , Xiaoliang Yang , Hongbo Wang , Po Liu , Yangbo Lu , "David S . Miller" , Jakub Kicinski , netdev@vger.kernel.org, UNGLinuxDriver@microchip.com Subject: [RFC PATCH v2 net-next 12/15] net: mscc: ocelot: refactor ocelot_xtr_irq_handler into ocelot_xtr_poll Date: Tue, 22 Dec 2020 15:44:36 +0200 Message-Id: <20201222134439.2478449-13-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201222134439.2478449-1-vladimir.oltean@nxp.com> References: <20201222134439.2478449-1-vladimir.oltean@nxp.com> X-Originating-IP: [188.25.2.120] X-ClientProxiedBy: VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) To VI1PR04MB5696.eurprd04.prod.outlook.com (2603:10a6:803:e7::13) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (188.25.2.120) by VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.29 via Frontend Transport; Tue, 22 Dec 2020 13:45:03 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 6a976bff-fda2-4be1-763b-08d8a67fc95e X-MS-TrafficTypeDiagnostic: VE1PR04MB7408: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:9508; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: rocq6cp8xY7M9VwoTsSUcz1dW55acv2UTcvKUOHKg7wBWmQvC1t2SCWLSfk+2F69Oy8uXd/IFrSesiIKVPrr504zct5ZdMiyY/ZMnW6D/q9nijHrK/uOSFaWZeCmN/KMQI77u8eqRuZ4YpyvquBQYGcfbjpdXWqAZtNvkpXPk7qRaWIi8aZHiv9DjbuDHWARBBV/sChD/ZwtpStCaiRh4nfdjRdH9HQuQFi2x2hP4AoRz5w0Kx8Krav7borIxFWBqRx+d+DZDIUFnU+mLcR5EFJ3VxUk+hlEPE+ZMExHgo0HqoisBmrG762W0o8+dZWEyALSrLNQWlyAicsrhtn9kna9NJv73i4Nusu6eLZoUrkowo1jta43+Yor2DDg5UWistftsrJAB9VPx8YszNlSuXL7otLrZsPhDLFn+P5Z8zlathnJNGEV3yp8EHBWlL5rh17DCNpn0i9O3ks7FILPSA== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:VI1PR04MB5696.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(52116002)(69590400010)(8676002)(956004)(186003)(4326008)(36756003)(2616005)(6512007)(498600001)(16526019)(44832011)(2906002)(83380400001)(8936002)(110136005)(54906003)(26005)(6666004)(66476007)(5660300002)(6486002)(86362001)(6506007)(30864003)(66946007)(1076003)(66556008); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: 85iRc3cZmtzoXBldaZC6gaW6jUrjIKJoOcDuvZhhyHBz+yRCgikIR1hI76CX+fKNKsKQHoRCsm5E/9zusSvKxorHmcMCxs7u054t52wniyUNXBzYjh0GWJ9LKuF3mwZwule02nli3a4SMXAyjhrzrs2BFDp78hoSw6fBvabVL7Zd3iBj20lIBHqQNmuEvXIQ3VWXB0uecxJlvRJvK+sO4VSGHZtcDtqr0wkduqssQDHPDH3IpYoYvvBw954cDIjGiKgOppvRMDST4WuHm3NDWH+6yVmXZT0n9i7WcPcCfiO082duR3CPLG+gT3OXig/jIy2F18UlzayWS1RdiLq7OcsrwUs+ZPpo5az6CEPwhk43Zxik5aQE3t6G0qqfol/Pd1VkUPrC1iV5r5djmo2a9NwJxVNaPgBAWJIyEUBWjC0g5uhd0qHKLVHmaZCgniGWlhufRByGQukErBKuhMwWaY8R7JhP+vcuy6IxZl9hL9eX4ZBw994EeNyqOty1e8fiXvIDqx9t5KigxYiU126txnfrejTZLUPcBIZOnnYGG83Hbi2JbRzAAz+c9KWUvpI1mhvXXc2GUNxpQjjtTXM7aph7RXHxU6AeW8ieo6eUhaSrf8jzPdvxOdVJEeuGsyOmJ3h4BEQtISo/6EoErVV/XTSrrtRf8VEjf+Gyk/iVxJ6by3QIklfiyHgcq/yulrjUYbWwYZQ7iX+iXWbX9AQvAlIoYZZx0ZLOKhkMMNnDfEiZe7YSh25o/XPm4kSOIn0vdBYWGoA0VMf9pvHwMRay/Na/CQUbr45SX3/8Q69bELWB/OL+Zx6Rl7a8+ZQB1pMficPY6AMOdTC1qkmuPJ/hF/qr9Y+cZJna5YwSs4p7KMivTMiMWes83sywF2cBpS1nvkMPKY3EqYC6iCLIgfAoSof6Q2Jh2UBclH7Arb5zBnlQ3w+WUvd1+2LfKmRz+Xh5UrhHSKqGZDGAZ1MkX9ddeF/dWVWZHY7kJcMZK/jXsw6KmPulg2tTPnniSbpyrYuf X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5696.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2020 13:45:04.0384 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-Network-Message-Id: 6a976bff-fda2-4be1-763b-08d8a67fc95e X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: KesDlmOoK5hSDJnUnt0RS7x6DEm5JbGg6NUOBschJyYax103i5ATM9zDcmzUoMM10ZgYXdHCYW4RXMJuBJiH7A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB7408 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Since the felix DSA driver will need to poll the CPU port module for extracted frames as well, let's create some common functions that read an Extraction Frame Header, and then an skb, from a CPU extraction group. This is so complicated, because the procedure to retrieve a struct net_device pointer based on the source port is different for DSA and switchdev. So this is the reason why the polling function is split in the middle. The ocelot_xtr_poll_xfh() permits the caller to get a struct net_device pointer based on the XFH port field, then pass this to the ocelot_xtr_poll_frame() function. Signed-off-by: Vladimir Oltean --- Changes in v2: Patch is new. drivers/net/ethernet/mscc/ocelot.c | 163 +++++++++++++++++++++ drivers/net/ethernet/mscc/ocelot.h | 6 + drivers/net/ethernet/mscc/ocelot_vsc7514.c | 158 ++------------------ 3 files changed, 179 insertions(+), 148 deletions(-) diff --git a/drivers/net/ethernet/mscc/ocelot.c b/drivers/net/ethernet/mscc/ocelot.c index 7d73c3251dfb..b91d4c31d3d7 100644 --- a/drivers/net/ethernet/mscc/ocelot.c +++ b/drivers/net/ethernet/mscc/ocelot.c @@ -12,6 +12,9 @@ #define TABLE_UPDATE_SLEEP_US 10 #define TABLE_UPDATE_TIMEOUT_US 100000 +#define IFH_EXTRACT_BITFIELD64(x, o, w) \ + (((x) >> (o)) & GENMASK_ULL((w) - 1, 0)) + struct ocelot_mact_entry { u8 mac[ETH_ALEN]; u16 vid; @@ -566,6 +569,166 @@ void ocelot_get_txtstamp(struct ocelot *ocelot) } EXPORT_SYMBOL(ocelot_get_txtstamp); +static int ocelot_parse_xfh(u32 *_ifh, struct ocelot_frame_info *info) +{ + u8 llen, wlen; + u64 ifh[2]; + + ifh[0] = be64_to_cpu(((__force __be64 *)_ifh)[0]); + ifh[1] = be64_to_cpu(((__force __be64 *)_ifh)[1]); + + wlen = IFH_EXTRACT_BITFIELD64(ifh[0], 7, 8); + llen = IFH_EXTRACT_BITFIELD64(ifh[0], 15, 6); + + info->len = OCELOT_BUFFER_CELL_SZ * wlen + llen - 80; + + info->timestamp = IFH_EXTRACT_BITFIELD64(ifh[0], 21, 32); + + info->port = IFH_EXTRACT_BITFIELD64(ifh[1], 43, 4); + + info->tag_type = IFH_EXTRACT_BITFIELD64(ifh[1], 16, 1); + info->vid = IFH_EXTRACT_BITFIELD64(ifh[1], 0, 12); + + return 0; +} + +static int ocelot_rx_frame_word(struct ocelot *ocelot, u8 grp, bool ifh, + u32 *rval) +{ + u32 val; + u32 bytes_valid; + + val = ocelot_read_rix(ocelot, QS_XTR_RD, grp); + if (val == XTR_NOT_READY) { + if (ifh) + return -EIO; + + do { + val = ocelot_read_rix(ocelot, QS_XTR_RD, grp); + } while (val == XTR_NOT_READY); + } + + switch (val) { + case XTR_ABORT: + return -EIO; + case XTR_EOF_0: + case XTR_EOF_1: + case XTR_EOF_2: + case XTR_EOF_3: + case XTR_PRUNED: + bytes_valid = XTR_VALID_BYTES(val); + val = ocelot_read_rix(ocelot, QS_XTR_RD, grp); + if (val == XTR_ESCAPE) + *rval = ocelot_read_rix(ocelot, QS_XTR_RD, grp); + else + *rval = val; + + return bytes_valid; + case XTR_ESCAPE: + *rval = ocelot_read_rix(ocelot, QS_XTR_RD, grp); + + return 4; + default: + *rval = val; + + return 4; + } +} + +int ocelot_xtr_poll_xfh(struct ocelot *ocelot, int grp, + struct ocelot_frame_info *info) +{ + u32 ifh[OCELOT_TAG_LEN / 4]; + int i, err = 0; + + for (i = 0; i < OCELOT_TAG_LEN / 4; i++) { + err = ocelot_rx_frame_word(ocelot, grp, true, &ifh[i]); + if (err != 4) + return (err < 0) ? err : -EIO; + } + + ocelot_parse_xfh(ifh, info); + + return 0; +} + +int ocelot_xtr_poll_frame(struct ocelot *ocelot, int grp, + struct net_device *dev, + struct ocelot_frame_info *info, + struct sk_buff **nskb) +{ + struct skb_shared_hwtstamps *shhwtstamps; + u64 tod_in_ns, full_ts_in_ns; + struct timespec64 ts; + int sz, len, buf_len; + struct sk_buff *skb; + u32 val, *buf; + int err = 0; + + skb = netdev_alloc_skb(dev, info->len); + if (unlikely(!skb)) { + netdev_err(dev, "Unable to allocate sk_buff\n"); + err = -ENOMEM; + goto out; + } + + buf_len = info->len - ETH_FCS_LEN; + buf = (u32 *)skb_put(skb, buf_len); + + len = 0; + do { + sz = ocelot_rx_frame_word(ocelot, grp, false, &val); + if (sz < 0) { + err = sz; + goto out; + } + *buf++ = val; + len += sz; + } while (len < buf_len); + + /* Read the FCS */ + sz = ocelot_rx_frame_word(ocelot, grp, false, &val); + if (sz < 0) { + err = sz; + goto out; + } + + /* Update the statistics if part of the FCS was read before */ + len -= ETH_FCS_LEN - sz; + + if (unlikely(dev->features & NETIF_F_RXFCS)) { + buf = (u32 *)skb_put(skb, ETH_FCS_LEN); + *buf = val; + } + + if (ocelot->ptp) { + ocelot_ptp_gettime64(&ocelot->ptp_info, &ts); + + tod_in_ns = ktime_set(ts.tv_sec, ts.tv_nsec); + if ((tod_in_ns & 0xffffffff) < info->timestamp) + full_ts_in_ns = (((tod_in_ns >> 32) - 1) << 32) | + info->timestamp; + else + full_ts_in_ns = (tod_in_ns & GENMASK_ULL(63, 32)) | + info->timestamp; + + shhwtstamps = skb_hwtstamps(skb); + memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps)); + shhwtstamps->hwtstamp = full_ts_in_ns; + } + + /* Everything we see on an interface that is in the HW bridge + * has already been forwarded. + */ + if (ocelot->bridge_mask & BIT(info->port)) + skb->offload_fwd_mark = 1; + + skb->protocol = eth_type_trans(skb, dev); + *nskb = skb; +out: + return err; +} + /* Generate the IFH for frame injection * * The IFH is a 128bit-value diff --git a/drivers/net/ethernet/mscc/ocelot.h b/drivers/net/ethernet/mscc/ocelot.h index 7dac0edd7767..68b089d1d81b 100644 --- a/drivers/net/ethernet/mscc/ocelot.h +++ b/drivers/net/ethernet/mscc/ocelot.h @@ -120,6 +120,12 @@ void ocelot_set_cpu_port(struct ocelot *ocelot, int cpu, bool ocelot_can_inject(struct ocelot *ocelot, int grp); void ocelot_port_inject_frame(struct ocelot *ocelot, int port, int grp, u32 rew_op, struct sk_buff *skb); +int ocelot_xtr_poll_xfh(struct ocelot *ocelot, int grp, + struct ocelot_frame_info *info); +int ocelot_xtr_poll_frame(struct ocelot *ocelot, int grp, + struct net_device *dev, + struct ocelot_frame_info *info, + struct sk_buff **skb); extern struct notifier_block ocelot_netdevice_nb; extern struct notifier_block ocelot_switchdev_nb; diff --git a/drivers/net/ethernet/mscc/ocelot_vsc7514.c b/drivers/net/ethernet/mscc/ocelot_vsc7514.c index 504881d531e5..a1d7698be78b 100644 --- a/drivers/net/ethernet/mscc/ocelot_vsc7514.c +++ b/drivers/net/ethernet/mscc/ocelot_vsc7514.c @@ -18,8 +18,6 @@ #include #include "ocelot.h" -#define IFH_EXTRACT_BITFIELD64(x, o, w) (((x) >> (o)) & GENMASK_ULL((w) - 1, 0)) - static const u32 ocelot_ana_regmap[] = { REG(ANA_ADVLEARN, 0x009000), REG(ANA_VLANMASK, 0x009004), @@ -533,173 +531,37 @@ static int ocelot_chip_init(struct ocelot *ocelot, const struct ocelot_ops *ops) return 0; } -static int ocelot_parse_ifh(u32 *_ifh, struct ocelot_frame_info *info) -{ - u8 llen, wlen; - u64 ifh[2]; - - ifh[0] = be64_to_cpu(((__force __be64 *)_ifh)[0]); - ifh[1] = be64_to_cpu(((__force __be64 *)_ifh)[1]); - - wlen = IFH_EXTRACT_BITFIELD64(ifh[0], 7, 8); - llen = IFH_EXTRACT_BITFIELD64(ifh[0], 15, 6); - - info->len = OCELOT_BUFFER_CELL_SZ * wlen + llen - 80; - - info->timestamp = IFH_EXTRACT_BITFIELD64(ifh[0], 21, 32); - - info->port = IFH_EXTRACT_BITFIELD64(ifh[1], 43, 4); - - info->tag_type = IFH_EXTRACT_BITFIELD64(ifh[1], 16, 1); - info->vid = IFH_EXTRACT_BITFIELD64(ifh[1], 0, 12); - - return 0; -} - -static int ocelot_rx_frame_word(struct ocelot *ocelot, u8 grp, bool ifh, - u32 *rval) -{ - u32 val; - u32 bytes_valid; - - val = ocelot_read_rix(ocelot, QS_XTR_RD, grp); - if (val == XTR_NOT_READY) { - if (ifh) - return -EIO; - - do { - val = ocelot_read_rix(ocelot, QS_XTR_RD, grp); - } while (val == XTR_NOT_READY); - } - - switch (val) { - case XTR_ABORT: - return -EIO; - case XTR_EOF_0: - case XTR_EOF_1: - case XTR_EOF_2: - case XTR_EOF_3: - case XTR_PRUNED: - bytes_valid = XTR_VALID_BYTES(val); - val = ocelot_read_rix(ocelot, QS_XTR_RD, grp); - if (val == XTR_ESCAPE) - *rval = ocelot_read_rix(ocelot, QS_XTR_RD, grp); - else - *rval = val; - - return bytes_valid; - case XTR_ESCAPE: - *rval = ocelot_read_rix(ocelot, QS_XTR_RD, grp); - - return 4; - default: - *rval = val; - - return 4; - } -} - static irqreturn_t ocelot_xtr_irq_handler(int irq, void *arg) { struct ocelot *ocelot = arg; - int i = 0, grp = 0; - int err = 0; + int grp = 0, err; while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp)) { - struct skb_shared_hwtstamps *shhwtstamps; struct ocelot_frame_info info = {}; struct ocelot_port_private *priv; struct ocelot_port *ocelot_port; - u64 tod_in_ns, full_ts_in_ns; struct net_device *dev; - u32 ifh[4], val, *buf; - struct timespec64 ts; - int sz, len, buf_len; struct sk_buff *skb; - for (i = 0; i < OCELOT_TAG_LEN / 4; i++) { - err = ocelot_rx_frame_word(ocelot, grp, true, &ifh[i]); - if (err != 4) - goto out; - } - - /* At this point the IFH was read correctly, so it is safe to - * presume that there is no error. The err needs to be reset - * otherwise a frame could come in CPU queue between the while - * condition and the check for error later on. And in that case - * the new frame is just removed and not processed. - */ - err = 0; + err = ocelot_xtr_poll_xfh(ocelot, grp, &info); + if (err) + break; - ocelot_parse_ifh(ifh, &info); + if (WARN_ON(info.port >= ocelot->num_phys_ports)) + goto out; ocelot_port = ocelot->ports[info.port]; priv = container_of(ocelot_port, struct ocelot_port_private, port); dev = priv->dev; - skb = netdev_alloc_skb(dev, info.len); - - if (unlikely(!skb)) { - netdev_err(dev, "Unable to allocate sk_buff\n"); - err = -ENOMEM; - goto out; - } - buf_len = info.len - ETH_FCS_LEN; - buf = (u32 *)skb_put(skb, buf_len); - - len = 0; - do { - sz = ocelot_rx_frame_word(ocelot, grp, false, &val); - if (sz < 0) { - err = sz; - goto out; - } - *buf++ = val; - len += sz; - } while (len < buf_len); - - /* Read the FCS */ - sz = ocelot_rx_frame_word(ocelot, grp, false, &val); - if (sz < 0) { - err = sz; - goto out; - } - - /* Update the statistics if part of the FCS was read before */ - len -= ETH_FCS_LEN - sz; - - if (unlikely(dev->features & NETIF_F_RXFCS)) { - buf = (u32 *)skb_put(skb, ETH_FCS_LEN); - *buf = val; - } - - if (ocelot->ptp) { - ocelot_ptp_gettime64(&ocelot->ptp_info, &ts); - - tod_in_ns = ktime_set(ts.tv_sec, ts.tv_nsec); - if ((tod_in_ns & 0xffffffff) < info.timestamp) - full_ts_in_ns = (((tod_in_ns >> 32) - 1) << 32) | - info.timestamp; - else - full_ts_in_ns = (tod_in_ns & GENMASK_ULL(63, 32)) | - info.timestamp; - - shhwtstamps = skb_hwtstamps(skb); - memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps)); - shhwtstamps->hwtstamp = full_ts_in_ns; - } - - /* Everything we see on an interface that is in the HW bridge - * has already been forwarded. - */ - if (ocelot->bridge_mask & BIT(info.port)) - skb->offload_fwd_mark = 1; + err = ocelot_xtr_poll_frame(ocelot, grp, dev, &info, &skb); + if (err) + break; - skb->protocol = eth_type_trans(skb, dev); if (!skb_defer_rx_timestamp(skb)) netif_rx(skb); - dev->stats.rx_bytes += len; + dev->stats.rx_bytes += info.len; dev->stats.rx_packets++; } From patchwork Tue Dec 22 13:44:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 346907 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A141C433DB for ; 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dkim=none (message not signed) header.d=none;lunn.ch; dmarc=none action=none header.from=nxp.com; Received: from VI1PR04MB5696.eurprd04.prod.outlook.com (2603:10a6:803:e7::13) by VE1PR04MB7408.eurprd04.prod.outlook.com (2603:10a6:800:1b3::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.25; Tue, 22 Dec 2020 13:45:04 +0000 Received: from VI1PR04MB5696.eurprd04.prod.outlook.com ([fe80::2dd6:8dc:2da7:ad84]) by VI1PR04MB5696.eurprd04.prod.outlook.com ([fe80::2dd6:8dc:2da7:ad84%5]) with mapi id 15.20.3676.033; Tue, 22 Dec 2020 13:45:04 +0000 From: Vladimir Oltean To: Andrew Lunn , Florian Fainelli , Vivien Didelot Cc: Richard Cochran , Claudiu Manoil , Alexandru Marginean , Alexandre Belloni , Xiaoliang Yang , Hongbo Wang , Po Liu , Yangbo Lu , "David S . Miller" , Jakub Kicinski , netdev@vger.kernel.org, UNGLinuxDriver@microchip.com Subject: [RFC PATCH v2 net-next 13/15] net: dsa: felix: setup MMIO filtering rules for PTP when using tag_8021q Date: Tue, 22 Dec 2020 15:44:37 +0200 Message-Id: <20201222134439.2478449-14-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201222134439.2478449-1-vladimir.oltean@nxp.com> References: <20201222134439.2478449-1-vladimir.oltean@nxp.com> X-Originating-IP: [188.25.2.120] X-ClientProxiedBy: VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) To VI1PR04MB5696.eurprd04.prod.outlook.com (2603:10a6:803:e7::13) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (188.25.2.120) by VI1PR08CA0169.eurprd08.prod.outlook.com (2603:10a6:800:d1::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.29 via Frontend Transport; Tue, 22 Dec 2020 13:45:04 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 416d4351-e44a-4019-d29b-08d8a67fc9c9 X-MS-TrafficTypeDiagnostic: VE1PR04MB7408: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:10000; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: MYL1ay0TTNNI50aG8Ext8mbBxHjIi7gLj/0Pbb2eRjUYepuxL9qLra/kKrPvMq/XYNA5wOiHpJ4Xy+ns8+kf4sm+ECmg1fkYgZHEcP9d8ORPyrzwon1tRgVB06nUsK2Xycg5kBgwmOhsfRpBKq2lwredPSvI430kzDLLe+I3msTWuw0AJNNzfjpaF8mMrWowZn7lS2BS+Ch8M1JfIQJm8j2lSgdlFZgpFz0BF0PQE9BtmYV7wcoVnmEy/An3jiYgBy8ozUskE1x6ATyWeNR9/8lWrqRGvSkRuPyXXstp87HuoID99JvU2rA2gsgswniKUXnp59oEoagF1rZ7kOacZdWT1KnHnjziQld5/Lfs4QG2yJDA6ByxD8oG3A+YeCKQ8c8CFbTw6D7PQlYixYhZOzBrhv8dIiHDy0si7B131V3nAMUoOV3eYrvaTANPOXfDEi7nFeojtHLO91gQZGNzAw== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:VI1PR04MB5696.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(52116002)(69590400010)(8676002)(956004)(186003)(4326008)(36756003)(2616005)(6512007)(498600001)(16526019)(44832011)(2906002)(83380400001)(8936002)(110136005)(54906003)(26005)(6666004)(66476007)(5660300002)(6486002)(86362001)(6506007)(66946007)(1076003)(66556008); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: hs7ogb7w8IIppnw0tb2SpxeSeErDOGPMkFM0HjKsBn5fZCN7x92bfYNeieWSGHLWUvxYNoSTUlXAow49EtwTVW1zZZ7Jf/ZmgsApLpphHkQdzxi8mz/Pt3OLTLPTQAwSYoynO52Qbu2CLpWMqmn5kEFc0qk1bZ55Ts0ZltaCz1Pc2IV7iZBIxmf6lBWJgccgNiDXzg0kQUUwYfAdChJXEfYRRdHzQMwgVYXZZtOypzMlFFx8IngOUOYdNuQvASZWaO6hNknO1xbql+7q6IAMLcp4z1DJXyTFlhPXxfKDka67Cat2dhQ/g5Eb83myLHLJNpP37ffEBI4Bet03tm0s4uzoEg3Ym1lHPw8iqL+tNMVMyHvRPcpmsVM/wCJkAgz3eq7aS0Y+7ZBPFBntBRJ73poDKZgl/GpCaet1IiVPx1ts7j43gOsLrl41Bk2TtzySrop4yORMtMbxPy/ljg/So5atAnipz1NlS26Dazq36lml0bu0nmj+Z6ZTtrZPkekOd6ai1kORI7sdUNbCPTDDqC0qlppt5h4ijH4i4FiMCtOq5y7P5Iy8YGyAOMO6ah5KPH6Y0ShsoEwBuXPVg6UQzbZF9gsUhwUBR1A/8lDfAENSmJm6v8mts2ohXZ9dHFVMa8p/7W92PG3+/SIZiyKc3CFwvI1aK9KgFw9srDARk5Mz4VZCsC2AAaUdgwlPrf/ulLcEQHtBCkGuznrEbKDNLfflpABbzGhg0AuiFN3QjMeC2wyzBnE6yJDuAHfchZ/UiKhy4Xtg2Sc9QZhvkWz44nZd+GtfZYsacCyPi5gJsLdpIiGGoeMa08nkOdiTaC6GIebfgIlZeerMx2E+0almSJaj/Gx28c4cjkuPKW8byqVwf7srlhQT0vkXzNol/ZM2DRCWtc9WVOgPy0iyFiGqpdvjlyecb48J6CXsNg0hXzHIEnZE042ubiVNucfisndVUCwfJUWc9R3YsCCbwIP06SHTEvY4aWt3T5phMi6l6GjnjO4osTKwKfFXjWakIG3n X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5696.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2020 13:45:04.7910 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-Network-Message-Id: 416d4351-e44a-4019-d29b-08d8a67fc9c9 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: gb2iU5pq3OGyQMvq66APaQNYsAMEAMJhZg6y3J+gnliZgU7ZjWXC9qWRKx/FEu2GE7QaxcAS6FE6N2oGbu8/+Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB7408 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Since the tag_8021q tagger is software-defined, it has no means by itself for retrieving hardware timestamps of PTP event messages. Because we do want to support PTP on ocelot even with tag_8021q, we need to use the CPU port module for that. The RX timestamp is present in the Extraction Frame Header. And because we can't use NPI mode which redirects the CPU queues to an "external CPU" (meaning the ARM CPU), then we need to poll the CPU port module through the MMIO registers to retrieve TX and RX timestamps. Sadly, on NXP LS1028A, the Felix switch was integrated into the SoC without wiring the extraction IRQ line to the ARM GIC. So, if we want to be notified of any PTP packets received on the CPU port module, we have a problem. There is a possible workaround, which is to use the Ethernet CPU port as a notification channel that packets are available on the CPU port module as well. When a PTP packet is received by the DSA tagger (without timestamp, of course), we go to the CPU extraction queues, poll for it there, then we drop the original Ethernet packet and masquerade the packet retrieved over MMIO (plus the timestamp) as the original when we inject it up the stack. Create a quirk in struct felix is selected by the Felix driver (but not by Seville, since that doesn't support PTP at all). We want to do this such that the workaround is minimally invasive for future switches that don't require this workaround. The only traffic for which we need timestamps is PTP traffic, so add a redirection rule to the CPU port module for this. Currently we only have the need for PTP over L2, so redirection rules for UDP ports 319 and 320 are TBD for now. Signed-off-by: Vladimir Oltean --- Changes in v2: Patch is new. drivers/net/dsa/ocelot/felix.h | 13 ++++ drivers/net/dsa/ocelot/felix_tag_8021q.c | 83 +++++++++++++++++++++++- drivers/net/dsa/ocelot/felix_vsc9959.c | 1 + 3 files changed, 96 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/ocelot/felix.h b/drivers/net/dsa/ocelot/felix.h index 71f343326c00..c75a934c3e0b 100644 --- a/drivers/net/dsa/ocelot/felix.h +++ b/drivers/net/dsa/ocelot/felix.h @@ -25,6 +25,19 @@ struct felix_info { int switch_pci_bar; int imdio_pci_bar; const struct ptp_clock_info *ptp_caps; + + /* Some Ocelot switches are integrated into the SoC without the + * extraction IRQ line connected to the ARM GIC. By enabling this + * workaround, the few packets that are delivered to the CPU port + * module (currently only PTP) are copied not only to the hardware CPU + * port module, but also to the 802.1Q Ethernet CPU port, and polling + * the extraction registers is triggered once the DSA tagger sees a PTP + * frame. The Ethernet frame is only used as a notification: it is + * dropped, and the original frame is extracted over MMIO and annotated + * with the RX timestamp. + */ + bool quirk_no_xtr_irq; + int (*mdio_bus_alloc)(struct ocelot *ocelot); void (*mdio_bus_free)(struct ocelot *ocelot); void (*phylink_validate)(struct ocelot *ocelot, int port, diff --git a/drivers/net/dsa/ocelot/felix_tag_8021q.c b/drivers/net/dsa/ocelot/felix_tag_8021q.c index f209273bbf69..5243e55a8054 100644 --- a/drivers/net/dsa/ocelot/felix_tag_8021q.c +++ b/drivers/net/dsa/ocelot/felix_tag_8021q.c @@ -142,6 +142,85 @@ static const struct dsa_8021q_ops felix_tag_8021q_ops = { .vlan_add = felix_tag_8021q_vlan_add, }; +/* Set up a VCAP IS2 rule for delivering PTP frames to the CPU port module. + * If the NET_DSA_TAG_OCELOT_QUIRK_NO_XTR_IRQ is in place, then also copy those + * PTP frames to the tag_8021q CPU port. + */ +static int felix_setup_mmio_filtering(struct felix *felix) +{ + struct ocelot_vcap_filter *redirect_rule; + struct ocelot_vcap_filter *tagging_rule; + struct ocelot *ocelot = &felix->ocelot; + unsigned long ingress_port_mask; + int cpu = ocelot->dsa_8021q_cpu; + int ret; + + tagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL); + if (!tagging_rule) + return -ENOMEM; + + redirect_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL); + if (!redirect_rule) { + kfree(tagging_rule); + return -ENOMEM; + } + + ingress_port_mask = GENMASK(ocelot->num_phys_ports - 1, 0) & ~BIT(cpu); + + tagging_rule->key_type = OCELOT_VCAP_KEY_ETYPE; + *(u16 *)tagging_rule->key.etype.etype.value = htons(ETH_P_1588); + *(u16 *)tagging_rule->key.etype.etype.mask = 0xffff; + tagging_rule->ingress_port_mask = ingress_port_mask; + tagging_rule->prio = 1; + tagging_rule->id.cookie = ocelot->num_phys_ports; + tagging_rule->id.tc_offload = false; + tagging_rule->block_id = VCAP_IS1; + tagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD; + tagging_rule->lookup = 0; + tagging_rule->action.pag_override_mask = 0xff; + tagging_rule->action.pag_val = ocelot->num_phys_ports; + + ret = ocelot_vcap_filter_add(ocelot, tagging_rule, NULL); + if (ret) { + kfree(tagging_rule); + kfree(redirect_rule); + return ret; + } + + redirect_rule->key_type = OCELOT_VCAP_KEY_ANY; + redirect_rule->ingress_port_mask = ingress_port_mask; + redirect_rule->pag = ocelot->num_phys_ports; + redirect_rule->prio = 1; + redirect_rule->id.cookie = ocelot->num_phys_ports; + redirect_rule->id.tc_offload = false; + redirect_rule->block_id = VCAP_IS2; + redirect_rule->type = OCELOT_VCAP_FILTER_OFFLOAD; + redirect_rule->lookup = 0; + redirect_rule->action.cpu_copy_ena = true; + if (felix->info->quirk_no_xtr_irq) { + /* Redirect to the tag_8021q CPU but also copy PTP packets to + * the CPU port module + */ + redirect_rule->action.mask_mode = OCELOT_MASK_MODE_REDIRECT; + redirect_rule->action.port_mask = BIT(cpu); + } else { + /* Trap PTP packets only to the CPU port module (which is + * redirected to the NPI port) + */ + redirect_rule->action.mask_mode = OCELOT_MASK_MODE_PERMIT_DENY; + redirect_rule->action.port_mask = 0; + } + + ret = ocelot_vcap_filter_add(ocelot, redirect_rule, NULL); + if (ret) { + ocelot_vcap_filter_del(ocelot, tagging_rule); + kfree(redirect_rule); + return ret; + } + + return 0; +} + int felix_setup_8021q_tagging(struct ocelot *ocelot) { struct felix *felix = ocelot_to_felix(ocelot); @@ -161,6 +240,8 @@ int felix_setup_8021q_tagging(struct ocelot *ocelot) rtnl_lock(); ret = dsa_8021q_setup(felix->dsa_8021q_ctx, true); rtnl_unlock(); + if (ret) + return ret; - return ret; + return felix_setup_mmio_filtering(felix); } diff --git a/drivers/net/dsa/ocelot/felix_vsc9959.c b/drivers/net/dsa/ocelot/felix_vsc9959.c index 2e5bbdca5ea4..3bbc500f28ea 100644 --- a/drivers/net/dsa/ocelot/felix_vsc9959.c +++ b/drivers/net/dsa/ocelot/felix_vsc9959.c @@ -1362,6 +1362,7 @@ static const struct felix_info felix_info_vsc9959 = { .num_tx_queues = FELIX_NUM_TC, .switch_pci_bar = 4, .imdio_pci_bar = 0, + .quirk_no_xtr_irq = true, .ptp_caps = &vsc9959_ptp_caps, .mdio_bus_alloc = vsc9959_mdio_bus_alloc, .mdio_bus_free = vsc9959_mdio_bus_free,