From patchwork Wed Feb 14 12:22:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 128330 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp549761ljc; Wed, 14 Feb 2018 04:24:34 -0800 (PST) X-Google-Smtp-Source: AH8x2272niCT+xDJ02s+1qVp+Gbby9eCDeeGOifKiIGu9c0e9knJXi+/utPfMJ9mG+UXYbQK/JaE X-Received: by 10.36.69.131 with SMTP id c3mr5488885itd.126.1518611074847; Wed, 14 Feb 2018 04:24:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518611074; cv=none; d=google.com; s=arc-20160816; b=IA9qFJjkn7z5w+NAer4Y5Jo9XsoxBxn4CMaiboDWeb4EsjNOtPJ4QA0lblRYxH5P3G thD7Cir2Cqz6K6Ahy7G0SZw1SFFQGhQZbdHlflHBNGvTOldLdp+QPt4Yh1iktqb2zF2Q aDMGGc5CGHX9tX466dJ9+NPZmwU0O1lr3sniPuH5BcuMm9Anv1Dki1NO83PSX7LQqvNr EF8A75U+Y51hvOeVG3KRlMBpkcyUZKu/uPHZj1tPKvcLq5mOvF2QAl+MzD4JIfyPGodb g5Wuj4dDai/D4/T4e6IGVbhPnVyk9e+dbi1dXqdZ0h65EiOm3tAUdWWZHvwEX0e+QxD9 haew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:cc:message-id:date:to:from :arc-authentication-results; bh=Dj/ZkOZTPiLmVaVV0Ztp9RZLQVZ3f3Y++LOGcxMo5LA=; b=knGe0SwABLicsgkpxlvvHbp8X/Tkn3DPirKmBJP+PCxIFdBbwnsWRL6vqpLYQMgQ1X 6hlsWyk1b1snpHwbPldWz6uPRdhv4zMhRNDOt+23ohStI9zW4j3JhiP08lgrZLOg8eQs JJ2H4mXpQiiqgzHzAMkcuaDpyodV3N8k4nxa0U6tIXJ4ljdVQZxhkm2LXazfDH6S2bZl 83lbQ7pmNwmTmRAb65y0FN5Fs1rMiSd/O26BMXtd2Lkf2G6GfqHWwdwzZZy/5ADDL2MG sicHhllgCOr3Hqgxh9Lnj6u4s8lZ3M/Zx9HExOEmSCp3ehFbU1zklvCc4/qs2FtjHXEy odWw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id u35si1344161ioi.278.2018.02.14.04.24.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 14 Feb 2018 04:24:34 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1elw53-0000Wr-Gn; Wed, 14 Feb 2018 12:22:33 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1elw52-0000Wh-IN for xen-devel@lists.xen.org; Wed, 14 Feb 2018 12:22:32 +0000 X-Inumbo-ID: a4901cf0-1181-11e8-ba59-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id a4901cf0-1181-11e8-ba59-bc764e045a96; Wed, 14 Feb 2018 13:21:54 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EB05980D; Wed, 14 Feb 2018 04:22:29 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.206.53]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0A6523F487; Wed, 14 Feb 2018 04:22:28 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Wed, 14 Feb 2018 12:22:23 +0000 Message-Id: <20180214122223.20590-1-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org Subject: [Xen-devel] [PATCH] xen/arm: cpuerrata: Actually check errata on non-boot CPUs X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The cpu errata framework was introduced in commit 8b01f6364f "xen/arm: Detect silicon revision and set cap bits accordingly" and was meant to detect errata present on any CPUs (via check_local_cpu_errata). However, the function to check the MIDR (is_affected_midr_range) mistakenly always use the boot CPU MIDR. Fix is_affected_midr_range to use the current CPU MIDR. Reported-by: Stefano Stabellini Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- This should be backported up to Xen 4.7 as the cpu errata framework was backported for XSA-254. --- xen/arch/arm/cpuerrata.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c index 9c7458ef06..c243521ed4 100644 --- a/xen/arch/arm/cpuerrata.c +++ b/xen/arch/arm/cpuerrata.c @@ -230,7 +230,7 @@ static int enable_ic_inv_hardening(void *data) static bool __maybe_unused is_affected_midr_range(const struct arm_cpu_capabilities *entry) { - return MIDR_IS_CPU_MODEL_RANGE(boot_cpu_data.midr.bits, entry->midr_model, + return MIDR_IS_CPU_MODEL_RANGE(current_cpu_data.midr.bits, entry->midr_model, entry->midr_range_min, entry->midr_range_max); }