From patchwork Wed Feb 21 16:00:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 129096 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp782413ljc; Wed, 21 Feb 2018 08:03:22 -0800 (PST) X-Google-Smtp-Source: AH8x224oE54VJaDOBiWm6lLAmjFH2mqiFwkGTElX1EUdN75ouVuvJl8/H4Z3GdEYa170P0SGSyHn X-Received: by 2002:a17:902:367:: with SMTP id 94-v6mr3647177pld.140.1519229002021; Wed, 21 Feb 2018 08:03:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519229002; cv=none; d=google.com; s=arc-20160816; b=zoWeEfkGMpHRy7zsLBolUnnczfyu5J32LdlZHXhDzY97jABw0TdAwcdK9nRLTV6Jp9 IrC8BTZlahWKYnewVuXpEqWZf3R5SW1UH0JbUa9VYOl4ZcBfRjlYPDoumCd7NN+cXZem ZVgJdyAbZBTr8qzis/18Cn+RO6sHkYwNp4EBBW1/vloN2sFLHJaHg/PCl9mU1VFv94EF RIIUjakRwmDl4PxgWc3Sw5SnMh+CiqX8GiHY6tXRUTE6nhKpPocTWN5Ql9J5zdcshAds JTW4IDURN+hgTbvQVQC/rKrrhoDmfcaeMEHrnb/vRd5jYLSR3ewG6BtRjCBq/LPGKSxj h/4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=c2BE+LEN/jxon3KytPQx02LPumw7NQEqmgbCiPGGvpM=; b=cDOsjddDDxA3ogaxL2Xb3un6EEAqjR3ZVVK5ayyF6OY7DBMM36b2GIgA/KSgE20spU nGV27ct/BU67hNGc9XXZmKk1tiJTpOdczBsP9gVlfOdAAGZZ2zXO0yM6s8Y7ekGrxGdx qZ9kxprWFe7kDlPfFgBUCAWSMAJgARng6kffE7KZ64F3+mryDN3HzYgjRDqyPKhxs3Qs 0CZpt12euS4TauaN8wkly5fzRFvaWMFiJiQ+8KDd/iPE452moSd8j/qQ/e7LgrKJnCHQ ZpSPAw8kzbJLQbGd5lEdf3GxirkkoLJc1Duuu4JYjB1lGJNRHjRCTQxN4mZHWIBlln2h 9ktQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=e2Gc9E1U; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w3si11677742pgb.258.2018.02.21.08.03.21; Wed, 21 Feb 2018 08:03:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=e2Gc9E1U; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754748AbeBUQDT (ORCPT + 6 others); Wed, 21 Feb 2018 11:03:19 -0500 Received: from mail-pl0-f66.google.com ([209.85.160.66]:38285 "EHLO mail-pl0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966187AbeBUQDM (ORCPT ); Wed, 21 Feb 2018 11:03:12 -0500 Received: by mail-pl0-f66.google.com with SMTP id d4so1138289pll.5 for ; Wed, 21 Feb 2018 08:03:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=OcyYPtrWHA8VQyhnM9ez88EcS2soOXuB7xEhbdWAWl0=; b=e2Gc9E1UkdJH9F8CJIyKXYghEsQFlrYrHM7MRok/cT64N7sJ/GKmKEzTHcZKEIGSf+ 5xMO6vlxYjjlHh/lGpvRegPQd/9uldM5ZevXWxMIvXGhfv2veqFwgGYDJOr7lVQiuBgs /PR5xyq3G1GUGFY5ZlkMgLTS6aIEULlmNo3ys= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=OcyYPtrWHA8VQyhnM9ez88EcS2soOXuB7xEhbdWAWl0=; b=lE/o6hjEAEUZ9NsBaVsZT2Ri8qjOjEONbadTG6s4trpSgY8n6SJTu3OAeSsbA5C5a+ mI2hPQipAeES73ktQR1VXk5T5YYBfaHuaFPwQQ41oNvutF1T90HhZQK/MkonSzMg+agA UdGhqwH6+tSjcfBN6hFZp1xTy1v/gRa82eb2mjbwYI5vQtcxctNogwGrIeqxL9LsMi7D O9e1mv4JApfti0SzAL9pwVz8WuzL0Aefls5hLBBVB8gFtxGovO3zSjm2j7qccoVC6G5c ypXhzIaj2G2gwZY26KySa+uM4b/y3T1wL2DxCPamnlZVfyIf44eaBZRpDggw3RFT6R82 Zw6A== X-Gm-Message-State: APf1xPDHBRcKXDOcgP0lys9OJHTBRMd6YD7ftAAXdotxCyuiPrTAjR5T MyX25CJShTMlxI6KBGmVPIrf X-Received: by 2002:a17:902:6c4d:: with SMTP id h13-v6mr420332pln.273.1519228991848; Wed, 21 Feb 2018 08:03:11 -0800 (PST) Received: from localhost.localdomain ([2405:204:7346:6848:3cb8:23ad:d761:239e]) by smtp.gmail.com with ESMTPSA id s67sm43068910pfg.104.2018.02.21.08.03.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 21 Feb 2018 08:03:11 -0800 (PST) From: Manivannan Sadhasivam To: linus.walleij@linaro.org, robh+dt@kernel.org, afaerber@suse.de Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, Manivannan Sadhasivam Subject: [PATCH v2 06/10] arm64: dts: actions: Add S900 gpio nodes Date: Wed, 21 Feb 2018 21:30:40 +0530 Message-Id: <20180221160044.15089-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180221160044.15089-1-manivannan.sadhasivam@linaro.org> References: <20180221160044.15089-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add gpio nodes for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/actions/s900-bubblegum-96.dts | 6 +++ arch/arm64/boot/dts/actions/s900.dtsi | 48 +++++++++++++++++++++++ 2 files changed, 54 insertions(+) -- 2.14.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts b/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts index ff043c961d75..60ddaf98401b 100644 --- a/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts +++ b/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts @@ -14,6 +14,12 @@ aliases { serial5 = &uart5; + gpio0 = &gpioa; + gpio1 = &gpiob; + gpio2 = &gpioc; + gpio3 = &gpiod; + gpio4 = &gpioe; + gpio5 = &gpiof; }; chosen { diff --git a/arch/arm64/boot/dts/actions/s900.dtsi b/arch/arm64/boot/dts/actions/s900.dtsi index 0156483f0f4d..9c7843045850 100644 --- a/arch/arm64/boot/dts/actions/s900.dtsi +++ b/arch/arm64/boot/dts/actions/s900.dtsi @@ -180,6 +180,54 @@ clocks = <&cmu CLK_GPIO>; }; + gpioa: gpioa@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 32>; + }; + + gpiob: gpiob@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 32 32>; + }; + + gpioc: gpioc@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 64 12>; + }; + + gpiod: gpiod@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 76 30>; + }; + + gpioe: gpioe@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 106 32>; + }; + + gpiof: gpiof@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 138 8>; + }; + timer: timer@e0228000 { compatible = "actions,s900-timer"; reg = <0x0 0xe0228000 0x0 0x8000>; From patchwork Wed Feb 21 16:00:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 129100 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp783667ljc; Wed, 21 Feb 2018 08:04:26 -0800 (PST) X-Google-Smtp-Source: AH8x226JPWoE0S+EJwcDIcQUs9Ddpj2fF4nK0TK3q5ssDzN2hAZJR//t3Tz7My7l2vr7TZdP3Csl X-Received: by 10.98.153.157 with SMTP id t29mr3784619pfk.201.1519229066391; Wed, 21 Feb 2018 08:04:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519229066; cv=none; d=google.com; s=arc-20160816; b=v1nKtyy5M8KlDjk6xk9fa8msjcjcCyPYioCSvD/8SLIsAF44fRvcZubFtARpnvefJQ znI2lrg3yyPwWxK2dEr9n8S/9LpgBq4NcQLKqCFLrbZGMCL70k75vRSIun7G0dz6kWoa TThq3qX91Si/5y5hfUDNLmrQFfZZ7fY68yRQQ99eOS8+eyMFTPc2ifpUvtcslQ4J56DP uq0ZzuMLU3PnSWpcaAXrmP1qyiz9qu2HLA9rqM8fvXTKbvXJ6nC2ZsDtc2JdoJjJukto d6wEyVNSNXC1/HPZErMymVf8JAkgbASCo25Qt8T0LOSkqPXOY5z0wvkzQzyt6piZVECj QFAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=tRROaHi4JgKlV4mQy153Gdkik8fj6lBSeNpt+UP9xjk=; b=EUzp9mZUdMK53a/cZxokb5Aw1AP7kuZqYsFdG/RrppPB2Wb1j/9+v7IRt6SxJuT2vQ rP01I1mTCxfF6b1p+HFyF6W6SaaD6CW8fRIK/UXybG6hOu00f5IHqWf0Ux/yS98/gWtZ jdVq1dK0G7V+vpuwxPw8TkRlMLCXQ6T5CECgqnNJtQFrG2/+wjBR5ofWxP0G2oEsH4cL e77rY6tMVqGKVUw2iy40/lGiU5KLOviqCbKHYPLL+mvVmYpnyoxX+iXE17OaoHz1Ibo9 /Ua6ovwWq/eYMxODWlGtEIzAReDZZFl3n4SBkEjcnwlMmZXujX1yHv2ZOznEnVsLbcYj PwFw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=bj+bNPll; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k9si1345414pgo.42.2018.02.21.08.04.26; Wed, 21 Feb 2018 08:04:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=bj+bNPll; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934652AbeBUQEY (ORCPT + 6 others); Wed, 21 Feb 2018 11:04:24 -0500 Received: from mail-pf0-f193.google.com ([209.85.192.193]:46525 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966191AbeBUQD3 (ORCPT ); Wed, 21 Feb 2018 11:03:29 -0500 Received: by mail-pf0-f193.google.com with SMTP id z24so814477pfh.13 for ; Wed, 21 Feb 2018 08:03:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9VUvw6ASmiGcXdK0Fr/Xz8hMRnF5k/TpJ9EiJPPHy88=; b=bj+bNPll7eP7Ge7mdJj0I6cZxFrZoHezvyCjiX9ofOwfxGqIlapFHkMez88CY2xV/5 qXkmNJFy5UIVObpTfDq8Q3v8owdGlF4JRa1W//R+RR0U3OAMhNYgUEJGj8G6k0gZ7zVv oHoFOxejh6ZX7QD0Uhb9GQRncY4f5yyCPoQK0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9VUvw6ASmiGcXdK0Fr/Xz8hMRnF5k/TpJ9EiJPPHy88=; b=sSbEyLoal48WggSWTnpoCNpRoTCNZE5iLl1xREmphgPT/r/zKX0jhiwQog6a7oDHwY cV2C38EYQLcEpXULHbbTjCz5Sgquc6d7ZZTjS89YxoU6kCbvCIeeKvjqgwPlwAkTm95x jy8tTD7w5YlulDalCnV5fL6YAXmUazzgt2GZYSGXAX6PvZubH78lmH5OqBZw/KfYHRBS Era/3/2ybMUpAlVnYSKfIXnnod9KftWF41XgwO0ll9IMK45T+B8rwtM9rlTyFANeLCBb iWAS862co72TOpwts9oDUCNMBNcMV5iSBXmWnWMDS2JvH2PzWjB9P1Afi5jktlmx+miE JHcQ== X-Gm-Message-State: APf1xPDEn+Or+5raDWKE3VIy2bTBSN/O74SZjUp1JKSo4OJDGvOBQF/B vMXf/fNa9MrTsNDnjvDg+/JK X-Received: by 10.98.93.87 with SMTP id r84mr3761800pfb.131.1519229008087; Wed, 21 Feb 2018 08:03:28 -0800 (PST) Received: from localhost.localdomain ([2405:204:7346:6848:3cb8:23ad:d761:239e]) by smtp.gmail.com with ESMTPSA id s67sm43068910pfg.104.2018.02.21.08.03.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 21 Feb 2018 08:03:27 -0800 (PST) From: Manivannan Sadhasivam To: linus.walleij@linaro.org, robh+dt@kernel.org, afaerber@suse.de Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, Manivannan Sadhasivam Subject: [PATCH v2 08/10] gpio: Add gpio driver for Actions OWL S900 SoC Date: Wed, 21 Feb 2018 21:30:42 +0530 Message-Id: <20180221160044.15089-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180221160044.15089-1-manivannan.sadhasivam@linaro.org> References: <20180221160044.15089-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add gpio driver for Actions Semi OWL family S900 SoC. Set of registers controlling the gpio shares the same register range with pinctrl block. GPIO registers are organized as 6 banks and each bank controls the maximum of 32 gpios. Signed-off-by: Manivannan Sadhasivam --- drivers/gpio/Kconfig | 8 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-owl.c | 219 ++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 228 insertions(+) create mode 100644 drivers/gpio/gpio-owl.c -- 2.14.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 8dbb2280538d..09ceb98e2434 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -364,6 +364,14 @@ config GPIO_OMAP help Say yes here to enable GPIO support for TI OMAP SoCs. +config GPIO_OWL + tristate "Actions OWL GPIO support" + default ARCH_ACTIONS + depends on ARCH_ACTIONS || COMPILE_TEST + depends on OF_GPIO + help + Say yes here to enable GPIO support for Actions OWL SoCs. + config GPIO_PL061 bool "PrimeCell PL061 GPIO support" depends on ARM_AMBA diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index cccb0d40846c..b2bb11d4675f 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -91,6 +91,7 @@ obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o obj-$(CONFIG_GPIO_OCTEON) += gpio-octeon.o obj-$(CONFIG_GPIO_OMAP) += gpio-omap.o +obj-$(CONFIG_GPIO_OWL) += gpio-owl.o obj-$(CONFIG_GPIO_PCA953X) += gpio-pca953x.o obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf857x.o obj-$(CONFIG_GPIO_PCH) += gpio-pch.o diff --git a/drivers/gpio/gpio-owl.c b/drivers/gpio/gpio-owl.c new file mode 100644 index 000000000000..0464c08e0422 --- /dev/null +++ b/drivers/gpio/gpio-owl.c @@ -0,0 +1,219 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * OWL SoC's GPIO driver + * + * Copyright (c) 2018 Linaro Ltd. + * Author: Manivannan Sadhasivam + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define GPIO_OUTEN 0x0000 +#define GPIO_INEN 0x0004 +#define GPIO_DAT 0x0008 + +#define OWL_GPIO_PORT_A 0 +#define OWL_GPIO_PORT_B 1 +#define OWL_GPIO_PORT_C 2 +#define OWL_GPIO_PORT_D 3 +#define OWL_GPIO_PORT_E 4 +#define OWL_GPIO_PORT_F 5 + +struct owl_gpio_port { + const char *name; + unsigned int offset; + unsigned int pins; +}; + +struct owl_gpio { + struct gpio_chip gpio; + const struct owl_gpio_port *port; + void __iomem *base; + int id; +}; + +static void owl_gpio_set_reg(void __iomem *base, unsigned int pin, int flag) +{ + u32 val; + + if (flag) { + val = readl(base); + val |= BIT(pin); + writel(val, base); + } else { + val = readl(base); + val &= ~BIT(pin); + writel(val, base); + } +} + +static int owl_gpio_request(struct gpio_chip *chip, unsigned int offset) +{ + struct owl_gpio *gpio = gpiochip_get_data(chip); + const struct owl_gpio_port *port = gpio->port; + void __iomem *gpio_base = gpio->base + port->offset; + + /* + * GPIOs have higher priority over other modules, so either setting + * them as OUT or IN is sufficient + */ + owl_gpio_set_reg(gpio_base + GPIO_OUTEN, offset, true); + + return 0; +} + +static void owl_gpio_free(struct gpio_chip *chip, unsigned int offset) +{ + struct owl_gpio *gpio = gpiochip_get_data(chip); + const struct owl_gpio_port *port = gpio->port; + void __iomem *gpio_base = gpio->base + port->offset; + + /* disable gpio output */ + owl_gpio_set_reg(gpio_base + GPIO_OUTEN, offset, false); + + /* disable gpio input */ + owl_gpio_set_reg(gpio_base + GPIO_INEN, offset, false); +} + +static int owl_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + struct owl_gpio *gpio = gpiochip_get_data(chip); + const struct owl_gpio_port *port = gpio->port; + void __iomem *gpio_base = gpio->base + port->offset; + u32 val; + + val = readl(gpio_base + GPIO_DAT); + + return !!(val & BIT(offset)); +} + +static void owl_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) +{ + struct owl_gpio *gpio = gpiochip_get_data(chip); + const struct owl_gpio_port *port = gpio->port; + void __iomem *gpio_base = gpio->base + port->offset; + u32 val; + + val = readl(gpio_base + GPIO_DAT); + + if (value) + val |= BIT(offset); + else + val &= ~BIT(offset); + + writel(val, gpio_base + GPIO_DAT); +} + +static int owl_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) +{ + struct owl_gpio *gpio = gpiochip_get_data(chip); + const struct owl_gpio_port *port = gpio->port; + void __iomem *gpio_base = gpio->base + port->offset; + + owl_gpio_set_reg(gpio_base + GPIO_OUTEN, offset, false); + owl_gpio_set_reg(gpio_base + GPIO_INEN, offset, true); + + return 0; +} + +static int owl_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int value) +{ + struct owl_gpio *gpio = gpiochip_get_data(chip); + const struct owl_gpio_port *port = gpio->port; + void __iomem *gpio_base = gpio->base + port->offset; + + owl_gpio_set_reg(gpio_base + GPIO_INEN, offset, false); + owl_gpio_set_reg(gpio_base + GPIO_OUTEN, offset, true); + owl_gpio_set(chip, offset, value); + + return 0; +} + +#define OWL_GPIO_PORT(port, base, count) \ + [OWL_GPIO_PORT_##port] = { \ + .name = #port, \ + .offset = base, \ + .pins = count, \ + } + +static const struct owl_gpio_port s900_gpio_ports[] = { + OWL_GPIO_PORT(A, 0x0000, 32), + OWL_GPIO_PORT(B, 0x000C, 32), + OWL_GPIO_PORT(C, 0x0018, 12), + OWL_GPIO_PORT(D, 0x0024, 30), + OWL_GPIO_PORT(E, 0x0030, 32), + OWL_GPIO_PORT(F, 0x00F0, 8), +}; + +static int owl_gpio_probe(struct platform_device *pdev) +{ + struct owl_gpio *gpio; + const struct owl_gpio_port *port; + int ret; + + gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); + if (!gpio) + return -ENOMEM; + + gpio->base = of_iomap(pdev->dev.of_node, 0); + if (IS_ERR(gpio->base)) + return PTR_ERR(gpio->base); + + gpio->id = of_alias_get_id(pdev->dev.of_node, "gpio"); + if (gpio->id < 0) + return gpio->id; + + port = &s900_gpio_ports[gpio->id]; + + gpio->gpio.request = owl_gpio_request; + gpio->gpio.free = owl_gpio_free; + gpio->gpio.get = owl_gpio_get; + gpio->gpio.set = owl_gpio_set; + gpio->gpio.direction_input = owl_gpio_direction_input; + gpio->gpio.direction_output = owl_gpio_direction_output; + + gpio->gpio.base = -1; + gpio->gpio.parent = &pdev->dev; + gpio->gpio.label = port->name; + gpio->gpio.ngpio = port->pins; + + gpio->port = port; + + platform_set_drvdata(pdev, gpio); + + ret = devm_gpiochip_add_data(&pdev->dev, &gpio->gpio, gpio); + if (ret < 0) { + dev_err(&pdev->dev, "Failed to register gpiochip\n"); + return ret; + } + + return 0; +} + +static const struct of_device_id owl_gpio_of_match[] = { + { .compatible = "actions,s900-gpio", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, owl_gpio_of_match); + +static struct platform_driver owl_gpio_driver = { + .driver = { + .name = "owl-gpio", + .of_match_table = owl_gpio_of_match, + }, + .probe = owl_gpio_probe, +}; +module_platform_driver(owl_gpio_driver); + +MODULE_AUTHOR("Manivannan Sadhasivam "); +MODULE_DESCRIPTION("Actions Semi OWL SoCs GPIO driver"); +MODULE_LICENSE("GPL"); From patchwork Wed Feb 21 16:00:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 129098 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp782807ljc; Wed, 21 Feb 2018 08:03:42 -0800 (PST) X-Google-Smtp-Source: AH8x225YZjsKaK8tIUiu09uOV9QQ57pFFHpAp/sSmvWtjjUFOjxGHmbHmMWUWjdqiTZHHEbmyW/S X-Received: by 2002:a17:902:bd09:: with SMTP id p9-v6mr3562499pls.355.1519229022140; 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[209.132.180.67]) by mx.google.com with ESMTP id l6si2231483pff.308.2018.02.21.08.03.41; Wed, 21 Feb 2018 08:03:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Ibs555d4; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754771AbeBUQDj (ORCPT + 6 others); Wed, 21 Feb 2018 11:03:39 -0500 Received: from mail-pg0-f68.google.com ([74.125.83.68]:43846 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753029AbeBUQDg (ORCPT ); Wed, 21 Feb 2018 11:03:36 -0500 Received: by mail-pg0-f68.google.com with SMTP id f6so791229pgs.10 for ; Wed, 21 Feb 2018 08:03:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IX7oqCwwBaM6ox4HzKtlBaoZmNIKqOVFs7iwDXSBKlk=; b=Ibs555d4vPYK2LNCO8EtHfCfqbdIas/VI/iBaPPcsR57ISQ83S5FNx9DXiA3xZXUi5 1vpi4oZChZdZxUzmljfdGTtwo0epWLnD4r+LLoqhKiuhtLXlEC1AbjLxc2e6C39cn6gN 3wdFIerrHmhM0EDetHOZOLipJrayHJ7SGw5Vw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IX7oqCwwBaM6ox4HzKtlBaoZmNIKqOVFs7iwDXSBKlk=; b=Dp3cFjdr25oJIyC6ShnPohYPvMaj+lcZjgdKqvkbwxsMzZG0Yv/lX+Er/hVZMVczgR tixJxuhiE7AgCRc9yGwyzt+d/z+0M3K1UXDtw/64PD03h3lCvZdC6mfQtK+Qx2cOnBjS OhAI63XPln7tVrKXDvKLYAuORHum2t35NpN6n5nvtGA/9engGAMLitiUREKqyPFDnYkQ OvkrKNwF6tfwLaeCXzJplXeMFC0U+yj6AMr4BYtv5rHzsThueSAs3RP4637FPWslKnE/ AmlFMYaz5JSAInakjk5xLWS8pHn89t+y/DrVVy60/rMwqWklxWoVrrHJ1smZnzaie9TQ y9kw== X-Gm-Message-State: APf1xPCQHBF+r+AYBvBRyW3qgvHUcAlXvYO2CS34ixyiV6e9XBjZXbE+ +ahG79A5YaL+jlz2/bf1MIDV X-Received: by 10.98.67.157 with SMTP id l29mr3770156pfi.214.1519229015540; Wed, 21 Feb 2018 08:03:35 -0800 (PST) Received: from localhost.localdomain ([2405:204:7346:6848:3cb8:23ad:d761:239e]) by smtp.gmail.com with ESMTPSA id s67sm43068910pfg.104.2018.02.21.08.03.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 21 Feb 2018 08:03:35 -0800 (PST) From: Manivannan Sadhasivam To: linus.walleij@linaro.org, robh+dt@kernel.org, afaerber@suse.de Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, Manivannan Sadhasivam Subject: [PATCH v2 09/10] MAINTAINERS: Add reviewer for ACTIONS platforms Date: Wed, 21 Feb 2018 21:30:43 +0530 Message-Id: <20180221160044.15089-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180221160044.15089-1-manivannan.sadhasivam@linaro.org> References: <20180221160044.15089-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Since I'll be working on improving support for ACTIONS platforms, adding myself as the reviewer. Signed-off-by: Manivannan Sadhasivam --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) -- 2.14.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/MAINTAINERS b/MAINTAINERS index 9a7f76eadae9..640dabc4c311 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1117,6 +1117,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git ARM/ACTIONS SEMI ARCHITECTURE M: Andreas Färber +R: Manivannan Sadhasivam L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained N: owl