From patchwork Tue Jan 12 14:30:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Maxim Uvarov X-Patchwork-Id: 361212 Delivered-To: patch@linaro.org Received: by 2002:a02:ccad:0:0:0:0:0 with SMTP id t13csp420636jap; Tue, 12 Jan 2021 06:37:18 -0800 (PST) X-Google-Smtp-Source: ABdhPJyvoXiDcDBwOLu/QVPpBCrmMqUBO/bxEvsdohTR5kTYbiJ93KbcLVAJUcgnYwoiRSa08Y2A X-Received: by 2002:a25:7d03:: with SMTP id y3mr7034268ybc.444.1610462238380; Tue, 12 Jan 2021 06:37:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610462238; cv=none; d=google.com; s=arc-20160816; b=MO6eSoEQIX/MIbZnRxpJbIN2bUh/DlfEigVo6x7zkpiwNYC1Rz0i2/oOS96FBcEUgW 9rNwTJTtG8mXYY+G9HNcSzQVT23VsdDyVux1bK0RmKkP2A1yXQoJTHqE5HYJswVaoWhu cffD+JZQhckH5IQdtbClLW6nT+wC6/ZdC/h0m/SRWk5jM4aOA+x4SVq75YS8dcjbhn/k d6zW12SHG3HgELbSSKte3UN+aNQOjLy2VmI9sfzt8OKKtAkc09h3fftGJR6WwT6E53Mv skUGllUWswqHv3CTiqVUSVyFRCk/BgGx3z/M6jK3VQlaJkCQGCVfGEVaItjIbZH12yBS wY6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=aSVqArs50dH6ORORx7j1pebjzF5WWw6+PDwzFqwRDNc=; b=MR+ontVHV8ETQ1x5vqmNSpfb6FxUQVqiLedPB+Oqu9iNFX82qNuECuPq4KtziVCCSQ GRqmsZ/PqxKwnsreBHHR+M+/IYChmQHYRi4zQDzPwP1ux3nBnOjOaAeet1bSJMOLXHwk 80KlrjoSov9ZtlEzyc1CU2rvgYPanSsFOZNq5zwliPKCi3XSEEG/1aI8RjIvtxCvZKN1 elsfKTu5XwEmUZxUvRgRw5Wr9fatVpmzRkklPn3O8ySpUpJwTcajZQgr1819S52Av3ZM hD5UVCD4nSMSr8CK63xlRLJQJbIlp887hKNdhZS7W30K22OWGNF1sscps56aW5A3oY/o 0TeA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=wZF6SMDI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id e9si2501392ybr.430.2021.01.12.06.37.18 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 12 Jan 2021 06:37:18 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=wZF6SMDI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56034 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kzKnN-0002pE-Pw for patch@linaro.org; Tue, 12 Jan 2021 09:37:17 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50678) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kzKhR-0006DO-5U for qemu-devel@nongnu.org; Tue, 12 Jan 2021 09:31:09 -0500 Received: from mail-lj1-x22a.google.com ([2a00:1450:4864:20::22a]:41262) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kzKhN-0004fb-EZ for qemu-devel@nongnu.org; Tue, 12 Jan 2021 09:31:08 -0500 Received: by mail-lj1-x22a.google.com with SMTP id f11so3040140ljm.8 for ; Tue, 12 Jan 2021 06:31:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=aSVqArs50dH6ORORx7j1pebjzF5WWw6+PDwzFqwRDNc=; b=wZF6SMDINx4eBMO6VmJVJ9zM5so/EZ3L9fBSFIVF/BJK3NYQ+ReRtgjPnE4F9v9RrF t979uwv/EYt1Bt3+sN6pfIUAYLuNrAYgVJ6q8eSeAUQl05q0xZd3psGuesZS4rhUPVbo a3r4RDtJ1HUwVBcwvb+EZjxiNg9hO6CxThkJXGqyCQsYCUMt0fUZm+9A57BlGEX7qmqF XTNYjqYQJb8dsiSVnvYPDIMuYDnFJNEuN83iJAtH1nWGNQ8BRW5fmTItJGr6VvJmexQG wLkf7UJb7Y9S+mZumlW54hfLSP2Fi76tc3RRHJ0JYAzA6w6FU83U8Jy9uqcKxD2DyBVz emuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=aSVqArs50dH6ORORx7j1pebjzF5WWw6+PDwzFqwRDNc=; b=lqnnWc4W+Du+Yp4fbx1yvd+GvSyRezvE5lVlepdrgg8howEGOgu1PD5PINq35kLuH9 cJwxwCyvyBCgU2Lb0KeUbhgrWqa2DoAeM3zRmnruaps+cvh849XpZYF2pvdKbvQbFtH+ b13Xe82G7/9nmjR2k/81yOo618vBOyovSdLoVdZBtrp+QHnV9mD1+B6zOry4G6F2FTBu 7SLIk0M6Xca+6KW7r0+LDZoK9NNJgM0c8nngz8i1wXGzESxkZy48ieBEG8/w5f8bkHlV utJr8TEDl63EWmJ/cfFxXu9xjjmZrZF78naY3Vmr5oXRTF2JWoaV7Ihuk9x2zHs7p/dW ZzqQ== X-Gm-Message-State: AOAM530PR+olnG8gb2NwEXNBLLv2wfmNh+pzya3VDEpuAZ3s0VcmcPaP /3iyeayx9TjSbUxdPzbiqC9RJw== X-Received: by 2002:a2e:2a83:: with SMTP id q125mr2169658ljq.436.1610461863000; Tue, 12 Jan 2021 06:31:03 -0800 (PST) Received: from localhost.localdomain ([2.92.195.184]) by smtp.gmail.com with ESMTPSA id c24sm365499ljn.116.2021.01.12.06.31.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Jan 2021 06:31:02 -0800 (PST) From: Maxim Uvarov To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCHv4 1/2] hw: gpio: implement gpio-pwr driver for qemu reset/poweroff Date: Tue, 12 Jan 2021 17:30:57 +0300 Message-Id: <20210112143058.12159-2-maxim.uvarov@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210112143058.12159-1-maxim.uvarov@linaro.org> References: <20210112143058.12159-1-maxim.uvarov@linaro.org> Received-SPF: pass client-ip=2a00:1450:4864:20::22a; envelope-from=maxim.uvarov@linaro.org; helo=mail-lj1-x22a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Maxim Uvarov , f4bug@amsat.org, Jose.Marinho@arm.com, tf-a@lists.trustedfirmware.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Implement gpio-pwr driver to allow reboot and poweroff machine. This is simple driver with just 2 gpios lines. Current use case is to reboot and poweroff virt machine in secure mode. Secure pl066 gpio chip is needed for that. Signed-off-by: Maxim Uvarov --- hw/gpio/Kconfig | 3 ++ hw/gpio/gpio_pwr.c | 70 +++++++++++++++++++++++++++++++++++++++++++++ hw/gpio/meson.build | 1 + 3 files changed, 74 insertions(+) create mode 100644 hw/gpio/gpio_pwr.c -- 2.17.1 Reviewed-by: Hao Wu Signed-off-by: Maxim Uvarov <maxim.uvarov@linaro.org>
Reviewed-by: Hao Wu <wuhaotsh@google.com> 
diff --git a/hw/gpio/Kconfig b/hw/gpio/Kconfig index b6fdaa2586..f0e7405f6e 100644 --- a/hw/gpio/Kconfig +++ b/hw/gpio/Kconfig @@ -8,5 +8,8 @@ config PL061 config GPIO_KEY bool +config GPIO_PWR + bool + config SIFIVE_GPIO bool diff --git a/hw/gpio/gpio_pwr.c b/hw/gpio/gpio_pwr.c new file mode 100644 index 0000000000..8ed8d5d24f --- /dev/null +++ b/hw/gpio/gpio_pwr.c @@ -0,0 +1,70 @@ +/* + * GPIO qemu power controller + * + * Copyright (c) 2020 Linaro Limited + * + * Author: Maxim Uvarov + * + * Virtual gpio driver which can be used on top of pl061 + * to reboot and shutdown qemu virtual machine. One of use + * case is gpio driver for secure world application (ARM + * Trusted Firmware.). + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +/* + * QEMU interface: + * two named input GPIO lines: + * 'reset' : when asserted, trigger system reset + * 'shutdown' : when asserted, trigger system shutdown + */ + +#include "qemu/osdep.h" +#include "hw/sysbus.h" +#include "sysemu/runstate.h" + +#define TYPE_GPIOPWR "gpio-pwr" +OBJECT_DECLARE_SIMPLE_TYPE(GPIO_PWR_State, GPIOPWR) + +struct GPIO_PWR_State { + SysBusDevice parent_obj; +}; + +static void gpio_pwr_reset(void *opaque, int n, int level) +{ + if (!level) { + qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); + } +} + +static void gpio_pwr_shutdown(void *opaque, int n, int level) +{ + if (!level) { + qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); + } +} + +static void gpio_pwr_init(Object *obj) +{ + DeviceState *dev = DEVICE(obj); + + qdev_init_gpio_in_named(dev, gpio_pwr_reset, "reset", 1); + qdev_init_gpio_in_named(dev, gpio_pwr_shutdown, "shutdown", 1); +} + +static const TypeInfo gpio_pwr_info = { + .name = TYPE_GPIOPWR, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(GPIO_PWR_State), + .instance_init = gpio_pwr_init, +}; + +static void gpio_pwr_register_types(void) +{ + type_register_static(&gpio_pwr_info); +} + +type_init(gpio_pwr_register_types) diff --git a/hw/gpio/meson.build b/hw/gpio/meson.build index 5c0a7d7b95..79568f00ce 100644 --- a/hw/gpio/meson.build +++ b/hw/gpio/meson.build @@ -1,5 +1,6 @@ softmmu_ss.add(when: 'CONFIG_E500', if_true: files('mpc8xxx.c')) softmmu_ss.add(when: 'CONFIG_GPIO_KEY', if_true: files('gpio_key.c')) +softmmu_ss.add(when: 'CONFIG_GPIO_PWR', if_true: files('gpio_pwr.c')) softmmu_ss.add(when: 'CONFIG_MAX7310', if_true: files('max7310.c')) softmmu_ss.add(when: 'CONFIG_PL061', if_true: files('pl061.c')) softmmu_ss.add(when: 'CONFIG_PUV3', if_true: files('puv3_gpio.c')) From patchwork Tue Jan 12 14:30:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxim Uvarov X-Patchwork-Id: 361213 Delivered-To: patch@linaro.org Received: by 2002:a02:ccad:0:0:0:0:0 with SMTP id t13csp422141jap; Tue, 12 Jan 2021 06:39:20 -0800 (PST) X-Google-Smtp-Source: ABdhPJxLPYPf+T18sVmTHdRVO1Vtmz/zsC2aEzhoFswNnwgW1vw9Bd0YFiFnrBl/QeGQPIBI2TFi X-Received: by 2002:a25:d295:: with SMTP id j143mr7492659ybg.20.1610462360126; Tue, 12 Jan 2021 06:39:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610462360; cv=none; d=google.com; s=arc-20160816; b=R2pgwxssEGYfIZIK6FDUigSPYcJULDMr0LeXHqidanzqecPrxt9wkcoDgV0376zNco 4jPepVs/2b2l8Nc1XI2ECFA68JJInC7hIKnjaecttUrWYGVCEn2TRNInv1iFwoSZMGGD cSMkMn8dv5cVT2VCV5dcLe6sqe82pMpWIXu+Yge6nf0EU2Q8fUFjFUid1vnAGI9MQK9D BfalDFtTcqPzFVbITU8qnkiODSpwmnZoY4ZhPX1BmacSSjY4XdBfw5tl8drfp7AuLVyT 4F4RNNileWqrjYQ0DNbD3wre3RGkgkXz0qM5JcBAkEJCf5QJMd02VDx6hOsQNG9kLQ4j xHOg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=QCSkSvV5HRs0ULOp7vuKE7k9WF5Xyng96RKUNvE/TUM=; b=VVm9HGcwYV6iCQRpXAu4ih99Aex2vkPiMaEuEeWPk5GwlN/QQblfBOFkj3t5KXT0mz yy6Gme8tb9N+hbrldIj1wVtABF1Sv7Cs6OUHICwaCqwWpfsHytAMduW2hzj7FbcbMehW CFViQTMDjflaTVuuyghVhVZkGhtUcob/GwXnvg1Df5s5rFsAz6R2eb/evSGiveM5hZ6u 95G1ryxSLiC/flHzylhqbDnF235IREVACI1F9QOkeZ8NFEDS5k23eds2vYYfjS9sQslO vZ5aSjWCmu/xcjfqeiccj1cMMcMSEk+J3FlNM7GiRPyxtCfvKktHQFSo57IqrmkvmBnV HJXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=tgMgHDpU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id c3si2964256ybn.190.2021.01.12.06.39.19 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 12 Jan 2021 06:39:20 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=tgMgHDpU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:32938 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kzKpL-0004yc-HK for patch@linaro.org; Tue, 12 Jan 2021 09:39:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50692) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kzKhT-0006El-ID for qemu-devel@nongnu.org; Tue, 12 Jan 2021 09:31:13 -0500 Received: from mail-lj1-x22f.google.com ([2a00:1450:4864:20::22f]:45624) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kzKhO-0004fd-EQ for qemu-devel@nongnu.org; Tue, 12 Jan 2021 09:31:11 -0500 Received: by mail-lj1-x22f.google.com with SMTP id f17so3006372ljg.12 for ; Tue, 12 Jan 2021 06:31:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=QCSkSvV5HRs0ULOp7vuKE7k9WF5Xyng96RKUNvE/TUM=; b=tgMgHDpUWkiKkpPbA5daH9ZlFpD91A1MeXp5VyAwmDGM/n1ugUxSAB3NekkkiVe9+v Nk/Wi1YgrPRW09n7Ht8aftDtkskvt3hW7iWzJeYClm5jdkG2A0YOW8rQe9EC0N1fGwHe ILjdR1LYNqeT2Wtsmka3cOmqE2CgCUL+sIQoxQ9um5lRQnEM85ZD0E8eMK6sIKvRsFX0 NajjQek+WKze7BBZM+JbhYGtrUKb0o30Gfyw4swZxftSO2GOWQNxR8aYHejiKfLzDzUM ESVGK+HVY1i97xAejZOgdCCA7T1S9spNJP+FgEy8wkvcj7392ENm+2z9k9igvOAmi1v2 Ug6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=QCSkSvV5HRs0ULOp7vuKE7k9WF5Xyng96RKUNvE/TUM=; b=F9RodGLqqGWKTqMumPhThJMuXEoDqER3DSMQeqeIGtnpN9ywLNmhe1unnUvgHWwcNk x5rvTXueUVjrQx9pdp4dRUir21tFTytEN3ss14gVFsi95vAQQvxs4a71WcrRtizo1r1z 3GUSGTbKfRChsmvCMNAHRwbXz7T6LFN3toZ7Qqde4XoPPZ9rpw6lzEjDc3E9AJbsQjsw 8ieg8nZLBBRcSCKrJE6U38eeH9lF743EukJpKTGVO+R8sulZck62kmWJVNM5vP52Izjc XmcH78rJuhdLBvZm/dP3ocwNtFMHGKJMuFK9NpT8vSky8IjmwYLJTiM2RbXtBZwQBgz9 hubQ== X-Gm-Message-State: AOAM532xeDY5WzfXNEpttbKvyNpteT7z2f6NbmpbhGAMdIaaXbS5pNUV WdwJjkCfnA2xH7pvMGm7iWrSXg== X-Received: by 2002:a2e:7307:: with SMTP id o7mr2110422ljc.452.1610461864211; Tue, 12 Jan 2021 06:31:04 -0800 (PST) Received: from localhost.localdomain ([2.92.195.184]) by smtp.gmail.com with ESMTPSA id c24sm365499ljn.116.2021.01.12.06.31.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Jan 2021 06:31:03 -0800 (PST) From: Maxim Uvarov To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCHv4 2/2] arm-virt: add secure pl061 for reset/power down Date: Tue, 12 Jan 2021 17:30:58 +0300 Message-Id: <20210112143058.12159-3-maxim.uvarov@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210112143058.12159-1-maxim.uvarov@linaro.org> References: <20210112143058.12159-1-maxim.uvarov@linaro.org> Received-SPF: pass client-ip=2a00:1450:4864:20::22f; envelope-from=maxim.uvarov@linaro.org; helo=mail-lj1-x22f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Maxim Uvarov , f4bug@amsat.org, Jose.Marinho@arm.com, tf-a@lists.trustedfirmware.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Add secure pl061 for reset/power down machine from the secure world (Arm Trusted Firmware). Connect it with gpio-pwr driver. Signed-off-by: Maxim Uvarov --- hw/arm/Kconfig | 1 + hw/arm/virt.c | 40 ++++++++++++++++++++++++++++++++++++++++ include/hw/arm/virt.h | 3 +++ 3 files changed, 44 insertions(+) -- 2.17.1 diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 0a242e4c5d..13cc42dcc8 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -17,6 +17,7 @@ config ARM_VIRT select PL011 # UART select PL031 # RTC select PL061 # GPIO + select GPIO_PWR select PLATFORM_BUS select SMBIOS select VIRTIO_MMIO diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 96985917d3..19605390c2 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -147,6 +147,7 @@ static const MemMapEntry base_memmap[] = { [VIRT_RTC] = { 0x09010000, 0x00001000 }, [VIRT_FW_CFG] = { 0x09020000, 0x00000018 }, [VIRT_GPIO] = { 0x09030000, 0x00001000 }, + [VIRT_SECURE_GPIO] = { 0x09031000, 0x00001000 }, [VIRT_SECURE_UART] = { 0x09040000, 0x00001000 }, [VIRT_SMMU] = { 0x09050000, 0x00020000 }, [VIRT_PCDIMM_ACPI] = { 0x09070000, MEMORY_HOTPLUG_IO_LEN }, @@ -864,6 +865,32 @@ static void create_gpio(const VirtMachineState *vms) g_free(nodename); } +#define ATF_GPIO_POWEROFF 3 +#define ATF_GPIO_REBOOT 4 + +static void create_gpio_secure(const VirtMachineState *vms, MemoryRegion *mem) +{ + DeviceState *gpio_pwr_dev; + SysBusDevice *s; + hwaddr base = vms->memmap[VIRT_SECURE_GPIO].base; + DeviceState *pl061_dev; + + /* Secure pl061 */ + pl061_dev = qdev_new("pl061"); + s = SYS_BUS_DEVICE(pl061_dev); + sysbus_realize_and_unref(s, &error_fatal); + memory_region_add_subregion(mem, base, sysbus_mmio_get_region(s, 0)); + + /* gpio-pwr */ + gpio_pwr_dev = sysbus_create_simple("gpio-pwr", -1, NULL); + + /* connect secure pl061 to gpio-pwr */ + qdev_connect_gpio_out(pl061_dev, ATF_GPIO_POWEROFF, + qdev_get_gpio_in_named(gpio_pwr_dev, "reset", 0)); + qdev_connect_gpio_out(pl061_dev, ATF_GPIO_REBOOT, + qdev_get_gpio_in_named(gpio_pwr_dev, "shutdown", 0)); +} + static void create_virtio_devices(const VirtMachineState *vms) { int i; @@ -1993,6 +2020,10 @@ static void machvirt_init(MachineState *machine) create_gpio(vms); } + if (vms->secure && vms->secure_gpio) { + create_gpio_secure(vms, secure_sysmem); + } + /* connect powerdown request */ vms->powerdown_notifier.notify = virt_powerdown_req; qemu_register_powerdown_notifier(&vms->powerdown_notifier); @@ -2567,6 +2598,12 @@ static void virt_instance_init(Object *obj) vms->its = true; } + if (vmc->no_secure_gpio) { + vms->secure_gpio = false; + } else { + vms->secure_gpio = true; + } + /* Default disallows iommu instantiation */ vms->iommu = VIRT_IOMMU_NONE; @@ -2608,8 +2645,11 @@ DEFINE_VIRT_MACHINE_AS_LATEST(6, 0) static void virt_machine_5_2_options(MachineClass *mc) { + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc)); + virt_machine_6_0_options(mc); compat_props_add(mc->compat_props, hw_compat_5_2, hw_compat_5_2_len); + vmc->no_secure_gpio = true; } DEFINE_VIRT_MACHINE(5, 2) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index abf54fab49..a140e75444 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -81,6 +81,7 @@ enum { VIRT_GPIO, VIRT_SECURE_UART, VIRT_SECURE_MEM, + VIRT_SECURE_GPIO, VIRT_PCDIMM_ACPI, VIRT_ACPI_GED, VIRT_NVDIMM_ACPI, @@ -127,6 +128,7 @@ struct VirtMachineClass { bool kvm_no_adjvtime; bool no_kvm_steal_time; bool acpi_expose_flash; + bool no_secure_gpio; }; struct VirtMachineState { @@ -136,6 +138,7 @@ struct VirtMachineState { FWCfgState *fw_cfg; PFlashCFI01 *flash[2]; bool secure; + bool secure_gpio; bool highmem; bool highmem_ecam; bool its;