From patchwork Fri Feb 23 13:36:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrice Gasnier X-Patchwork-Id: 129366 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp614957lja; Fri, 23 Feb 2018 05:37:00 -0800 (PST) X-Google-Smtp-Source: AH8x226Dl+7qUNnJfTZxNzP4dYLsDeB+8GatkrYCCfPLofRmiGTNbUcUbxTPwF3E7AlWzEbotqsX X-Received: by 10.98.231.26 with SMTP id s26mr1821933pfh.210.1519393020623; Fri, 23 Feb 2018 05:37:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519393020; cv=none; d=google.com; s=arc-20160816; b=EViJPsf8C6RNfeNvzEY5FhJp3D/tGB96JAq5WSvCy3x3Lw6r+VzxNB1VbMyWYGiGQn pPDJPBaaxWMVAudcVJzfesL/BVi34iKSUN9hroi9WAnDubY/wGSJL+R/MAmoO9VSHQv5 gVD8Be0ViqAF/Ns5yfCsmbxW1Sfv42WG/zr39gdFnVpSnJS8NH5MJP498uD8JVBXCeV+ bJrgo8qW1ZL7v8C5dny5ZL7yU2bVxMkOSCgV8fpmoLKOJBLmDmHumnIBG/sVZwnaG2pq pvDx6X2qDe/vPPW8GBjTr0ytAa1SvORjwyYne8Jl2GUklorx+vhvqCjykPjOXmncgS1l lXzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=oDUgfYhBKsiL2TemZ/Ng/2dFp48rmloa+K20VaZ1EJE=; b=FWfuZLTpMWCOR0r6ivZ8i4FP30f4y3gENw5QbfPGdauN2xBYzi51MI/Zp7W94EEVvQ Mvb4X5ew5qCPBuyovmQjvsu2tW+VZB8RjR8T4WV6X1WQndsYZZfFT7PWlBUsSVcE2Iku byEer8J7lKzq95FYwB1YN1gGBoK0/N+gb68oDwsvHeAj10v7Xw/x+kUgbOpI3OAeazn0 qhhaYGuuWaLrbCj5xdFzIsmOWUs5KPAXmaPP6zsUDcV/qjAJAn4/TEJgCsQWegj98yf4 wg6Dw0ZvRP8yy89Iyy/2wIn5w2Ggvc6rEkyxf0BmHuWkwkd+T/bk85q+2holvDhXxLL7 Wdjw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q2-v6si1797163plh.499.2018.02.23.05.37.00; Fri, 23 Feb 2018 05:37:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751674AbeBWNg4 (ORCPT + 28 others); Fri, 23 Feb 2018 08:36:56 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:15842 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751581AbeBWNgx (ORCPT ); Fri, 23 Feb 2018 08:36:53 -0500 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1NDXj1c023332; Fri, 23 Feb 2018 14:36:19 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2g9bn31x5h-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 23 Feb 2018 14:36:19 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 09A2631; Fri, 23 Feb 2018 13:36:19 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node3.st.com [10.75.127.15]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D6FD94F32; Fri, 23 Feb 2018 13:36:18 +0000 (GMT) Received: from localhost (10.75.127.47) by SFHDAG5NODE3.st.com (10.75.127.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 23 Feb 2018 14:36:18 +0100 From: Fabrice Gasnier To: , CC: , , , , , , , , , Subject: [RESEND PATCH 1/3] dt-bindings: pwm-stm32-lp: add #pwm-cells Date: Fri, 23 Feb 2018 14:36:03 +0100 Message-ID: <1519392965-28235-2-git-send-email-fabrice.gasnier@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1519392965-28235-1-git-send-email-fabrice.gasnier@st.com> References: <1519392965-28235-1-git-send-email-fabrice.gasnier@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG5NODE3.st.com (10.75.127.15) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-23_04:, , signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Gerald Baeza STM32 Low-Power Timer supports generic 3 cells pwm to encode PWM number, period and polarity. Signed-off-by: Gerald Baeza Signed-off-by: Fabrice Gasnier Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt | 3 +++ 1 file changed, 3 insertions(+) -- 1.9.1 diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt index f8338d1..bd23302 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt @@ -7,6 +7,8 @@ See ../mfd/stm32-lptimer.txt for details about the parent node. Required parameters: - compatible: Must be "st,stm32-pwm-lp". +- #pwm-cells: Should be set to 3. This PWM chip uses the default 3 cells + bindings defined in pwm.txt. Optional properties: - pinctrl-names: Set to "default". @@ -18,6 +20,7 @@ Example: ... pwm { compatible = "st,stm32-pwm-lp"; + #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&lppwm1_pins>; }; From patchwork Fri Feb 23 13:36:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrice Gasnier X-Patchwork-Id: 129367 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp615908lja; Fri, 23 Feb 2018 05:37:58 -0800 (PST) X-Google-Smtp-Source: AH8x2244a3Z+/q9Sa8BajC5hMkAcB0+5RjDESJOuFAcqdVyD4XoE5EBG9m+pN0fr6k1ymwNKX1Rx X-Received: by 10.99.67.133 with SMTP id q127mr1489449pga.365.1519393078664; Fri, 23 Feb 2018 05:37:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519393078; cv=none; d=google.com; s=arc-20160816; b=Z7eHHrw1KYKKxfMAiW0gG/fpu1ox7BlAEEsQPqiWfeA5i2tdZerNrcAvDpwFgVKifx mQ2u9nJpVOqu3UqN483VrVla2NoX8zNrwlPyVWAUaERUka6969m7JY0cIRoChNvt/2Ns SLRrB9mTB2vVrExvKl+mayDoeuMVRFhOyTx/s7yIxjSUbUwuvqdK4LG+IQEqZhDn3p4X i5PJ4icKiqefiApTj+UD/M773sbdbB5Z5Y9YYumnMpZOtt6OXcEkPtjsAXZv9nK/+OQ1 Y1bES+Zw8QgQt0VYw21jncPfXP2MTNWDTUZIVA4x8xp7DHv7MeNIAIw0K9ueNHGphTzh DUZg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=5N2gmCwqJO50pdC59a6ECZVeOSSeMSmBokP9wD10o2U=; b=oJ0/Ou0GwM1yJz4DFMUZYwxx4FuROkdvTNYkokUXtsNJO20XrvgFpUTwrTler9J/1k IESi/b16/smWazu6H4AgNh/v6yfJXafLezSH+ePvrqYtWVz8uctn7+UBC3ot1+5VBHtK DbGYk098pDo6MDM/5sX67zSc2KoVSRbpWb3Hs1p9NNJ1YI+4wSmR7CChsWf0AXRpt/ke SN+uExJ7iI4l5VHhc0PBxwsuUaEpf0Q+55pXllmlT24Z4GtIszzkD+FhEKSL/ffrFytR UDuUoZfo+5GCI/Z5mAzOTyBBuDKlotDDfyDoMRF9XoUCqu9Z1syTam5bvI8U+q7LDMw/ 4RFA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q2si1534456pgf.90.2018.02.23.05.37.58; Fri, 23 Feb 2018 05:37:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751843AbeBWNhy (ORCPT + 28 others); Fri, 23 Feb 2018 08:37:54 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:37102 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751437AbeBWNgx (ORCPT ); Fri, 23 Feb 2018 08:36:53 -0500 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1NDYREW002639; Fri, 23 Feb 2018 14:36:20 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2g9bqv1wu8-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 23 Feb 2018 14:36:20 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E6C1331; Fri, 23 Feb 2018 13:36:19 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node3.st.com [10.75.127.15]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9814A4F34; Fri, 23 Feb 2018 13:36:19 +0000 (GMT) Received: from localhost (10.75.127.46) by SFHDAG5NODE3.st.com (10.75.127.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 23 Feb 2018 14:36:19 +0100 From: Fabrice Gasnier To: , CC: , , , , , , , , , Subject: [RESEND PATCH 2/3] pwm: stm32: LPTimer: use 3 cells xlate Date: Fri, 23 Feb 2018 14:36:04 +0100 Message-ID: <1519392965-28235-3-git-send-email-fabrice.gasnier@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1519392965-28235-1-git-send-email-fabrice.gasnier@st.com> References: <1519392965-28235-1-git-send-email-fabrice.gasnier@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG1NODE3.st.com (10.75.127.3) To SFHDAG5NODE3.st.com (10.75.127.15) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-23_04:, , signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Gerald Baeza STM32 Low-Power Timer supports generic 3 cells pwm to encode PWM number, period and polarity. Signed-off-by: Gerald Baeza Signed-off-by: Fabrice Gasnier --- drivers/pwm/pwm-stm32-lp.c | 2 ++ 1 file changed, 2 insertions(+) -- 1.9.1 diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c index 1ac9e43..346b7bd 100644 --- a/drivers/pwm/pwm-stm32-lp.c +++ b/drivers/pwm/pwm-stm32-lp.c @@ -203,6 +203,8 @@ static int stm32_pwm_lp_probe(struct platform_device *pdev) priv->chip.dev = &pdev->dev; priv->chip.ops = &stm32_pwm_lp_ops; priv->chip.npwm = 1; + priv->chip.of_xlate = of_pwm_xlate_with_flags; + priv->chip.of_pwm_n_cells = 3; ret = pwmchip_add(&priv->chip); if (ret < 0)