From patchwork Wed Jan 13 15:49:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 362153 Delivered-To: patch@linaro.org Received: by 2002:a17:906:fb05:0:0:0:0 with SMTP id lz5csp489766ejb; Wed, 13 Jan 2021 07:51:02 -0800 (PST) X-Google-Smtp-Source: ABdhPJxqbosd3cTEDpHcecaF1LobtLbdyIKfEVIHUiBF7vU9CT2aw+pVFv4G1tOwKZNFPFKjJ8wa X-Received: by 2002:a17:906:6053:: with SMTP id p19mr2042885ejj.93.1610553062346; Wed, 13 Jan 2021 07:51:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610553062; cv=none; d=google.com; s=arc-20160816; b=Tat6+7PV+UlOYaPkvt4z/UAoAqx4UA67379Bw5s0FlfLK7Oia2r6O+0r1oWyzTqnx4 GDWRivC23QS59a0AGROJZcRjBedaDekJiYzJTqqi8lwnxlJ4ra91VneoG3x+2GKuEsNK QrizOs/SIAHIOSA3jKF7wH31oGhvFNNf00rCfkVp8ECAFWzqL8xC6o2fm+7uzSXcxC8a ON+wa+rMUXNYj1xOlkVuarhCH0zVgq3TqQbgG2h0f2Kw0L6Iv8BTCly97GAB7X0B6or5 Tc3dgy2OWZ94RPLuGCJZG6V35TrKh4lDXA1NKh5c4tfhAas0BGo0Q1RUxcPerBcK+yQg Eltw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=tf8Myeu0NiVasaQllGDJf9giDfGqj4Lr7pfXB9rMYOo=; b=ReE9cZ6JVc1kheYZyi1OBJaWEG3sgQQt2wKYwHTxQmNz0jHB4gLqBOX8fxQSKEuisw 2K8gfGDY2C9q9nHAq5MzoNkQ8eYhAjKpY2v9A86DFikJ1KEfxZzfTh6fRaAJOjr3o1r6 VkFdY1mGDQddA2bkIHvfMykIyjH3NzZfAybo59Q2Q3aBMBWQ1y3ijCbD0rUxksMM9a+Y VzIJ2S1n1UzQjB1EmE9Rg8j6WXqwVXV0v5m43ao4KPP8wZ6dvVblzecn8bUUdWikvAek +940hL3BMr1GsGbXjLte6p1Eg2fhUjSN95AoHfsJ2NzNdxtHU/jbz2VceROTOFwp/cwh ws4w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PRDeZ1Rp; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id q18si1078257ejt.469.2021.01.13.07.51.02; Wed, 13 Jan 2021 07:51:02 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PRDeZ1Rp; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726289AbhAMPuW (ORCPT + 15 others); Wed, 13 Jan 2021 10:50:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54382 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726110AbhAMPuW (ORCPT ); Wed, 13 Jan 2021 10:50:22 -0500 Received: from mail-lj1-x231.google.com (mail-lj1-x231.google.com [IPv6:2a00:1450:4864:20::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C094CC06179F for ; Wed, 13 Jan 2021 07:49:41 -0800 (PST) Received: by mail-lj1-x231.google.com with SMTP id f11so3063052ljm.8 for ; Wed, 13 Jan 2021 07:49:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tf8Myeu0NiVasaQllGDJf9giDfGqj4Lr7pfXB9rMYOo=; b=PRDeZ1RptrSpXSi/4MBnSFXHwVd7YllXBCGpSjrYsoEPi/7Y1o9rDiEcBGOnaad3qC inJ3BCtZLUH94jaYcI0DwaTN1abnmDWIBB+9wOAEGUVmY5WEj2ULLeje5SMF6daEqnfx K69thpcdN0DgbUsNVt5m+f29xH6SnIpZBveAl544A6TSoF5W9wGE3yCY2sFZlK5WZpv9 dxkej9kNmX+E697tHWE5KFAHqdhXeOyRikkKysU5/ZzgcUdOYLGVkP2INN0A1oHr8KSn EDMT5A7+O5X8wCqviYkPE8VF1T/poNqnh3I9XVZ05CHV0wLObAGkRwYaqsYQR3dI1/Is 9l7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tf8Myeu0NiVasaQllGDJf9giDfGqj4Lr7pfXB9rMYOo=; b=rkYvR3Tf65JyBD2vppWqy8jFguph9JvPQya6DpDdyDBirtbZqfUbIEobmrJ1IOR2N8 DCuy5EygwA7/AunHeXnVfG7aO2HKP7ZBOG+qt8YlDYqU6+0f8qMjwhlQaLHa62fZ6fmh /p9YW8FEWhvvj8nsl/RyOwBZJGLL7jPKL8IFBSOfLLpr8EDiy/iyuKEmw/Nl9bczREy9 TfQiXV1FW8Y6nrEl2/kp5NEqrk/ZWTbwP/eGacA8zWUtnn2txiTwCiTMU6rpeK4mvTaB DNrJabpcgMMeSXIycUQrGWeAtySSorXFloDyqgMWtrhCJBcfkHBzXifJwfE+GmHm2o3/ xDJg== X-Gm-Message-State: AOAM5325ukSHsj7iJ0cNDj3ZCnYGT+Lhb8wHVc43330x1MmznrxHVsnf qt+zKHv1KJU3prFkZrns55DKjw== X-Received: by 2002:a2e:b4a7:: with SMTP id q7mr1203647ljm.391.1610552980264; Wed, 13 Jan 2021 07:49:40 -0800 (PST) Received: from eriador.lumag.spb.ru ([94.25.228.189]) by smtp.gmail.com with ESMTPSA id g13sm246828lfb.43.2021.01.13.07.49.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Jan 2021 07:49:39 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Lorenzo Pieralisi Cc: linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , linux-pci@vger.kernel.org Subject: [PATCH v4 1/2] dt-bindings: pci: qcom: Document ddrss_sf_tbu clock for sm8250 Date: Wed, 13 Jan 2021 18:49:34 +0300 Message-Id: <20210113154935.3972869-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210113154935.3972869-1-dmitry.baryshkov@linaro.org> References: <20210113154935.3972869-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On SM8250 additional clock is required for PCIe devices to access NOC. Document this requirement in devicetree bindings. Signed-off-by: Dmitry Baryshkov Fixes: 458168247ccc ("dt-bindings: pci: qcom: Document PCIe bindings for SM8250 SoC") --- .../devicetree/bindings/pci/qcom,pcie.txt | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) -- 2.29.2 diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt index 3b55310390a0..0da458a051b6 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt @@ -132,8 +132,20 @@ - "master_bus" AXI Master clock - "slave_bus" AXI Slave clock --clock-names: - Usage: required for sdm845 and sm8250 +- clock-names: + Usage: required for sdm845 + Value type: + Definition: Should contain the following entries + - "aux" Auxiliary clock + - "cfg" Configuration clock + - "bus_master" Master AXI clock + - "bus_slave" Slave AXI clock + - "slave_q2a" Slave Q2A clock + - "tbu" PCIe TBU clock + - "pipe" PIPE clock + +- clock-names: + Usage: required for sm8250 Value type: Definition: Should contain the following entries - "aux" Auxiliary clock @@ -142,6 +154,7 @@ - "bus_slave" Slave AXI clock - "slave_q2a" Slave Q2A clock - "tbu" PCIe TBU clock + - "ddrss_sf_tbu" PCIe SF TBU clock - "pipe" PIPE clock - resets: From patchwork Wed Jan 13 15:49:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 362154 Delivered-To: patch@linaro.org Received: by 2002:a17:906:fb05:0:0:0:0 with SMTP id lz5csp489781ejb; Wed, 13 Jan 2021 07:51:03 -0800 (PST) X-Google-Smtp-Source: ABdhPJzRq84bHHqSe4RFn5g6CJ7pNEHhBx0oC53Fd7Go02SAOppzliw7fHvPR0liNQvwyKv190TO X-Received: by 2002:a50:d604:: with SMTP id x4mr2306984edi.64.1610553063252; Wed, 13 Jan 2021 07:51:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610553063; cv=none; d=google.com; s=arc-20160816; b=hUz9fuqvPAnsRfkD1c3afT1KFGVNksTz0a/GJbM662k72R86dWNpdMtJAcxB0c7MWf xsX3u8pFFJ9Zmj/Huq9G5NDpnscxIDLdWzsJe15HNR3NAJbAgus5qL610xT9P4x80LDM kY64hX3fIQor3jMsjIaHCcCbykxLrvILWsHiZg1kSA2itoSlGHqLYvpcjB/26CxQqqg8 d/ogaGbstDSOJ1useqbHNuiFlmkDcXTuCjzvmBvFve+y6nTjs6vW8D76NzfCFIjsTiYj K0nqxXF2k7QI/dPIKaGBdGcNHPqrVbG6P8rdK1uQfaZGp7NRWXcUF6qABh3yIFeDUAdq 3GBQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=EGe2d/tltRwx5KCxDzrjJBN1zvE0UZ31mQXprkqZeSc=; b=vOYuxsqO5DM7sse5z/Hhqsl2pzcXO/qxvhGA4RY+xMEjQttqmWT2zQ1wnPgDsAAl6n k7GpGUmQjhYmtAFPA+gyKmKYMXq4GxprCxcN//s5feUkd74fLGpiYiZF/nPw8nsosbKe /yMnXN+TPVMj9WFk89DChPiuL5oRIukTKFj+sb0SHUvy3YuMqUl5hCM1v7lojGkV77D8 V1R+ik7IN1wxFzVoyYJPOh3a9OH9ZADoL2waSz2NmUTJHuvDob5UHp0ZtsemPzV8+WzG OAOwaVGTyqGrc5lKMQyhWgy9E2G7+jXuXfb1/ZJnnzG6gCfRNh5hW1RfnMCW2CbsDZJ3 48nw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pqMXlFAc; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id q18si1078257ejt.469.2021.01.13.07.51.03; Wed, 13 Jan 2021 07:51:03 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pqMXlFAc; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726502AbhAMPuX (ORCPT + 15 others); Wed, 13 Jan 2021 10:50:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54392 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726110AbhAMPuX (ORCPT ); Wed, 13 Jan 2021 10:50:23 -0500 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 050C8C0617A3 for ; Wed, 13 Jan 2021 07:49:43 -0800 (PST) Received: by mail-lf1-x135.google.com with SMTP id o19so3478483lfo.1 for ; Wed, 13 Jan 2021 07:49:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EGe2d/tltRwx5KCxDzrjJBN1zvE0UZ31mQXprkqZeSc=; b=pqMXlFAc7ULhS1zYkm4WvoKrTuJmbEVH/zHmDIVveu/dm+8mN0ZYwe/ojcq/5FpQzB UPjWn/hQy6+f6KbWjZIBBvCmnfxgzw26zgITBBDWBuGhvNIRbhWh//LHm5ipZexlduu+ fUzM/Fk4eJICYI4E+7nnGWafGGI+7dsN9RZuiW0WBy9NM0iz3EYs9NEzuCJRVoa8o8n7 WxPZ3HBlNjIg9PkTFBovGhQeCenHQEhzLzuCTu3POyte0UC9yadxPfJuMrUr2S8e9E6U kt88SbhBcBcx5Y1Zqs5+eds+SNCZ1fJqk3UXubmXoq/aG6F1vMWHFFhzpJbtA6gnAkmG RuVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EGe2d/tltRwx5KCxDzrjJBN1zvE0UZ31mQXprkqZeSc=; b=WV6/ehnGLhMqJILKtrngVQb2yCUMlC0JgU97Hn64FJk7egqVwywU1z1RMCXaM4d0w2 sY4zRDuTHpLAVLX8nFd8mqCo0hYunqAcXVBiyQlue4KiIj5jLSLKdCA9x5wBsMMbtuL7 WjTz4VturijZ2OKybOSWcR3Cr9qJAkXFe6H5OzYWm0/5Ckt1KRNkYXFJqaq3GrPBN+Jc HBh1nQbC6X0XBw7SCAxhcbEWYsSX4/DVkwoLn1yadP8efBtgEycDPHlnKuIIp52QldEI YLnGYXeFBgX0Zys+4mFQ7bB5PumhrbzyS0oGJ5lymYxLdxRf3KkN5hVAadZQDnWalDL4 B2QQ== X-Gm-Message-State: AOAM531+bX7cmbWl/YTLEIlICi20vbxE2sKHTdR+lW4WOk6RH91ZLRvA lxSWW7tS89VJx+91apf31nRPRw== X-Received: by 2002:a05:6512:41b:: with SMTP id u27mr1066419lfk.434.1610552981500; Wed, 13 Jan 2021 07:49:41 -0800 (PST) Received: from eriador.lumag.spb.ru ([94.25.228.189]) by smtp.gmail.com with ESMTPSA id g13sm246828lfb.43.2021.01.13.07.49.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Jan 2021 07:49:40 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Lorenzo Pieralisi Cc: linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , linux-pci@vger.kernel.org Subject: [PATCH v4 2/2] PCI: qcom: add support for ddrss_sf_tbu clock Date: Wed, 13 Jan 2021 18:49:35 +0300 Message-Id: <20210113154935.3972869-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210113154935.3972869-1-dmitry.baryshkov@linaro.org> References: <20210113154935.3972869-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On SM8250 additional clock is required for PCIe devices to access NOC. Update PCIe controller driver to control this clock. Signed-off-by: Dmitry Baryshkov Fixes: e1dd639e374a ("PCI: qcom: Add SM8250 SoC support") --- drivers/pci/controller/dwc/pcie-qcom.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) -- 2.29.2 Reviewed-by: Manivannan Sadhasivam diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index affa2713bf80..e2140aba220a 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -159,8 +159,10 @@ struct qcom_pcie_resources_2_3_3 { struct reset_control *rst[7]; }; +#define QCOM_PCIE_2_7_0_MAX_CLOCKS 7 struct qcom_pcie_resources_2_7_0 { - struct clk_bulk_data clks[6]; + struct clk_bulk_data clks[QCOM_PCIE_2_7_0_MAX_CLOCKS]; + int num_clks; struct regulator_bulk_data supplies[2]; struct reset_control *pci_reset; struct clk *pipe_clk; @@ -1133,6 +1135,7 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie) struct qcom_pcie_resources_2_7_0 *res = &pcie->res.v2_7_0; struct dw_pcie *pci = pcie->pci; struct device *dev = pci->dev; + bool has_sf_tbu = of_device_is_compatible(dev->of_node, "qcom,pcie-sm8250"); int ret; res->pci_reset = devm_reset_control_get_exclusive(dev, "pci"); @@ -1152,8 +1155,14 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie) res->clks[3].id = "bus_slave"; res->clks[4].id = "slave_q2a"; res->clks[5].id = "tbu"; + if (has_sf_tbu) { + res->clks[6].id = "ddrss_sf_tbu"; + res->num_clks = 7; + } else { + res->num_clks = 6; + } - ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks); + ret = devm_clk_bulk_get(dev, res->num_clks, res->clks); if (ret < 0) return ret; @@ -1175,7 +1184,7 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie) return ret; } - ret = clk_bulk_prepare_enable(ARRAY_SIZE(res->clks), res->clks); + ret = clk_bulk_prepare_enable(res->num_clks, res->clks); if (ret < 0) goto err_disable_regulators; @@ -1227,7 +1236,7 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie) return 0; err_disable_clocks: - clk_bulk_disable_unprepare(ARRAY_SIZE(res->clks), res->clks); + clk_bulk_disable_unprepare(res->num_clks, res->clks); err_disable_regulators: regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); @@ -1238,7 +1247,7 @@ static void qcom_pcie_deinit_2_7_0(struct qcom_pcie *pcie) { struct qcom_pcie_resources_2_7_0 *res = &pcie->res.v2_7_0; - clk_bulk_disable_unprepare(ARRAY_SIZE(res->clks), res->clks); + clk_bulk_disable_unprepare(res->num_clks, res->clks); regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); }