From patchwork Wed Jan 20 15:46:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kieran Bingham X-Patchwork-Id: 367448 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F0A3C433E6 for ; Wed, 20 Jan 2021 15:47:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 114492339E for ; Wed, 20 Jan 2021 15:47:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390913AbhATPr3 (ORCPT ); Wed, 20 Jan 2021 10:47:29 -0500 Received: from perceval.ideasonboard.com ([213.167.242.64]:42532 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729243AbhATPrT (ORCPT ); Wed, 20 Jan 2021 10:47:19 -0500 Received: from Q.local (cpc89244-aztw30-2-0-cust3082.18-1.cable.virginm.net [86.31.172.11]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id AA6EF8F2; Wed, 20 Jan 2021 16:46:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1611157578; bh=t+k8MbkBGb4E8h8mHp338bHw6E1mm3YUccVXJ2/GGd4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QNnYkEh0mAOLV2Mv+0KIDWa27TkHHS2oRShajckj06caUYbr/QG9EFz8rpyYjhxoe 9c9UF3kUSZt/Gr7J1sTlXu5roABCGuXwECJ2HKWtobWhKRKwF96zBkx41OUeKN1G7g GQYO8/iKwMgAOYFxuYIlwfKWJWCmaap1AnET/7sg= From: Kieran Bingham To: linux-renesas-soc@vger.kernel.org, linux-media@vger.kernel.org Cc: Kieran Bingham Subject: [PATCH v2 1/2] media: i2c: max9286: Use unsigned constants and BIT() Date: Wed, 20 Jan 2021 15:46:13 +0000 Message-Id: <20210120154614.2750268-2-kieran.bingham+renesas@ideasonboard.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210120154614.2750268-1-kieran.bingham+renesas@ideasonboard.com> References: <20210120154614.2750268-1-kieran.bingham+renesas@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Convert the bitfield definitions to use unsigned integers, and BIT() where appropriate. Signed-off-by: Kieran Bingham --- v2: - Fix up single bit fields to use BIT drivers/media/i2c/max9286.c | 96 ++++++++++++++++++------------------- 1 file changed, 48 insertions(+), 48 deletions(-) diff --git a/drivers/media/i2c/max9286.c b/drivers/media/i2c/max9286.c index d0cb60521d87..66d3e046db97 100644 --- a/drivers/media/i2c/max9286.c +++ b/drivers/media/i2c/max9286.c @@ -31,85 +31,85 @@ #include /* Register 0x00 */ -#define MAX9286_MSTLINKSEL_AUTO (7 << 5) +#define MAX9286_MSTLINKSEL_AUTO (7U << 5) #define MAX9286_MSTLINKSEL(n) ((n) << 5) #define MAX9286_EN_VS_GEN BIT(4) -#define MAX9286_LINKEN(n) (1 << (n)) +#define MAX9286_LINKEN(n) BIT(n) /* Register 0x01 */ -#define MAX9286_FSYNCMODE_ECU (3 << 6) -#define MAX9286_FSYNCMODE_EXT (2 << 6) -#define MAX9286_FSYNCMODE_INT_OUT (1 << 6) -#define MAX9286_FSYNCMODE_INT_HIZ (0 << 6) +#define MAX9286_FSYNCMODE_ECU (3U << 6) +#define MAX9286_FSYNCMODE_EXT (2U << 6) +#define MAX9286_FSYNCMODE_INT_OUT (1U << 6) +#define MAX9286_FSYNCMODE_INT_HIZ (0U << 6) #define MAX9286_GPIEN BIT(5) #define MAX9286_ENLMO_RSTFSYNC BIT(2) -#define MAX9286_FSYNCMETH_AUTO (2 << 0) -#define MAX9286_FSYNCMETH_SEMI_AUTO (1 << 0) -#define MAX9286_FSYNCMETH_MANUAL (0 << 0) +#define MAX9286_FSYNCMETH_AUTO (2U << 0) +#define MAX9286_FSYNCMETH_SEMI_AUTO (1U << 0) +#define MAX9286_FSYNCMETH_MANUAL (0U << 0) #define MAX9286_REG_FSYNC_PERIOD_L 0x06 #define MAX9286_REG_FSYNC_PERIOD_M 0x07 #define MAX9286_REG_FSYNC_PERIOD_H 0x08 /* Register 0x0a */ -#define MAX9286_FWDCCEN(n) (1 << ((n) + 4)) -#define MAX9286_REVCCEN(n) (1 << (n)) +#define MAX9286_FWDCCEN(n) BIT((n) + 4) +#define MAX9286_REVCCEN(n) BIT(n) /* Register 0x0c */ #define MAX9286_HVEN BIT(7) -#define MAX9286_EDC_6BIT_HAMMING (2 << 5) -#define MAX9286_EDC_6BIT_CRC (1 << 5) -#define MAX9286_EDC_1BIT_PARITY (0 << 5) +#define MAX9286_EDC_6BIT_HAMMING (2U << 5) +#define MAX9286_EDC_6BIT_CRC (1U << 5) +#define MAX9286_EDC_1BIT_PARITY (0U << 5) #define MAX9286_DESEL BIT(4) #define MAX9286_INVVS BIT(3) #define MAX9286_INVHS BIT(2) -#define MAX9286_HVSRC_D0 (2 << 0) -#define MAX9286_HVSRC_D14 (1 << 0) -#define MAX9286_HVSRC_D18 (0 << 0) +#define MAX9286_HVSRC_D0 (2U << 0) +#define MAX9286_HVSRC_D14 (1U << 0) +#define MAX9286_HVSRC_D18 (0U << 0) /* Register 0x0f */ #define MAX9286_0X0F_RESERVED BIT(3) /* Register 0x12 */ #define MAX9286_CSILANECNT(n) (((n) - 1) << 6) #define MAX9286_CSIDBL BIT(5) #define MAX9286_DBL BIT(4) -#define MAX9286_DATATYPE_USER_8BIT (11 << 0) -#define MAX9286_DATATYPE_USER_YUV_12BIT (10 << 0) -#define MAX9286_DATATYPE_USER_24BIT (9 << 0) -#define MAX9286_DATATYPE_RAW14 (8 << 0) -#define MAX9286_DATATYPE_RAW11 (7 << 0) -#define MAX9286_DATATYPE_RAW10 (6 << 0) -#define MAX9286_DATATYPE_RAW8 (5 << 0) -#define MAX9286_DATATYPE_YUV422_10BIT (4 << 0) -#define MAX9286_DATATYPE_YUV422_8BIT (3 << 0) -#define MAX9286_DATATYPE_RGB555 (2 << 0) -#define MAX9286_DATATYPE_RGB565 (1 << 0) -#define MAX9286_DATATYPE_RGB888 (0 << 0) +#define MAX9286_DATATYPE_USER_8BIT (11U << 0) +#define MAX9286_DATATYPE_USER_YUV_12BIT (10U << 0) +#define MAX9286_DATATYPE_USER_24BIT (9U << 0) +#define MAX9286_DATATYPE_RAW14 (8U << 0) +#define MAX9286_DATATYPE_RAW11 (7U << 0) +#define MAX9286_DATATYPE_RAW10 (6U << 0) +#define MAX9286_DATATYPE_RAW8 (5U << 0) +#define MAX9286_DATATYPE_YUV422_10BIT (4U << 0) +#define MAX9286_DATATYPE_YUV422_8BIT (3U << 0) +#define MAX9286_DATATYPE_RGB555 (2U << 0) +#define MAX9286_DATATYPE_RGB565 (1U << 0) +#define MAX9286_DATATYPE_RGB888 (0U << 0) /* Register 0x15 */ #define MAX9286_VC(n) ((n) << 5) #define MAX9286_VCTYPE BIT(4) #define MAX9286_CSIOUTEN BIT(3) -#define MAX9286_0X15_RESV (3 << 0) +#define MAX9286_0X15_RESV (3U << 0) /* Register 0x1b */ -#define MAX9286_SWITCHIN(n) (1 << ((n) + 4)) -#define MAX9286_ENEQ(n) (1 << (n)) +#define MAX9286_SWITCHIN(n) BIT((n) + 4) +#define MAX9286_ENEQ(n) BIT(n) /* Register 0x27 */ #define MAX9286_LOCKED BIT(7) /* Register 0x31 */ #define MAX9286_FSYNC_LOCKED BIT(6) /* Register 0x34 */ #define MAX9286_I2CLOCACK BIT(7) -#define MAX9286_I2CSLVSH_1046NS_469NS (3 << 5) -#define MAX9286_I2CSLVSH_938NS_352NS (2 << 5) -#define MAX9286_I2CSLVSH_469NS_234NS (1 << 5) -#define MAX9286_I2CSLVSH_352NS_117NS (0 << 5) -#define MAX9286_I2CMSTBT_837KBPS (7 << 2) -#define MAX9286_I2CMSTBT_533KBPS (6 << 2) -#define MAX9286_I2CMSTBT_339KBPS (5 << 2) -#define MAX9286_I2CMSTBT_173KBPS (4 << 2) -#define MAX9286_I2CMSTBT_105KBPS (3 << 2) -#define MAX9286_I2CMSTBT_84KBPS (2 << 2) -#define MAX9286_I2CMSTBT_28KBPS (1 << 2) -#define MAX9286_I2CMSTBT_8KBPS (0 << 2) -#define MAX9286_I2CSLVTO_NONE (3 << 0) -#define MAX9286_I2CSLVTO_1024US (2 << 0) -#define MAX9286_I2CSLVTO_256US (1 << 0) -#define MAX9286_I2CSLVTO_64US (0 << 0) +#define MAX9286_I2CSLVSH_1046NS_469NS (3U << 5) +#define MAX9286_I2CSLVSH_938NS_352NS (2U << 5) +#define MAX9286_I2CSLVSH_469NS_234NS (1U << 5) +#define MAX9286_I2CSLVSH_352NS_117NS (0U << 5) +#define MAX9286_I2CMSTBT_837KBPS (7U << 2) +#define MAX9286_I2CMSTBT_533KBPS (6U << 2) +#define MAX9286_I2CMSTBT_339KBPS (5U << 2) +#define MAX9286_I2CMSTBT_173KBPS (4U << 2) +#define MAX9286_I2CMSTBT_105KBPS (3U << 2) +#define MAX9286_I2CMSTBT_84KBPS (2U << 2) +#define MAX9286_I2CMSTBT_28KBPS (1U << 2) +#define MAX9286_I2CMSTBT_8KBPS (0U << 2) +#define MAX9286_I2CSLVTO_NONE (3U << 0) +#define MAX9286_I2CSLVTO_1024US (2U << 0) +#define MAX9286_I2CSLVTO_256US (1U << 0) +#define MAX9286_I2CSLVTO_64US (0U << 0) /* Register 0x3b */ #define MAX9286_REV_TRF(n) ((n) << 4) #define MAX9286_REV_AMP(n) ((((n) - 30) / 10) << 1) /* in mV */ From patchwork Wed Jan 20 15:46:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kieran Bingham X-Patchwork-Id: 368303 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8FB36C433DB for ; Wed, 20 Jan 2021 15:48:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5138C23340 for ; Wed, 20 Jan 2021 15:48:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390968AbhATPrf (ORCPT ); Wed, 20 Jan 2021 10:47:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733213AbhATPrS (ORCPT ); Wed, 20 Jan 2021 10:47:18 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F48FC0613CF; Wed, 20 Jan 2021 07:46:22 -0800 (PST) Received: from Q.local (cpc89244-aztw30-2-0-cust3082.18-1.cable.virginm.net [86.31.172.11]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 074FA8F7; Wed, 20 Jan 2021 16:46:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1611157579; bh=ZMWI4OGRZAATPh8nZBl53jCBoeI4nHhwrebs6Ygh4aw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KIsBN+y65ubEgel1JzwAs+hxcM3ce6sVGyXOT6/sHx/8Lc6nnXi81b24gcvMsQcsv DhTyahEp5/xFZYdSRfe/ugEjreoX61nBmkoqG3A07pu6Vc4vIJpbd/pGgpvgRH2U8s 1SJ3HpwxypOR4lfTWR4nhumKmwX9whTNQFnOWRoc= From: Kieran Bingham To: linux-renesas-soc@vger.kernel.org, linux-media@vger.kernel.org Cc: Kieran Bingham Subject: [PATCH v2 2/2] media: i2c: max9271: Use unsigned constants Date: Wed, 20 Jan 2021 15:46:14 +0000 Message-Id: <20210120154614.2750268-3-kieran.bingham+renesas@ideasonboard.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210120154614.2750268-1-kieran.bingham+renesas@ideasonboard.com> References: <20210120154614.2750268-1-kieran.bingham+renesas@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Convert the bitfield definitions to use unsigned integers. Signed-off-by: Kieran Bingham --- drivers/media/i2c/max9271.h | 60 ++++++++++++++++++------------------- 1 file changed, 30 insertions(+), 30 deletions(-) diff --git a/drivers/media/i2c/max9271.h b/drivers/media/i2c/max9271.h index d78fb21441e9..4ef36a90c746 100644 --- a/drivers/media/i2c/max9271.h +++ b/drivers/media/i2c/max9271.h @@ -13,24 +13,24 @@ #define MAX9271_DEFAULT_ADDR 0x40 /* Register 0x02 */ -#define MAX9271_SPREAD_SPECT_0 (0 << 5) -#define MAX9271_SPREAD_SPECT_05 (1 << 5) -#define MAX9271_SPREAD_SPECT_15 (2 << 5) -#define MAX9271_SPREAD_SPECT_1 (5 << 5) -#define MAX9271_SPREAD_SPECT_2 (3 << 5) -#define MAX9271_SPREAD_SPECT_3 (6 << 5) -#define MAX9271_SPREAD_SPECT_4 (7 << 5) +#define MAX9271_SPREAD_SPECT_0 (0U << 5) +#define MAX9271_SPREAD_SPECT_05 (1U << 5) +#define MAX9271_SPREAD_SPECT_15 (2U << 5) +#define MAX9271_SPREAD_SPECT_1 (5U << 5) +#define MAX9271_SPREAD_SPECT_2 (3U << 5) +#define MAX9271_SPREAD_SPECT_3 (6U << 5) +#define MAX9271_SPREAD_SPECT_4 (7U << 5) #define MAX9271_R02_RES BIT(4) -#define MAX9271_PCLK_AUTODETECT (3 << 2) +#define MAX9271_PCLK_AUTODETECT (3U << 2) #define MAX9271_SERIAL_AUTODETECT (0x03) /* Register 0x04 */ #define MAX9271_SEREN BIT(7) #define MAX9271_CLINKEN BIT(6) #define MAX9271_PRBSEN BIT(5) #define MAX9271_SLEEP BIT(4) -#define MAX9271_INTTYPE_I2C (0 << 2) -#define MAX9271_INTTYPE_UART (1 << 2) -#define MAX9271_INTTYPE_NONE (2 << 2) +#define MAX9271_INTTYPE_I2C (0U << 2) +#define MAX9271_INTTYPE_UART (1U << 2) +#define MAX9271_INTTYPE_NONE (2U << 2) #define MAX9271_REVCCEN BIT(1) #define MAX9271_FWDCCEN BIT(0) /* Register 0x07 */ @@ -39,9 +39,9 @@ #define MAX9271_BWS BIT(5) #define MAX9271_ES BIT(4) #define MAX9271_HVEN BIT(2) -#define MAX9271_EDC_1BIT_PARITY (0 << 0) -#define MAX9271_EDC_6BIT_CRC (1 << 0) -#define MAX9271_EDC_6BIT_HAMMING (2 << 0) +#define MAX9271_EDC_1BIT_PARITY (0U << 0) +#define MAX9271_EDC_6BIT_CRC (1U << 0) +#define MAX9271_EDC_6BIT_HAMMING (2U << 0) /* Register 0x08 */ #define MAX9271_INVVS BIT(7) #define MAX9271_INVHS BIT(6) @@ -51,22 +51,22 @@ #define MAX9271_ID 0x09 /* Register 0x0d */ #define MAX9271_I2CLOCACK BIT(7) -#define MAX9271_I2CSLVSH_1046NS_469NS (3 << 5) -#define MAX9271_I2CSLVSH_938NS_352NS (2 << 5) -#define MAX9271_I2CSLVSH_469NS_234NS (1 << 5) -#define MAX9271_I2CSLVSH_352NS_117NS (0 << 5) -#define MAX9271_I2CMSTBT_837KBPS (7 << 2) -#define MAX9271_I2CMSTBT_533KBPS (6 << 2) -#define MAX9271_I2CMSTBT_339KBPS (5 << 2) -#define MAX9271_I2CMSTBT_173KBPS (4 << 2) -#define MAX9271_I2CMSTBT_105KBPS (3 << 2) -#define MAX9271_I2CMSTBT_84KBPS (2 << 2) -#define MAX9271_I2CMSTBT_28KBPS (1 << 2) -#define MAX9271_I2CMSTBT_8KBPS (0 << 2) -#define MAX9271_I2CSLVTO_NONE (3 << 0) -#define MAX9271_I2CSLVTO_1024US (2 << 0) -#define MAX9271_I2CSLVTO_256US (1 << 0) -#define MAX9271_I2CSLVTO_64US (0 << 0) +#define MAX9271_I2CSLVSH_1046NS_469NS (3U << 5) +#define MAX9271_I2CSLVSH_938NS_352NS (2U << 5) +#define MAX9271_I2CSLVSH_469NS_234NS (1U << 5) +#define MAX9271_I2CSLVSH_352NS_117NS (0U << 5) +#define MAX9271_I2CMSTBT_837KBPS (7U << 2) +#define MAX9271_I2CMSTBT_533KBPS (6U << 2) +#define MAX9271_I2CMSTBT_339KBPS (5U << 2) +#define MAX9271_I2CMSTBT_173KBPS (4U << 2) +#define MAX9271_I2CMSTBT_105KBPS (3U << 2) +#define MAX9271_I2CMSTBT_84KBPS (2U << 2) +#define MAX9271_I2CMSTBT_28KBPS (1U << 2) +#define MAX9271_I2CMSTBT_8KBPS (0U << 2) +#define MAX9271_I2CSLVTO_NONE (3U << 0) +#define MAX9271_I2CSLVTO_1024US (2U << 0) +#define MAX9271_I2CSLVTO_256US (1U << 0) +#define MAX9271_I2CSLVTO_64US (0U << 0) /* Register 0x0f */ #define MAX9271_GPIO5OUT BIT(5) #define MAX9271_GPIO4OUT BIT(4)