From patchwork Wed Jan 27 12:30:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 371531 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp216512jam; Wed, 27 Jan 2021 04:35:07 -0800 (PST) X-Google-Smtp-Source: ABdhPJz2WmwFMwHY86lmbJR5eFpOChCE5H10Ga88vKEP+SZnuMb2xNz3Ns8CDKNdM7D6IJpX/5jX X-Received: by 2002:a17:906:f0c3:: with SMTP id dk3mr6533597ejb.540.1611750907358; Wed, 27 Jan 2021 04:35:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611750907; cv=none; d=google.com; s=arc-20160816; b=tR3O2WrSJFrOftw+piLJxc/9pYE7S53h45ElGfidqfteaK5pov4FNR7zN7ra7UnFao FFAJwsf0DR+MgLG267uDhioKX7kp/q6ZKEESTwTziePDLro3v6toatwe9u7DKSFwpGVV s8bqyYDoVYGXbFfxAqAHtlMRlh0/ydMAE8TE51r3zPQQAdutlpNFk9LAGKOAiB/Jx2hA juijWk2fz+O3IToQNVJTRE6r000/YfNl4yUDnIUfMxHr83ViI4no3tBDIrioqTR1A1CU +6whM3I4qv87fRg5uU4yF7JM+8vSvc+7gDv04yT4N4ERXPLeF2uxbPbc0kNrlnJifYZo kRAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=mX/TOOjd5Z0j70q3FtvCV5voiD+uLGSJvRRjWGhHdlo=; b=TmJypGvPoQT6aVNk/asZQzIMnQyLtimiD3bm/Wzgh5BGqzSZkO0MhpyVvZnEmUwDP5 MbXdEAX7RKhOI2Y93s8ZV579sMsQQHt5+uEtd68PT4S6HBET0j8s3KW5TLVYCPu8RgGf vyMeBnoU+MCnOXBwRbnQKFbxAdBQY2q45bwVvSYIDLAdfZyXdvWi52l+P+LPv7HGgLOP yFBUDOXgrTuB3kDi19g+hhJTKtzwGWDM9hlNVUcwpq+efSrJbEbUNj5/ChOp0y2b+wep c9wY5FkN2s2nSgaxNCm/anJb6hS90tiqBzO4y6bQNHjaAbrmkBOcCwBg6wIbvQaGUfqT twBQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=O69yXSBp; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id i3si761037ejz.79.2021.01.27.04.35.07; Wed, 27 Jan 2021 04:35:07 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=O69yXSBp; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237080AbhA0Mek (ORCPT + 6 others); Wed, 27 Jan 2021 07:34:40 -0500 Received: from mail.kernel.org ([198.145.29.99]:48392 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237976AbhA0Mbq (ORCPT ); Wed, 27 Jan 2021 07:31:46 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id EA46E20793; Wed, 27 Jan 2021 12:31:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1611750665; bh=zmIt74OYog12g3nhqk+8BQG/Tjv6vDEBEGYa/eSWniI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=O69yXSBpT/PLhEqa7GF4Q7vNsZH6TFViyR9a0DXnM1Hn7jDB60KF16y7AUySsB+3L VsX2D77v3UOwsEu6A0mPwqg3KHvJ2C3lYWBYyALfKzsvV722b9LRXtjgEwcHKfIg0D jVeqCHJ+0zG4S95OiLWHrTdxo8+/Gis182BdeFNgGMACHEfqcNy6YzhCMUA6IGgAjH FU/MwDGFeVgxIALVeHXkTqgJudnQ4CtTUDm+YEz+2Ni+DBg2EQ1waEC9tP/Bx5F2yi M1chExmGS4X121H3xyLSRTxBVxBu3hmnqbqBT89DjxRNQauGj4WxI9DWJpH8l5zH5Z 7Di3EIURoxnkQ== From: Vinod Koul To: Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, Vinod Koul , Andy Gross , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring Subject: [PATCH v2 1/6] dt-bindings: arm: qcom: Document SM8350 SoC and boards Date: Wed, 27 Jan 2021 18:00:49 +0530 Message-Id: <20210127123054.263231-2-vkoul@kernel.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210127123054.263231-1-vkoul@kernel.org> References: <20210127123054.263231-1-vkoul@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document the SM8350 SoC binding and also the boards using it. Acked-by: Rob Herring Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.26.2 Reviewed-by: Bjorn Andersson diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index c97d4a580f47..8fe7e473bfdf 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -41,6 +41,7 @@ description: | sdm660 sdm845 sm8250 + sm8350 The 'board' element must be one of the following strings: @@ -178,6 +179,11 @@ properties: - qcom,sm8250-mtp - const: qcom,sm8250 + - items: + - enum: + - qcom,sm8350-mtp + - const: qcom,sm8350 + additionalProperties: true ... From patchwork Wed Jan 27 12:30:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 371532 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp217510jam; Wed, 27 Jan 2021 04:36:24 -0800 (PST) X-Google-Smtp-Source: ABdhPJyUC4ZXBuVPnAJwrU7wbgu0bvZfChCkFd9p/+oWmPUs/so42zZ9tt+2RD3DvL7D/b/DMMt7 X-Received: by 2002:a17:906:da02:: with SMTP id fi2mr6453718ejb.230.1611750984834; Wed, 27 Jan 2021 04:36:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611750984; cv=none; d=google.com; s=arc-20160816; b=IG0ZyPJThhOGbk3W5qNPwtolXEhlK+9wAmtEvySJydqeLJfl4sz0inQxozOWzW/fo7 /RhcNTrpMZqjLBOP1E4eVrVtkWW5Krp+ljPh3rrt4WEuLhGtJjFrw+VSI6hKLV9hK9LS oaQ6lntIa8x9tI9KVzhL+xvT+NvarQrq6QI2L50rQ70a2OMirLfyb0PFTmU1HTbuUh0W 90oGABr+go2bJ+ZxBfCVPHEx/nXhB7y6DjPqcngorfq6kPAepicK1+A+H3WPF4//RzDF y5ldx2Sh8skd0Ci2GaFktV2ru0kHjMnqloQ/0x4Gj9YW4NqlHiyoOvlFbOEGdUn8wT0b NGOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=bx64iLYDfqx4cpedhj5WkqfFAkLvdCAeUqRBRWKh8b8=; b=ibOmAN9tGL2hAIC1r3iAk58pG5E4Z0LZ5mmTtjPKpkau8s1hUZdPhlYIQqXhcUBT0B Ak1reydtCgpdEuxcMrqSgDSZw0rKAk0qdqR008qoHdQXSjmatt6kCReOhtUP4gDjPDou FDDA7UYnL9aRQVLOBvgkCSvvWrRCsXMqlv7/ZEU7Kra3lvjwf89/uzKuD7C0zEZLfQHj fdEVyJtYbmwUFZ34JVhc2QzKiK99yfY0f4WLef5kVNZZh9aPKr2Ndd17aGGBWWwK1r18 XneI9fuHdHyzIyJB/4EiZf2PgLfprYAz2wCUjVf2i6dU5An0DIUSLpYTwNRW/eBhwRRH yO2g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="NY/DhJlo"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id p18si951098edx.541.2021.01.27.04.36.24; Wed, 27 Jan 2021 04:36:24 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="NY/DhJlo"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343535AbhA0MfJ (ORCPT + 6 others); Wed, 27 Jan 2021 07:35:09 -0500 Received: from mail.kernel.org ([198.145.29.99]:48442 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237987AbhA0McF (ORCPT ); Wed, 27 Jan 2021 07:32:05 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id 38CBA20798; Wed, 27 Jan 2021 12:31:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1611750672; bh=qth49y5ABTYXYFDlFX4RYDBLitErCw8n4cY+dxvbjb8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NY/DhJloaUaJYed7hb25MCrqVlZ2ZHa+8CUhAiclMqvBhZQMhtyvH+9PnDBzkv4LY CPVcA3HY9XiCljHKZzyGY+X924ZKdxuZDafrdB1MeA6HkLZDI0kfHt1S1+wKgRzhBS GewoNyLs7aTYvLjXObmzyA49QZmpjuXHRC/jGCcKzLWJRwpVx4RBkst7orMQS0qiBS QYsHveN3RtAWrDyEk5HjDDN/tkCUxJpv+lIub+AX5y0DosgqYFbdjdD7BPYIjDSSGB VpH2GMb0HC9XWVFVbhguPFXylsc3+rJ2dquk77md3zyk+pfneN8CnkAivmjoN4LMvU 5OqoF2H/su0dg== From: Vinod Koul To: Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, Vinod Koul , Andy Gross , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/6] dt-bindings: arm: cpus: Add kryo685 compatible Date: Wed, 27 Jan 2021 18:00:51 +0530 Message-Id: <20210127123054.263231-4-vkoul@kernel.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210127123054.263231-1-vkoul@kernel.org> References: <20210127123054.263231-1-vkoul@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Kryo685 is found in SM8350, so add it to the list of cpu compatibles Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) -- 2.26.2 diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 14cd727d3c4b..3a0b4c54cd8e 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -169,6 +169,7 @@ properties: - qcom,kryo385 - qcom,kryo468 - qcom,kryo485 + - qcom,kryo685 - qcom,scorpion enable-method: From patchwork Wed Jan 27 12:30:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 371734 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D042C433DB for ; Wed, 27 Jan 2021 12:36:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EC8DB2074F for ; Wed, 27 Jan 2021 12:36:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343531AbhA0MfH (ORCPT ); Wed, 27 Jan 2021 07:35:07 -0500 Received: from mail.kernel.org ([198.145.29.99]:48462 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237989AbhA0McF (ORCPT ); Wed, 27 Jan 2021 07:32:05 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id 96E4C20795; Wed, 27 Jan 2021 12:31:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1611750676; bh=jmcfRNN25i2ohsqZwDtxcf2Xb7zyD6uyGntHaZ9vuHE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kgQAPp57Qbr33NJcFVXZ58Mb22Hnd4MK+G1+D7Q4O5knUHLM+XUzdJ8K5RxpPLken LN38h2e0VHuJMaxbNQmXrLwMyNKgLmR6VK/tTK32hcwBfmdsvlRL229cZFbD7ZYAFN cv4FfcmmkhTJCC/te/xi6QCS3BL946MyD6k0CzZ3Q1l20KmoglPfKuTijclkt1Oglf FsRQBmZ5OZRJ0IVM0Zb6xECG8goWnohPBgMg7wyWl0SbWLbJD50n32FXx+EoeY0Q7O PCL2AXNtvIjT10vW/Vc6JI4yclWuphyuTb3QPNcLexA3dyVFRbfeaeb7sn5CQmh7Rq YYEV1WE2QVYtQ== From: Vinod Koul To: Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, Vinod Koul , Andy Gross , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/6] dt-bindings: firmware: scm: Add SM8250 and SM8350 compatible Date: Wed, 27 Jan 2021 18:00:52 +0530 Message-Id: <20210127123054.263231-5-vkoul@kernel.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210127123054.263231-1-vkoul@kernel.org> References: <20210127123054.263231-1-vkoul@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add compatible for SM8150 and SM8350 SoCs. Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/firmware/qcom,scm.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt index 78456437df5f..a884955f861e 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt @@ -22,6 +22,8 @@ Required properties: * "qcom,scm-sc7180" * "qcom,scm-sdm845" * "qcom,scm-sm8150" + * "qcom,scm-sm8250" + * "qcom,scm-sm8350" and: * "qcom,scm" - clocks: Specifies clocks needed by the SCM interface, if any: From patchwork Wed Jan 27 12:30:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 371533 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp217523jam; Wed, 27 Jan 2021 04:36:25 -0800 (PST) X-Google-Smtp-Source: ABdhPJzBrgpc5V2IYOeZCPMyQ6BFy1DOMFzbcJExdGY77nZhzP5cPD74X9/GdhXWftvpy0IpJAL9 X-Received: by 2002:aa7:d39a:: with SMTP id x26mr8630952edq.51.1611750985354; Wed, 27 Jan 2021 04:36:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611750985; cv=none; d=google.com; s=arc-20160816; b=laWEIR+2RQ8SvCnvjVKoCoXMjXYfGbKnsTWmeUyfxrzSwQPExD0fyGA3MlJJR6cKUj ILVxrHEhRpAa95ZajFUUNNNgTc7g7AcRyQgy0AlKtawizeThPpGFeKua6rRov2uIi6K6 863UBuqBZjG1rt9XwlK6R9B9zNMgQiYMis3PS74hdnRncc2k7uiZN3cZwl5GI4GMUGm+ Xv0Nbh9gGC4q5C7NiyU5xuprYT2lr9vAOVHZWTQ4Cxk51BkMbAhHAK0T2BSauJRw2aIf xqY4rTSq24tGbnUtqgPm7V30gmbbqIFD/O1qssMfvniT7iffG+WitmSideg0WggNceWi zWVg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=kh7WJseCF1/YiqZS2b2Vtryfly7Br9GeHi/6L7j9iU8=; b=Qlm+y3FqY/VBuXxYQyxK7td1qRFzwkaJU9DBOsNpfPVuHuXyKa2j0HxxeaEHeaOpxF BxDpdpRJJ21Z/FAgKFBqMn7KWWOvYgkdwq9N7bbrhrloJ5V6lzB/4SJAbrYbYwPW8PB5 Zg2STFy1o5W9aLBfnhiXhok4P2qwO6HkXco2d/1rBAwQqM0r3VK/wDnM32URIWk7A9tR vKZUNUAvwPkwBtVIyBAeB2IzdJ/hALi5LFZMWYgJMpJmDGJcHasreK1sB6oedG9qZ1gd EyMDfywHwVBcH/oRa7XHpGz8EF4rlItvykGoM4fAC5FmuqU5TFxPuGG03tzMNBU5BuRF SQlA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Hb2oDPWk; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id p18si951098edx.541.2021.01.27.04.36.25; Wed, 27 Jan 2021 04:36:25 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Hb2oDPWk; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343539AbhA0MfM (ORCPT + 6 others); Wed, 27 Jan 2021 07:35:12 -0500 Received: from mail.kernel.org ([198.145.29.99]:48484 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237980AbhA0McG (ORCPT ); Wed, 27 Jan 2021 07:32:06 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id F00722074F; Wed, 27 Jan 2021 12:31:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1611750679; bh=GmjgY426z/sS2GGhDxwZCGR9UwMivBtL2rvCNOwhS5Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Hb2oDPWk1Eg9lExTwO1I5fqbBqskl4BG4bfe6PeieWOmyFGFv/kjXho+5x96eaXC4 pcnJfgT7nsmXJ2xJmNBzBnBfQRpxlTXTAs+RbSel88T7JlCTrlQBy5dGa4IXSZnZyE KbnrXzhFgad7mpIj4rPMCA8d9PuOSA/IfZGXvww+gkAujD9MDdKMzX7SATKv5vpCvU rFHAJGVCMO+evKUE7KG0vg7lJ0r5Q4d3TqUBDmSVAoub82Mjee9kSBE5esF/JChKFg tEaNhs1X0cFtvOdh1y2zcCwLp3ycfwsFWuW58mN+/rwb6WEIIvwOWQSoG+tbDQzZMr CHSkYIzuMNABQ== From: Vinod Koul To: Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, Vinod Koul , Andy Gross , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/6] arm64: dts: qcom: Add basic devicetree support for SM8350 SoC Date: Wed, 27 Jan 2021 18:00:53 +0530 Message-Id: <20210127123054.263231-6-vkoul@kernel.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210127123054.263231-1-vkoul@kernel.org> References: <20210127123054.263231-1-vkoul@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add basic devicetree support for Qualcomm Technologies, Inc SM8350 SoC. This adds gcc, pinctrl, reserved memory, uart, cpu nodes for this SoC. Signed-off-by: Vinod Koul --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 499 +++++++++++++++++++++++++++ 1 file changed, 499 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sm8350.dtsi -- 2.26.2 diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi new file mode 100644 index 000000000000..29af0b931690 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -0,0 +1,499 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2020, Linaro Limaited + */ + +#include +#include +#include +#include +#include +#include + +/ { + interrupt-parent = <&intc>; + + #address-cells = <2>; + #size-cells = <2>; + + chosen { }; + + clocks { + xo_board: xo-board { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <38400000>; + clock-output-names = "xo_board"; + }; + + sleep_clk: sleep-clk { + compatible = "fixed-clock"; + clock-frequency = <32000>; + #clock-cells = <0>; + }; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "qcom,kryo685"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + L3_0: l3-cache { + compatible = "cache"; + }; + }; + }; + + CPU1: cpu@100 { + device_type = "cpu"; + compatible = "qcom,kryo685"; + reg = <0x0 0x100>; + enable-method = "psci"; + next-level-cache = <&L2_100>; + L2_100: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU2: cpu@200 { + device_type = "cpu"; + compatible = "qcom,kryo685"; + reg = <0x0 0x200>; + enable-method = "psci"; + next-level-cache = <&L2_200>; + L2_200: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU3: cpu@300 { + device_type = "cpu"; + compatible = "qcom,kryo685"; + reg = <0x0 0x300>; + enable-method = "psci"; + next-level-cache = <&L2_300>; + L2_300: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU4: cpu@400 { + device_type = "cpu"; + compatible = "qcom,kryo685"; + reg = <0x0 0x400>; + enable-method = "psci"; + next-level-cache = <&L2_400>; + L2_400: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU5: cpu@500 { + device_type = "cpu"; + compatible = "qcom,kryo685"; + reg = <0x0 0x500>; + enable-method = "psci"; + next-level-cache = <&L2_500>; + L2_500: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + + }; + + CPU6: cpu@600 { + device_type = "cpu"; + compatible = "qcom,kryo685"; + reg = <0x0 0x600>; + enable-method = "psci"; + next-level-cache = <&L2_600>; + L2_600: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU7: cpu@700 { + device_type = "cpu"; + compatible = "qcom,kryo685"; + reg = <0x0 0x700>; + enable-method = "psci"; + next-level-cache = <&L2_700>; + L2_700: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + }; + + firmware { + scm: scm { + compatible = "qcom,scm-sm8350", "qcom,scm"; + #reset-cells = <1>; + }; + }; + + memory@80000000 { + device_type = "memory"; + /* We expect the bootloader to fill in the size */ + reg = <0x0 0x80000000 0x0 0x0>; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = ; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + hyp_mem: memory@80000000 { + reg = <0x0 0x80000000 0x0 0x600000>; + no-map; + }; + + xbl_aop_mem: memory@80700000 { + no-map; + reg = <0x0 0x80700000 0x0 0x160000>; + }; + + cmd_db: memory@80860000 { + compatible = "qcom,cmd-db"; + reg = <0x0 0x80860000 0x0 0x20000>; + no-map; + }; + + reserved_xbl_uefi_log: memory@80880000 { + reg = <0x0 0x80880000 0x0 0x14000>; + no-map; + }; + + smem_mem: memory@80900000 { + reg = <0x0 0x80900000 0x0 0x200000>; + no-map; + }; + + cpucp_fw_mem: memory@80b00000 { + reg = <0x0 0x80b00000 0x0 0x100000>; + no-map; + }; + + cdsp_secure_heap: memory@80c00000 { + reg = <0x0 0x80c00000 0x0 0x4600000>; + no-map; + }; + + pil_camera_mem: mmeory@85200000 { + reg = <0x0 0x85200000 0x0 0x500000>; + no-map; + }; + + pil_video_mem: memory@85700000 { + reg = <0x0 0x85700000 0x0 0x500000>; + no-map; + }; + + pil_cvp_mem: memory@85c00000 { + reg = <0x0 0x85c00000 0x0 0x500000>; + no-map; + }; + + pil_adsp_mem: memory@86100000 { + reg = <0x0 0x86100000 0x0 0x2100000>; + no-map; + }; + + pil_slpi_mem: memory@88200000 { + reg = <0x0 0x88200000 0x0 0x1500000>; + no-map; + }; + + pil_cdsp_mem: memory@89700000 { + reg = <0x0 0x89700000 0x0 0x1e00000>; + no-map; + }; + + pil_ipa_fw_mem: memory@8b500000 { + reg = <0x0 0x8b500000 0x0 0x10000>; + no-map; + }; + + pil_ipa_gsi_mem: memory@8b510000 { + reg = <0x0 0x8b510000 0x0 0xa000>; + no-map; + }; + + pil_gpu_mem: memory@8b51a000 { + reg = <0x0 0x8b51a000 0x0 0x2000>; + no-map; + }; + + pil_spss_mem: memory@8b600000 { + reg = <0x0 0x8b600000 0x0 0x100000>; + no-map; + }; + + pil_modem_mem: memory@8b800000 { + reg = <0x0 0x8b800000 0x0 0x10000000>; + no-map; + }; + + hyp_reserved_mem: memory@d0000000 { + reg = <0x0 0xd0000000 0x0 0x800000>; + no-map; + }; + + pil_trustedvm_mem: memory@d0800000 { + reg = <0x0 0xd0800000 0x0 0x76f7000>; + no-map; + }; + + qrtr_shbuf: memory@d7ef7000 { + reg = <0x0 0xd7ef7000 0x0 0x9000>; + no-map; + }; + + chan0_shbuf: memory@d7f00000 { + reg = <0x0 0xd7f00000 0x0 0x80000>; + no-map; + }; + + chan1_shbuf: memory@d7f80000 { + reg = <0x0 0xd7f80000 0x0 0x80000>; + no-map; + }; + + removed_mem: memory@d8800000 { + reg = <0x0 0xd8800000 0x0 0x6800000>; + no-map; + }; + }; + + smem: qcom,smem { + compatible = "qcom,smem"; + memory-region = <&smem_mem>; + hwlocks = <&tcsr_mutex 3>; + }; + + soc: soc@0 { + #address-cells = <2>; + #size-cells = <2>; + ranges = <0 0 0 0 0x10 0>; + dma-ranges = <0 0 0 0 0x10 0>; + compatible = "simple-bus"; + + gcc: clock-controller@100000 { + compatible = "qcom,gcc-sm8350"; + reg = <0x0 0x00100000 0x0 0x1f0000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clock-names = "bi_tcxo", "sleep_clk"; + clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>; + }; + + ipcc: mailbox@408000 { + compatible = "qcom,sm8350-ipcc", "qcom,ipcc"; + reg = <0 0x00408000 0 0x1000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + #mbox-cells = <2>; + }; + + qupv3_id_1: geniqup@9c0000 { + compatible = "qcom,geni-se-qup"; + reg = <0x0 0x009c0000 0x0 0x6000>; + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc 121>, + <&gcc 122>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + uart2: serial@98c000 { + compatible = "qcom,geni-debug-uart"; + reg = <0 0x0098c000 0 0x4000>; + clock-names = "se"; + clocks = <&gcc 83>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_uart3_default_state>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + tcsr_mutex: hwlock@1f40000 { + compatible = "qcom,tcsr-mutex"; + reg = <0x0 0x01f40000 0x0 0x40000>; + #hwlock-cells = <1>; + }; + + pdc: interrupt-controller@b220000 { + compatible = "qcom,sm8350-pdc", "qcom,pdc"; + reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; + qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>, <55 306 4>, + <59 312 3>, <62 374 2>, <64 434 2>, <66 438 3>, + <69 86 1>, <70 520 54>, <124 609 31>, <155 63 1>, + <156 716 12>; + #interrupt-cells = <2>; + interrupt-parent = <&intc>; + interrupt-controller; + }; + + aoss_qmp: qmp@c300000 { + compatible = "qcom,sm8350-aoss-qmp"; + reg = <0 0x0c300000 0 0x100000>; + interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>; + + #clock-cells = <0>; + #power-domain-cells = <1>; + }; + + tlmm: pinctrl@f100000 { + compatible = "qcom,sm8350-tlmm"; + reg = <0 0x0f100000 0 0x300000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 203>; + + qup_uart3_default_state: qup-uart3-default-state { + rx { + pins = "gpio18"; + function = "qup3"; + }; + tx { + pins = "gpio19"; + function = "qup3"; + }; + }; + }; + + intc: interrupt-controller@17a00000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ + <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ + interrupts = ; + }; + + timer@17c20000 { + compatible = "arm,armv7-timer-mem"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + reg = <0x0 0x17c20000 0x0 0x1000>; + clock-frequency = <19200000>; + + frame@17c21000 { + frame-number = <0>; + interrupts = , + ; + reg = <0x0 0x17c21000 0x0 0x1000>, + <0x0 0x17c22000 0x0 0x1000>; + }; + + frame@17c23000 { + frame-number = <1>; + interrupts = ; + reg = <0x0 0x17c23000 0x0 0x1000>; + status = "disabled"; + }; + + frame@17c25000 { + frame-number = <2>; + interrupts = ; + reg = <0x0 0x17c25000 0x0 0x1000>; + status = "disabled"; + }; + + frame@17c27000 { + frame-number = <3>; + interrupts = ; + reg = <0x0 0x17c27000 0x0 0x1000>; + status = "disabled"; + }; + + frame@17c29000 { + frame-number = <4>; + interrupts = ; + reg = <0x0 0x17c29000 0x0 0x1000>; + status = "disabled"; + }; + + frame@17c2b000 { + frame-number = <5>; + interrupts = ; + reg = <0x0 0x17c2b000 0x0 0x1000>; + status = "disabled"; + }; + + frame@17c2d000 { + frame-number = <6>; + interrupts = ; + reg = <0x0 0x17c2d000 0x0 0x1000>; + status = "disabled"; + }; + }; + + apps_rsc: rsc@18200000 { + label = "apps_rsc"; + compatible = "qcom,rpmh-rsc"; + reg = <0x0 0x18200000 0x0 0x10000>, + <0x0 0x18210000 0x0 0x10000>, + <0x0 0x18220000 0x0 0x10000>; + reg-names = "drv-0", "drv-1", "drv-2"; + interrupts = , + , + ; + qcom,tcs-offset = <0xd00>; + qcom,drv-id = <2>; + qcom,tcs-config = , , + , ; + + rpmhcc: clock-controller { + compatible = "qcom,sm8350-rpmh-clk"; + #clock-cells = <1>; + clock-names = "xo"; + clocks = <&xo_board>; + }; + + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; +};