From patchwork Sat Jan 30 05:20:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gokul Sriram Palanisamy X-Patchwork-Id: 374070 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10AD6C433E0 for ; Sat, 30 Jan 2021 08:57:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D429F64E26 for ; Sat, 30 Jan 2021 08:57:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234409AbhA3I5q (ORCPT ); Sat, 30 Jan 2021 03:57:46 -0500 Received: from alexa-out.qualcomm.com ([129.46.98.28]:20533 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230350AbhA3F0S (ORCPT ); Sat, 30 Jan 2021 00:26:18 -0500 Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 29 Jan 2021 21:20:28 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 29 Jan 2021 21:20:26 -0800 X-QCInternal: smtphost Received: from gokulsri-linux.qualcomm.com ([10.201.2.207]) by ironmsg02-blr.qualcomm.com with ESMTP; 30 Jan 2021 10:50:13 +0530 Received: by gokulsri-linux.qualcomm.com (Postfix, from userid 432570) id 7793A20F4B; Sat, 30 Jan 2021 10:50:13 +0530 (IST) From: Gokul Sriram Palanisamy To: sboyd@kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, devicetree@vger.kernel.org, jassisinghbrar@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, mark.rutland@arm.com, mturquette@baylibre.com, ohad@wizery.com, robh+dt@kernel.org, sricharan@codeaurora.org, gokulsri@codeaurora.org Subject: [PATCH v8 1/9] remoteproc: qcom: Add PRNG proxy clock Date: Sat, 30 Jan 2021 10:50:05 +0530 Message-Id: <1611984013-10201-2-git-send-email-gokulsri@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> References: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org PRNG clock is needed by the secure PIL, support for the same is added in subsequent patches. Signed-off-by: Gokul Sriram Palanisamy Signed-off-by: Sricharan R Signed-off-by: Nikhil Prakash V --- drivers/remoteproc/qcom_q6v5_wcss.c | 65 +++++++++++++++++++++++++++---------- 1 file changed, 47 insertions(+), 18 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_wcss.c b/drivers/remoteproc/qcom_q6v5_wcss.c index 7628259..c0368bb 100644 --- a/drivers/remoteproc/qcom_q6v5_wcss.c +++ b/drivers/remoteproc/qcom_q6v5_wcss.c @@ -91,19 +91,6 @@ enum { WCSS_QCS404, }; -struct wcss_data { - const char *firmware_name; - unsigned int crash_reason_smem; - u32 version; - bool aon_reset_required; - bool wcss_q6_reset_required; - const char *ssr_name; - const char *sysmon_name; - int ssctl_id; - const struct rproc_ops *ops; - bool requires_force_stop; -}; - struct q6v5_wcss { struct device *dev; @@ -128,6 +115,7 @@ struct q6v5_wcss { struct clk *qdsp6ss_xo_cbcr; struct clk *qdsp6ss_core_gfmux; struct clk *lcc_bcr_sleep; + struct clk *prng_clk; struct regulator *cx_supply; struct qcom_sysmon *sysmon; @@ -151,6 +139,21 @@ struct q6v5_wcss { struct qcom_rproc_ssr ssr_subdev; }; +struct wcss_data { + int (*init_clock)(struct q6v5_wcss *wcss); + int (*init_regulator)(struct q6v5_wcss *wcss); + const char *firmware_name; + unsigned int crash_reason_smem; + u32 version; + bool aon_reset_required; + bool wcss_q6_reset_required; + const char *ssr_name; + const char *sysmon_name; + int ssctl_id; + const struct rproc_ops *ops; + bool requires_force_stop; +}; + static int q6v5_wcss_reset(struct q6v5_wcss *wcss) { int ret; @@ -240,6 +243,12 @@ static int q6v5_wcss_start(struct rproc *rproc) struct q6v5_wcss *wcss = rproc->priv; int ret; + ret = clk_prepare_enable(wcss->prng_clk); + if (ret) { + dev_err(wcss->dev, "prng clock enable failed\n"); + return ret; + } + qcom_q6v5_prepare(&wcss->q6v5); /* Release Q6 and WCSS reset */ @@ -732,6 +741,7 @@ static int q6v5_wcss_stop(struct rproc *rproc) return ret; } + clk_disable_unprepare(wcss->prng_clk); qcom_q6v5_unprepare(&wcss->q6v5); return 0; @@ -896,7 +906,21 @@ static int q6v5_alloc_memory_region(struct q6v5_wcss *wcss) return 0; } -static int q6v5_wcss_init_clock(struct q6v5_wcss *wcss) +static int ipq8074_init_clock(struct q6v5_wcss *wcss) +{ + int ret; + + wcss->prng_clk = devm_clk_get(wcss->dev, "prng"); + if (IS_ERR(wcss->prng_clk)) { + ret = PTR_ERR(wcss->prng_clk); + if (ret != -EPROBE_DEFER) + dev_err(wcss->dev, "Failed to get prng clock\n"); + return ret; + } + return 0; +} + +static int qcs404_init_clock(struct q6v5_wcss *wcss) { int ret; @@ -986,7 +1010,7 @@ static int q6v5_wcss_init_clock(struct q6v5_wcss *wcss) return 0; } -static int q6v5_wcss_init_regulator(struct q6v5_wcss *wcss) +static int qcs404_init_regulator(struct q6v5_wcss *wcss) { wcss->cx_supply = devm_regulator_get(wcss->dev, "cx"); if (IS_ERR(wcss->cx_supply)) @@ -1030,12 +1054,14 @@ static int q6v5_wcss_probe(struct platform_device *pdev) if (ret) goto free_rproc; - if (wcss->version == WCSS_QCS404) { - ret = q6v5_wcss_init_clock(wcss); + if (desc->init_clock) { + ret = desc->init_clock(wcss); if (ret) goto free_rproc; + } - ret = q6v5_wcss_init_regulator(wcss); + if (desc->init_regulator) { + ret = desc->init_regulator(wcss); if (ret) goto free_rproc; } @@ -1082,6 +1108,7 @@ static int q6v5_wcss_remove(struct platform_device *pdev) } static const struct wcss_data wcss_ipq8074_res_init = { + .init_clock = ipq8074_init_clock, .firmware_name = "IPQ8074/q6_fw.mdt", .crash_reason_smem = WCSS_CRASH_REASON, .aon_reset_required = true, @@ -1091,6 +1118,8 @@ static const struct wcss_data wcss_ipq8074_res_init = { }; static const struct wcss_data wcss_qcs404_res_init = { + .init_clock = qcs404_init_clock, + .init_regulator = qcs404_init_regulator, .crash_reason_smem = WCSS_CRASH_REASON, .firmware_name = "wcnss.mdt", .version = WCSS_QCS404, From patchwork Sat Jan 30 05:20:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gokul Sriram Palanisamy X-Patchwork-Id: 374076 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52B45C433E0 for ; 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Sat, 30 Jan 2021 10:50:13 +0530 (IST) From: Gokul Sriram Palanisamy To: sboyd@kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, devicetree@vger.kernel.org, jassisinghbrar@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, mark.rutland@arm.com, mturquette@baylibre.com, ohad@wizery.com, robh+dt@kernel.org, sricharan@codeaurora.org, gokulsri@codeaurora.org Subject: [PATCH v8 2/9] remoteproc: qcom: Add secure PIL support Date: Sat, 30 Jan 2021 10:50:06 +0530 Message-Id: <1611984013-10201-3-git-send-email-gokulsri@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> References: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org IPQ8074 uses secure PIL. Hence, adding the support for the same. Signed-off-by: Gokul Sriram Palanisamy Signed-off-by: Sricharan R Signed-off-by: Nikhil Prakash V --- drivers/remoteproc/qcom_q6v5_wcss.c | 43 ++++++++++++++++++++++++++++++++++--- 1 file changed, 40 insertions(+), 3 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_wcss.c b/drivers/remoteproc/qcom_q6v5_wcss.c index c0368bb..4e35e5c 100644 --- a/drivers/remoteproc/qcom_q6v5_wcss.c +++ b/drivers/remoteproc/qcom_q6v5_wcss.c @@ -18,6 +18,7 @@ #include #include #include +#include #include "qcom_common.h" #include "qcom_pil_info.h" #include "qcom_q6v5.h" @@ -86,6 +87,9 @@ #define TCSR_WCSS_CLK_ENABLE 0x14 #define MAX_HALT_REG 3 + +#define WCNSS_PAS_ID 6 + enum { WCSS_IPQ8074, WCSS_QCS404, @@ -134,6 +138,7 @@ struct q6v5_wcss { unsigned int crash_reason_smem; u32 version; bool requires_force_stop; + bool need_mem_protection; struct qcom_rproc_glink glink_subdev; struct qcom_rproc_ssr ssr_subdev; @@ -152,6 +157,7 @@ struct wcss_data { int ssctl_id; const struct rproc_ops *ops; bool requires_force_stop; + bool need_mem_protection; }; static int q6v5_wcss_reset(struct q6v5_wcss *wcss) @@ -251,6 +257,15 @@ static int q6v5_wcss_start(struct rproc *rproc) qcom_q6v5_prepare(&wcss->q6v5); + if (wcss->need_mem_protection) { + ret = qcom_scm_pas_auth_and_reset(WCNSS_PAS_ID); + if (ret) { + dev_err(wcss->dev, "wcss_reset failed\n"); + return ret; + } + goto wait_for_reset; + } + /* Release Q6 and WCSS reset */ ret = reset_control_deassert(wcss->wcss_reset); if (ret) { @@ -285,6 +300,7 @@ static int q6v5_wcss_start(struct rproc *rproc) if (ret) goto wcss_q6_reset; +wait_for_reset: ret = qcom_q6v5_wait_for_start(&wcss->q6v5, 5 * HZ); if (ret == -ETIMEDOUT) dev_err(wcss->dev, "start timed out\n"); @@ -717,6 +733,15 @@ static int q6v5_wcss_stop(struct rproc *rproc) struct q6v5_wcss *wcss = rproc->priv; int ret; + if (wcss->need_mem_protection) { + ret = qcom_scm_pas_shutdown(WCNSS_PAS_ID); + if (ret) { + dev_err(wcss->dev, "not able to shutdown\n"); + return ret; + } + goto pas_done; + } + /* WCSS powerdown */ if (wcss->requires_force_stop) { ret = qcom_q6v5_request_stop(&wcss->q6v5, NULL); @@ -741,6 +766,7 @@ static int q6v5_wcss_stop(struct rproc *rproc) return ret; } +pas_done: clk_disable_unprepare(wcss->prng_clk); qcom_q6v5_unprepare(&wcss->q6v5); @@ -764,9 +790,15 @@ static int q6v5_wcss_load(struct rproc *rproc, const struct firmware *fw) struct q6v5_wcss *wcss = rproc->priv; int ret; - ret = qcom_mdt_load_no_init(wcss->dev, fw, rproc->firmware, - 0, wcss->mem_region, wcss->mem_phys, - wcss->mem_size, &wcss->mem_reloc); + if (wcss->need_mem_protection) + ret = qcom_mdt_load(wcss->dev, fw, rproc->firmware, + WCNSS_PAS_ID, wcss->mem_region, + wcss->mem_phys, wcss->mem_size, + &wcss->mem_reloc); + else + ret = qcom_mdt_load_no_init(wcss->dev, fw, rproc->firmware, + 0, wcss->mem_region, wcss->mem_phys, + wcss->mem_size, &wcss->mem_reloc); if (ret) return ret; @@ -1032,6 +1064,9 @@ static int q6v5_wcss_probe(struct platform_device *pdev) if (!desc) return -EINVAL; + if (desc->need_mem_protection && !qcom_scm_is_available()) + return -EPROBE_DEFER; + rproc = rproc_alloc(&pdev->dev, pdev->name, desc->ops, desc->firmware_name, sizeof(*wcss)); if (!rproc) { @@ -1045,6 +1080,7 @@ static int q6v5_wcss_probe(struct platform_device *pdev) wcss->version = desc->version; wcss->requires_force_stop = desc->requires_force_stop; + wcss->need_mem_protection = desc->need_mem_protection; ret = q6v5_wcss_init_mmio(wcss, pdev); if (ret) @@ -1115,6 +1151,7 @@ static const struct wcss_data wcss_ipq8074_res_init = { .wcss_q6_reset_required = true, .ops = &q6v5_wcss_ipq8074_ops, .requires_force_stop = true, + .need_mem_protection = true, }; static const struct wcss_data wcss_qcs404_res_init = { From patchwork Sat Jan 30 05:20:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gokul Sriram Palanisamy X-Patchwork-Id: 374073 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E67AC433DB for ; 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Sat, 30 Jan 2021 10:50:13 +0530 (IST) From: Gokul Sriram Palanisamy To: sboyd@kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, devicetree@vger.kernel.org, jassisinghbrar@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, mark.rutland@arm.com, mturquette@baylibre.com, ohad@wizery.com, robh+dt@kernel.org, sricharan@codeaurora.org, gokulsri@codeaurora.org Subject: [PATCH v8 3/9] remoteproc: qcom: Add support for split q6 + m3 wlan firmware Date: Sat, 30 Jan 2021 10:50:07 +0530 Message-Id: <1611984013-10201-4-git-send-email-gokulsri@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> References: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org IPQ8074 supports split firmware for q6 and m3 as well. So add support for loading the m3 firmware before q6. Now the drivers works fine for both split and unified firmwares. Signed-off-by: Gokul Sriram Palanisamy Signed-off-by: Sricharan R Signed-off-by: Nikhil Prakash V --- drivers/remoteproc/qcom_q6v5_wcss.c | 33 +++++++++++++++++++++++++++++---- 1 file changed, 29 insertions(+), 4 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_wcss.c b/drivers/remoteproc/qcom_q6v5_wcss.c index 4e35e5c..2ecbd73 100644 --- a/drivers/remoteproc/qcom_q6v5_wcss.c +++ b/drivers/remoteproc/qcom_q6v5_wcss.c @@ -139,6 +139,7 @@ struct q6v5_wcss { u32 version; bool requires_force_stop; bool need_mem_protection; + const char *m3_firmware_name; struct qcom_rproc_glink glink_subdev; struct qcom_rproc_ssr ssr_subdev; @@ -147,7 +148,8 @@ struct q6v5_wcss { struct wcss_data { int (*init_clock)(struct q6v5_wcss *wcss); int (*init_regulator)(struct q6v5_wcss *wcss); - const char *firmware_name; + const char *q6_firmware_name; + const char *m3_firmware_name; unsigned int crash_reason_smem; u32 version; bool aon_reset_required; @@ -788,8 +790,29 @@ static void *q6v5_wcss_da_to_va(struct rproc *rproc, u64 da, size_t len) static int q6v5_wcss_load(struct rproc *rproc, const struct firmware *fw) { struct q6v5_wcss *wcss = rproc->priv; + const struct firmware *m3_fw; int ret; + if (wcss->m3_firmware_name) { + ret = request_firmware(&m3_fw, wcss->m3_firmware_name, + wcss->dev); + if (ret) + goto skip_m3; + + ret = qcom_mdt_load_no_init(wcss->dev, m3_fw, + wcss->m3_firmware_name, 0, + wcss->mem_region, wcss->mem_phys, + wcss->mem_size, &wcss->mem_reloc); + + release_firmware(m3_fw); + + if (ret) { + dev_err(wcss->dev, "can't load m3_fw.bXX\n"); + return ret; + } + } + +skip_m3: if (wcss->need_mem_protection) ret = qcom_mdt_load(wcss->dev, fw, rproc->firmware, WCNSS_PAS_ID, wcss->mem_region, @@ -1068,7 +1091,7 @@ static int q6v5_wcss_probe(struct platform_device *pdev) return -EPROBE_DEFER; rproc = rproc_alloc(&pdev->dev, pdev->name, desc->ops, - desc->firmware_name, sizeof(*wcss)); + desc->q6_firmware_name, sizeof(*wcss)); if (!rproc) { dev_err(&pdev->dev, "failed to allocate rproc\n"); return -ENOMEM; @@ -1081,6 +1104,7 @@ static int q6v5_wcss_probe(struct platform_device *pdev) wcss->version = desc->version; wcss->requires_force_stop = desc->requires_force_stop; wcss->need_mem_protection = desc->need_mem_protection; + wcss->m3_firmware_name = desc->m3_firmware_name; ret = q6v5_wcss_init_mmio(wcss, pdev); if (ret) @@ -1145,7 +1169,8 @@ static int q6v5_wcss_remove(struct platform_device *pdev) static const struct wcss_data wcss_ipq8074_res_init = { .init_clock = ipq8074_init_clock, - .firmware_name = "IPQ8074/q6_fw.mdt", + .q6_firmware_name = "IPQ8074/q6_fw.mdt", + .m3_firmware_name = "IPQ8074/m3_fw.mdt", .crash_reason_smem = WCSS_CRASH_REASON, .aon_reset_required = true, .wcss_q6_reset_required = true, @@ -1158,7 +1183,7 @@ static const struct wcss_data wcss_qcs404_res_init = { .init_clock = qcs404_init_clock, .init_regulator = qcs404_init_regulator, .crash_reason_smem = WCSS_CRASH_REASON, - .firmware_name = "wcnss.mdt", + .q6_firmware_name = "wcnss.mdt", .version = WCSS_QCS404, .aon_reset_required = false, .wcss_q6_reset_required = false, From patchwork Sat Jan 30 05:20:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gokul Sriram Palanisamy X-Patchwork-Id: 374074 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A815FC433E0 for ; Sat, 30 Jan 2021 05:48:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 700CB64E0C for ; Sat, 30 Jan 2021 05:48:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233863AbhA3Fdg (ORCPT ); Sat, 30 Jan 2021 00:33:36 -0500 Received: from alexa-out.qualcomm.com ([129.46.98.28]:16935 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233826AbhA3Fbk (ORCPT ); Sat, 30 Jan 2021 00:31:40 -0500 Received: from ironmsg07-lv.qualcomm.com (HELO ironmsg07-lv.qulacomm.com) ([10.47.202.151]) by alexa-out.qualcomm.com with ESMTP; 29 Jan 2021 21:20:34 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg07-lv.qulacomm.com with ESMTP/TLS/AES256-SHA; 29 Jan 2021 21:20:32 -0800 X-QCInternal: smtphost Received: from gokulsri-linux.qualcomm.com ([10.201.2.207]) by ironmsg02-blr.qualcomm.com with ESMTP; 30 Jan 2021 10:50:13 +0530 Received: by gokulsri-linux.qualcomm.com (Postfix, from userid 432570) id E99B821A07; Sat, 30 Jan 2021 10:50:13 +0530 (IST) From: Gokul Sriram Palanisamy To: sboyd@kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, devicetree@vger.kernel.org, jassisinghbrar@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, mark.rutland@arm.com, mturquette@baylibre.com, ohad@wizery.com, robh+dt@kernel.org, sricharan@codeaurora.org, gokulsri@codeaurora.org Subject: [PATCH v8 4/9] remoteproc: qcom: Add ssr subdevice identifier Date: Sat, 30 Jan 2021 10:50:08 +0530 Message-Id: <1611984013-10201-5-git-send-email-gokulsri@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> References: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add name for ssr subdevice on IPQ8074 SoC. Signed-off-by: Gokul Sriram Palanisamy Signed-off-by: Sricharan R Signed-off-by: Nikhil Prakash V --- drivers/remoteproc/qcom_q6v5_wcss.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/remoteproc/qcom_q6v5_wcss.c b/drivers/remoteproc/qcom_q6v5_wcss.c index 2ecbd73..eb804eb 100644 --- a/drivers/remoteproc/qcom_q6v5_wcss.c +++ b/drivers/remoteproc/qcom_q6v5_wcss.c @@ -1174,6 +1174,7 @@ static const struct wcss_data wcss_ipq8074_res_init = { .crash_reason_smem = WCSS_CRASH_REASON, .aon_reset_required = true, .wcss_q6_reset_required = true, + .ssr_name = "q6wcss", .ops = &q6v5_wcss_ipq8074_ops, .requires_force_stop = true, .need_mem_protection = true, From patchwork Sat Jan 30 05:20:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gokul Sriram Palanisamy X-Patchwork-Id: 373829 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C896C4332D for ; Sat, 30 Jan 2021 08:57:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6017164E29 for ; Sat, 30 Jan 2021 08:57:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230168AbhA3I5b (ORCPT ); Sat, 30 Jan 2021 03:57:31 -0500 Received: from alexa-out.qualcomm.com ([129.46.98.28]:18831 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233827AbhA3F0o (ORCPT ); Sat, 30 Jan 2021 00:26:44 -0500 Received: from ironmsg07-lv.qualcomm.com (HELO ironmsg07-lv.qulacomm.com) ([10.47.202.151]) by alexa-out.qualcomm.com with ESMTP; 29 Jan 2021 21:20:29 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg07-lv.qulacomm.com with ESMTP/TLS/AES256-SHA; 29 Jan 2021 21:20:27 -0800 X-QCInternal: smtphost Received: from gokulsri-linux.qualcomm.com ([10.201.2.207]) by ironmsg02-blr.qualcomm.com with ESMTP; 30 Jan 2021 10:50:14 +0530 Received: by gokulsri-linux.qualcomm.com (Postfix, from userid 432570) id 152D421A08; Sat, 30 Jan 2021 10:50:14 +0530 (IST) From: Gokul Sriram Palanisamy To: sboyd@kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, devicetree@vger.kernel.org, jassisinghbrar@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, mark.rutland@arm.com, mturquette@baylibre.com, ohad@wizery.com, robh+dt@kernel.org, sricharan@codeaurora.org, gokulsri@codeaurora.org Subject: [PATCH v8 5/9] remoteproc: qcom: Update regmap offsets for halt register Date: Sat, 30 Jan 2021 10:50:09 +0530 Message-Id: <1611984013-10201-6-git-send-email-gokulsri@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> References: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Fixed issue in reading halt-regs parameter from device-tree. Signed-off-by: Gokul Sriram Palanisamy Signed-off-by: Sricharan R --- drivers/remoteproc/qcom_q6v5_wcss.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_wcss.c b/drivers/remoteproc/qcom_q6v5_wcss.c index eb804eb..7c64bfc 100644 --- a/drivers/remoteproc/qcom_q6v5_wcss.c +++ b/drivers/remoteproc/qcom_q6v5_wcss.c @@ -86,7 +86,7 @@ #define TCSR_WCSS_CLK_MASK 0x1F #define TCSR_WCSS_CLK_ENABLE 0x14 -#define MAX_HALT_REG 3 +#define MAX_HALT_REG 4 #define WCNSS_PAS_ID 6 @@ -154,6 +154,7 @@ struct wcss_data { u32 version; bool aon_reset_required; bool wcss_q6_reset_required; + bool bcr_reset_required; const char *ssr_name; const char *sysmon_name; int ssctl_id; @@ -874,10 +875,13 @@ static int q6v5_wcss_init_reset(struct q6v5_wcss *wcss, } } - wcss->wcss_q6_bcr_reset = devm_reset_control_get_exclusive(dev, "wcss_q6_bcr_reset"); - if (IS_ERR(wcss->wcss_q6_bcr_reset)) { - dev_err(wcss->dev, "unable to acquire wcss_q6_bcr_reset\n"); - return PTR_ERR(wcss->wcss_q6_bcr_reset); + if (desc->bcr_reset_required) { + wcss->wcss_q6_bcr_reset = devm_reset_control_get_exclusive(dev, + "wcss_q6_bcr_reset"); + if (IS_ERR(wcss->wcss_q6_bcr_reset)) { + dev_err(wcss->dev, "unable to acquire wcss_q6_bcr_reset\n"); + return PTR_ERR(wcss->wcss_q6_bcr_reset); + } } return 0; @@ -925,9 +929,9 @@ static int q6v5_wcss_init_mmio(struct q6v5_wcss *wcss, return -EINVAL; } - wcss->halt_q6 = halt_reg[0]; - wcss->halt_wcss = halt_reg[1]; - wcss->halt_nc = halt_reg[2]; + wcss->halt_q6 = halt_reg[1]; + wcss->halt_wcss = halt_reg[2]; + wcss->halt_nc = halt_reg[3]; return 0; } @@ -1174,6 +1178,7 @@ static const struct wcss_data wcss_ipq8074_res_init = { .crash_reason_smem = WCSS_CRASH_REASON, .aon_reset_required = true, .wcss_q6_reset_required = true, + .bcr_reset_required = false, .ssr_name = "q6wcss", .ops = &q6v5_wcss_ipq8074_ops, .requires_force_stop = true, @@ -1188,6 +1193,7 @@ static const struct wcss_data wcss_qcs404_res_init = { .version = WCSS_QCS404, .aon_reset_required = false, .wcss_q6_reset_required = false, + .bcr_reset_required = true, .ssr_name = "mpss", .sysmon_name = "wcnss", .ssctl_id = 0x12, From patchwork Sat Jan 30 05:20:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gokul Sriram Palanisamy X-Patchwork-Id: 373831 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0782C433DB for ; Sat, 30 Jan 2021 08:57:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9B3D664E26 for ; Sat, 30 Jan 2021 08:57:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234268AbhA3Ivc (ORCPT ); Sat, 30 Jan 2021 03:51:32 -0500 Received: from alexa-out.qualcomm.com ([129.46.98.28]:20533 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230358AbhA3Fag (ORCPT ); Sat, 30 Jan 2021 00:30:36 -0500 Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 29 Jan 2021 21:20:32 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 29 Jan 2021 21:20:30 -0800 X-QCInternal: smtphost Received: from gokulsri-linux.qualcomm.com ([10.201.2.207]) by ironmsg02-blr.qualcomm.com with ESMTP; 30 Jan 2021 10:50:14 +0530 Received: by gokulsri-linux.qualcomm.com (Postfix, from userid 432570) id 4BBE621A09; Sat, 30 Jan 2021 10:50:14 +0530 (IST) From: Gokul Sriram Palanisamy To: sboyd@kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, devicetree@vger.kernel.org, jassisinghbrar@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, mark.rutland@arm.com, mturquette@baylibre.com, ohad@wizery.com, robh+dt@kernel.org, sricharan@codeaurora.org, gokulsri@codeaurora.org Subject: [PATCH v8 6/9] dt-bindings: clock: qcom: Add reset for WCSSAON Date: Sat, 30 Jan 2021 10:50:10 +0530 Message-Id: <1611984013-10201-7-git-send-email-gokulsri@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> References: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add binding for WCSSAON reset required for Q6v5 reset on IPQ8074 SoC. Signed-off-by: Gokul Sriram Palanisamy Signed-off-by: Sricharan R Signed-off-by: Nikhil Prakash V Acked-by: Rob Herring Acked-by: Stephen Boyd --- include/dt-bindings/clock/qcom,gcc-ipq8074.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/qcom,gcc-ipq8074.h b/include/dt-bindings/clock/qcom,gcc-ipq8074.h index 8e2bec1..9b1c42b 100644 --- a/include/dt-bindings/clock/qcom,gcc-ipq8074.h +++ b/include/dt-bindings/clock/qcom,gcc-ipq8074.h @@ -366,5 +366,6 @@ #define GCC_PCIE1_AHB_ARES 129 #define GCC_PCIE1_AXI_MASTER_STICKY_ARES 130 #define GCC_PCIE0_AXI_SLAVE_STICKY_ARES 131 +#define GCC_WCSSAON_RESET 132 #endif From patchwork Sat Jan 30 05:20:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gokul Sriram Palanisamy X-Patchwork-Id: 373832 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 616D3C433DB for ; Sat, 30 Jan 2021 05:52:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1FBCC61477 for ; Sat, 30 Jan 2021 05:52:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233466AbhA3Frk (ORCPT ); Sat, 30 Jan 2021 00:47:40 -0500 Received: from alexa-out.qualcomm.com ([129.46.98.28]:16935 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233866AbhA3Fdl (ORCPT ); Sat, 30 Jan 2021 00:33:41 -0500 Received: from ironmsg07-lv.qualcomm.com (HELO ironmsg07-lv.qulacomm.com) ([10.47.202.151]) by alexa-out.qualcomm.com with ESMTP; 29 Jan 2021 21:20:36 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg07-lv.qulacomm.com with ESMTP/TLS/AES256-SHA; 29 Jan 2021 21:20:34 -0800 X-QCInternal: smtphost Received: from gokulsri-linux.qualcomm.com ([10.201.2.207]) by ironmsg02-blr.qualcomm.com with ESMTP; 30 Jan 2021 10:50:14 +0530 Received: by gokulsri-linux.qualcomm.com (Postfix, from userid 432570) id 6641D21A17; Sat, 30 Jan 2021 10:50:14 +0530 (IST) From: Gokul Sriram Palanisamy To: sboyd@kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, devicetree@vger.kernel.org, jassisinghbrar@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, mark.rutland@arm.com, mturquette@baylibre.com, ohad@wizery.com, robh+dt@kernel.org, sricharan@codeaurora.org, gokulsri@codeaurora.org Subject: [PATCH v8 7/9] clk: qcom: Add WCSSAON reset Date: Sat, 30 Jan 2021 10:50:11 +0530 Message-Id: <1611984013-10201-8-git-send-email-gokulsri@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> References: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add WCSSAON reset required for Q6v5 on IPQ8074 SoC. Signed-off-by: Gokul Sriram Palanisamy Signed-off-by: Sricharan R Signed-off-by: Nikhil Prakash V Acked-by: Stephen Boyd --- drivers/clk/qcom/gcc-ipq8074.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/qcom/gcc-ipq8074.c b/drivers/clk/qcom/gcc-ipq8074.c index 108fe27..d347364 100644 --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c @@ -4745,6 +4745,7 @@ static const struct qcom_reset_map gcc_ipq8074_resets[] = { [GCC_PCIE1_AXI_SLAVE_ARES] = { 0x76040, 4 }, [GCC_PCIE1_AHB_ARES] = { 0x76040, 5 }, [GCC_PCIE1_AXI_MASTER_STICKY_ARES] = { 0x76040, 6 }, + [GCC_WCSSAON_RESET] = { 0x59010, 0 }, }; static const struct of_device_id gcc_ipq8074_match_table[] = { From patchwork Sat Jan 30 05:20:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gokul Sriram Palanisamy X-Patchwork-Id: 374069 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1B92C433E0 for ; Sat, 30 Jan 2021 08:59:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 73BCC64E29 for ; Sat, 30 Jan 2021 08:59:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230470AbhA3I62 (ORCPT ); Sat, 30 Jan 2021 03:58:28 -0500 Received: from alexa-out.qualcomm.com ([129.46.98.28]:20533 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230298AbhA3FVq (ORCPT ); Sat, 30 Jan 2021 00:21:46 -0500 Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 29 Jan 2021 21:20:24 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 29 Jan 2021 21:20:21 -0800 X-QCInternal: smtphost Received: from gokulsri-linux.qualcomm.com ([10.201.2.207]) by ironmsg02-blr.qualcomm.com with ESMTP; 30 Jan 2021 10:50:14 +0530 Received: by gokulsri-linux.qualcomm.com (Postfix, from userid 432570) id 80D4921A4A; Sat, 30 Jan 2021 10:50:14 +0530 (IST) From: Gokul Sriram Palanisamy To: sboyd@kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, devicetree@vger.kernel.org, jassisinghbrar@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, mark.rutland@arm.com, mturquette@baylibre.com, ohad@wizery.com, robh+dt@kernel.org, sricharan@codeaurora.org, gokulsri@codeaurora.org Subject: [PATCH v8 8/9] arm64: dts: Add support for scm on IPQ8074 SoCs Date: Sat, 30 Jan 2021 10:50:12 +0530 Message-Id: <1611984013-10201-9-git-send-email-gokulsri@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> References: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enables scm support, clock is not needed for enabling scm interface. Signed-off-by: Gokul Sriram Palanisamy Signed-off-by: Sricharan R --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index a32e5e7..6e719b4 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -76,6 +76,12 @@ method = "smc"; }; + firmware { + scm { + compatible = "qcom,scm-ipq8074", "qcom,scm"; + }; + }; + soc: soc { #address-cells = <0x1>; #size-cells = <0x1>; From patchwork Sat Jan 30 05:20:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gokul Sriram Palanisamy X-Patchwork-Id: 373828 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6B54C43381 for ; Sat, 30 Jan 2021 08:58:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7E1D064DBD for ; Sat, 30 Jan 2021 08:58:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230114AbhA3I57 (ORCPT ); Sat, 30 Jan 2021 03:57:59 -0500 Received: from alexa-out.qualcomm.com ([129.46.98.28]:16935 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230518AbhA3FYn (ORCPT ); Sat, 30 Jan 2021 00:24:43 -0500 Received: from ironmsg07-lv.qualcomm.com (HELO ironmsg07-lv.qulacomm.com) ([10.47.202.151]) by alexa-out.qualcomm.com with ESMTP; 29 Jan 2021 21:20:28 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg07-lv.qulacomm.com with ESMTP/TLS/AES256-SHA; 29 Jan 2021 21:20:25 -0800 X-QCInternal: smtphost Received: from gokulsri-linux.qualcomm.com ([10.201.2.207]) by ironmsg02-blr.qualcomm.com with ESMTP; 30 Jan 2021 10:50:14 +0530 Received: by gokulsri-linux.qualcomm.com (Postfix, from userid 432570) id AFD9A219E7; Sat, 30 Jan 2021 10:50:14 +0530 (IST) From: Gokul Sriram Palanisamy To: sboyd@kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, devicetree@vger.kernel.org, jassisinghbrar@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, mark.rutland@arm.com, mturquette@baylibre.com, ohad@wizery.com, robh+dt@kernel.org, sricharan@codeaurora.org, gokulsri@codeaurora.org Subject: [PATCH v8 9/9] arm64: dts: qcom: Enable Q6v5 WCSS for ipq8074 SoC Date: Sat, 30 Jan 2021 10:50:13 +0530 Message-Id: <1611984013-10201-10-git-send-email-gokulsri@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> References: <1611984013-10201-1-git-send-email-gokulsri@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable remoteproc WCSS PIL driver with glink and ssr subdevices. Also configures shared memory and enables smp2p and mailboxes required for IPC. Signed-off-by: Gokul Sriram Palanisamy Signed-off-by: Sricharan R Signed-off-by: Nikhil Prakash V --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 121 ++++++++++++++++++++++++++++++++++ 1 file changed, 121 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index 6e719b4..9bde3f9c 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -76,12 +76,66 @@ method = "smc"; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + smem_region: memory@4ab00000 { + no-map; + reg = <0x0 0x4ab00000 0x0 0x00100000>; + }; + + q6_region: memory@4b000000 { + no-map; + reg = <0x0 0x4b000000 0x0 0x05f00000>; + }; + }; + firmware { scm { compatible = "qcom,scm-ipq8074", "qcom,scm"; }; }; + tcsr_mutex: hwlock@193d000 { + compatible = "qcom,tcsr-mutex"; + syscon = <&tcsr_mutex_regs 0 0x80>; + #hwlock-cells = <1>; + }; + + smem { + compatible = "qcom,smem"; + memory-region = <&smem_region>; + hwlocks = <&tcsr_mutex 0>; + }; + + wcss: smp2p-wcss { + compatible = "qcom,smp2p"; + qcom,smem = <435>, <428>; + + interrupt-parent = <&intc>; + interrupts = <0 322 1>; + + mboxes = <&apcs_glb 9>; + + qcom,local-pid = <0>; + qcom,remote-pid = <1>; + + wcss_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + qcom,smp2p-feature-ssr-ack; + #qcom,smem-state-cells = <1>; + }; + + wcss_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + soc: soc { #address-cells = <0x1>; #size-cells = <0x1>; @@ -695,5 +749,72 @@ "axi_m_sticky"; status = "disabled"; }; + + tcsr_q6: syscon@1945000 { + compatible = "syscon"; + reg = <0x01945000 0xe000>; + }; + + tcsr_mutex_regs: syscon@193d000 { + compatible = "syscon"; + reg = <0x01905000 0x8000>; + }; + + apcs_glb: mailbox@b111000 { + compatible = "qcom,ipq8074-apcs-apps-global"; + reg = <0x0b111000 0x1000>; + + #mbox-cells = <1>; + }; + + q6v5_wcss: q6v5_wcss@cd00000 { + compatible = "qcom,ipq8074-wcss-pil"; + reg = <0x0cd00000 0x4040>, + <0x004ab000 0x20>; + reg-names = "qdsp6", + "rmb"; + qca,auto-restart; + qca,extended-intc; + interrupts-extended = <&intc 0 325 1>, + <&wcss_smp2p_in 0 0>, + <&wcss_smp2p_in 1 0>, + <&wcss_smp2p_in 2 0>, + <&wcss_smp2p_in 3 0>; + interrupt-names = "wdog", + "fatal", + "ready", + "handover", + "stop-ack"; + + resets = <&gcc GCC_WCSSAON_RESET>, + <&gcc GCC_WCSS_BCR>, + <&gcc GCC_WCSS_Q6_BCR>; + + reset-names = "wcss_aon_reset", + "wcss_reset", + "wcss_q6_reset"; + + clocks = <&gcc GCC_PRNG_AHB_CLK>; + clock-names = "prng"; + + qcom,halt-regs = <&tcsr_q6 0xa000 0xd000 0x0>; + + qcom,smem-states = <&wcss_smp2p_out 0>, + <&wcss_smp2p_out 1>; + qcom,smem-state-names = "shutdown", + "stop"; + + memory-region = <&q6_region>; + + glink-edge { + interrupts = ; + qcom,remote-pid = <1>; + mboxes = <&apcs_glb 8>; + + rpm_requests { + qcom,glink-channels = "IPCRTR"; + }; + }; + }; }; };