From patchwork Sun Jan 31 01:38:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 374099 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8041BC433E9 for ; Sun, 31 Jan 2021 01:40:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 42AF564E17 for ; Sun, 31 Jan 2021 01:40:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232274AbhAaBj4 (ORCPT ); Sat, 30 Jan 2021 20:39:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230168AbhAaBjy (ORCPT ); Sat, 30 Jan 2021 20:39:54 -0500 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [IPv6:2001:4b7a:2000:18::164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE93EC0613D6 for ; Sat, 30 Jan 2021 17:39:13 -0800 (PST) Received: from localhost.localdomain (abaf219.neoplus.adsl.tpnet.pl [83.6.169.219]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 76DB21F6C5; Sun, 31 Jan 2021 02:39:11 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 01/18] arm64: dts: qcom: msm8994: Add SMP2P nodes Date: Sun, 31 Jan 2021 02:38:32 +0100 Message-Id: <20210131013853.55810-2-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210131013853.55810-1-konrad.dybcio@somainline.org> References: <20210131013853.55810-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org They will be required for bringup of remote processors. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 49 +++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index e694aaad3c99..af1a9f7907b8 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -276,6 +276,55 @@ smem { hwlocks = <&tcsr_mutex 3>; }; + smp2p-lpass { + compatible = "qcom,smp2p"; + qcom,smem = <443>, <429>; + + interrupts = ; + + qcom,ipc = <&apcs 8 10>; + + qcom,local-pid = <0>; + qcom,remote-pid = <2>; + + adsp_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + adsp_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + smp2p-modem { + compatible = "qcom,smp2p"; + qcom,smem = <435>, <428>; + + interrupt-parent = <&intc>; + interrupts = ; + + qcom,ipc = <&apcs 8 14>; + + qcom,local-pid = <0>; + qcom,remote-pid = <1>; + + modem_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + modem_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + soc: soc { #address-cells = <1>; From patchwork Sun Jan 31 01:38:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 374096 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA5B3C43331 for ; Sun, 31 Jan 2021 01:40:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 94E7764E11 for ; Sun, 31 Jan 2021 01:40:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232641AbhAaBko (ORCPT ); Sat, 30 Jan 2021 20:40:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232340AbhAaBkd (ORCPT ); Sat, 30 Jan 2021 20:40:33 -0500 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [IPv6:2001:4b7a:2000:18::164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CCE87C061786 for ; Sat, 30 Jan 2021 17:39:17 -0800 (PST) Received: from localhost.localdomain (abaf219.neoplus.adsl.tpnet.pl [83.6.169.219]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id C7C441F6C5; Sun, 31 Jan 2021 02:39:15 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gustave Monce Subject: [PATCH 02/18] arm64: dts: qcom: msm8994: Fix remaining BLSP errors/mistakes Date: Sun, 31 Jan 2021 02:38:33 +0100 Message-Id: <20210131013853.55810-3-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210131013853.55810-1-konrad.dybcio@somainline.org> References: <20210131013853.55810-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Gustave Monce * Move 35500 clock-frequency to kitakami (turns out it's a Sony specific) * Add missing interfaces * Fix the naming scheme * Fix up pin assignments to make all BLSPs work * Add DMA where previously omitted Co-authored-by: Konrad Dybcio Signed-off-by: Gustave Monce Signed-off-by: Konrad Dybcio --- .../dts/qcom/msm8994-msft-lumia-cityman.dts | 2 +- .../msm8994-sony-xperia-kitakami-karin.dts | 2 +- .../qcom/msm8994-sony-xperia-kitakami.dtsi | 24 +-- arch/arm64/boot/dts/qcom/msm8994.dtsi | 163 ++++++++++++++---- 4 files changed, 149 insertions(+), 42 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-cityman.dts b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-cityman.dts index ed9034b96013..2d989a70e0b5 100644 --- a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-cityman.dts +++ b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-cityman.dts @@ -32,7 +32,7 @@ chosen { }; }; -&blsp_i2c1 { +&blsp1_i2c1 { status = "okay"; rmi4-i2c-dev@4b { diff --git a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-karin.dts b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-karin.dts index 4dcf42eafb3a..a1d1a075941a 100644 --- a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-karin.dts +++ b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-karin.dts @@ -12,7 +12,7 @@ / { compatible = "sony,karin-row", "qcom,msm8994"; }; -&blsp_i2c5 { +&blsp2_i2c5 { /* * TI LP8557 backlight driver @ 2c * AD AD7146 touch controller @ 2f diff --git a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi index 586d866188d7..48de66bf19c4 100644 --- a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi @@ -94,7 +94,7 @@ tzapp: memory@c7800000 { }; }; -&blsp_spi0 { +&blsp1_spi1 { status = "okay"; /* FPC fingerprint reader */ @@ -102,26 +102,23 @@ &blsp_spi0 { /* I2C1 is disabled on this board */ -&blsp_i2c2 { +&blsp1_i2c2 { status = "okay"; + clock-frequency = <355000>; /* NXP PN547 NFC */ }; -&blsp_i2c4 { +&blsp1_i2c4 { status = "okay"; + clock-frequency = <355000>; /* Empty but active */ }; -&blsp_i2c5 { - status = "okay"; - - /* sii8620 HDMI/MHL bridge */ -}; - -&blsp_i2c6 { +&blsp1_i2c6 { status = "okay"; + clock-frequency = <355000>; touchscreen: rmi4-i2c-dev@2c { compatible = "syna,rmi4-i2c"; @@ -157,6 +154,13 @@ &blsp1_uart2 { status = "okay"; }; +&blsp2_i2c5 { + status = "okay"; + clock-frequency = <355000>; + + /* sii8620 HDMI/MHL bridge */ +}; + &blsp2_uart2 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index af1a9f7907b8..a6148b00e82c 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -507,7 +507,7 @@ blsp1_uart2: serial@f991e000 { status = "disabled"; }; - blsp_i2c1: i2c@f9923000 { + blsp1_i2c1: i2c@f9923000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0xf9923000 0x500>; interrupts = ; @@ -515,6 +515,8 @@ blsp_i2c1: i2c@f9923000 { <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>; clock-names = "iface", "core"; clock-frequency = <400000>; + dmas = <&blsp1_dma 12>, <&blsp1_dma 13>; + dma-names = "tx", "rx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c1_default>; pinctrl-1 = <&i2c1_sleep>; @@ -523,7 +525,7 @@ blsp_i2c1: i2c@f9923000 { status = "disabled"; }; - blsp_spi0: spi@f9923000 { + blsp1_spi1: spi@f9923000 { compatible = "qcom,spi-qup-v2.2.1"; reg = <0xf9923000 0x500>; interrupts = ; @@ -534,21 +536,21 @@ blsp_spi0: spi@f9923000 { dmas = <&blsp1_dma 12>, <&blsp1_dma 13>; dma-names = "tx", "rx"; pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp1_spi0_default>; - pinctrl-1 = <&blsp1_spi0_sleep>; + pinctrl-0 = <&blsp1_spi1_default>; + pinctrl-1 = <&blsp1_spi1_sleep>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; - blsp_i2c2: i2c@f9924000 { + blsp1_i2c2: i2c@f9924000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0xf9924000 0x500>; interrupts = ; clocks = <&gcc GCC_BLSP1_AHB_CLK>, <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; clock-names = "iface", "core"; - clock-frequency = <355000>; + clock-frequency = <400000>; dmas = <&blsp1_dma 14>, <&blsp1_dma 15>; dma-names = "tx", "rx"; pinctrl-names = "default", "sleep"; @@ -561,14 +563,16 @@ blsp_i2c2: i2c@f9924000 { /* I2C3 doesn't exist */ - blsp_i2c4: i2c@f9926000 { + blsp1_i2c4: i2c@f9926000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0xf9926000 0x500>; interrupts = ; clocks = <&gcc GCC_BLSP1_AHB_CLK>, <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>; clock-names = "iface", "core"; - clock-frequency = <355000>; + clock-frequency = <400000>; + dmas = <&blsp1_dma 18>, <&blsp1_dma 19>; + dma-names = "tx", "rx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c4_default>; pinctrl-1 = <&i2c4_sleep>; @@ -577,31 +581,32 @@ blsp_i2c4: i2c@f9926000 { status = "disabled"; }; - blsp2_dma: dma-controller@f9944000 { - compatible = "qcom,bam-v1.7.0"; - reg = <0xf9944000 0x19000>; - interrupts = ; - clocks = <&gcc GCC_BLSP2_AHB_CLK>; - clock-names = "bam_clk"; - #dma-cells = <1>; - qcom,ee = <0>; - qcom,controlled-remotely; - num-channels = <18>; - qcom,num-ees = <4>; + blsp1_i2c5: i2c@f9927000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0xf9927000 0x500>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, + <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>; + clock-names = "iface", "core"; + clock-frequency = <400000>; + dmas = <&blsp2_dma 20>, <&blsp2_dma 21>; + dma-names = "tx", "rx"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c5_default>; + pinctrl-1 = <&i2c5_sleep>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; }; - /* According to downstream kernels, i2c6 - * comes before i2c5 address-wise... - */ - - blsp_i2c6: i2c@f9928000 { + blsp1_i2c6: i2c@f9928000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0xf9928000 0x500>; interrupts = ; clocks = <&gcc GCC_BLSP1_AHB_CLK>, <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>; clock-names = "iface", "core"; - clock-frequency = <355000>; + clock-frequency = <400000>; dmas = <&blsp1_dma 22>, <&blsp1_dma 23>; dma-names = "tx", "rx"; pinctrl-names = "default", "sleep"; @@ -612,6 +617,19 @@ blsp_i2c6: i2c@f9928000 { status = "disabled"; }; + blsp2_dma: dma-controller@f9944000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0xf9944000 0x19000>; + interrupts = ; + clocks = <&gcc GCC_BLSP2_AHB_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + qcom,controlled-remotely; + num-channels = <18>; + qcom,num-ees = <4>; + }; + blsp2_uart2: serial@f995e000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0xf995e000 0x1000>; @@ -627,7 +645,43 @@ blsp2_uart2: serial@f995e000 { status = "disabled"; }; - blsp_i2c5: i2c@f9967000 { + blsp2_i2c1: i2c@f9963000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0xf9963000 0x500>; + interrupts = ; + clocks = <&gcc GCC_BLSP2_AHB_CLK>, + <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>; + clock-names = "iface", "core"; + clock-frequency = <400000>; + dmas = <&blsp2_dma 12>, <&blsp2_dma 13>; + dma-names = "tx", "rx"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c7_default>; + pinctrl-1 = <&i2c7_sleep>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + blsp2_spi4: spi@f9966000 { + compatible = "qcom,spi-qup-v2.2.1"; + reg = <0xf9966000 0x500>; + interrupts = ; + clocks = <&gcc GCC_BLSP2_QUP4_SPI_APPS_CLK>, + <&gcc GCC_BLSP2_AHB_CLK>; + clock-names = "core", "iface"; + spi-max-frequency = <19200000>; + dmas = <&blsp2_dma 18>, <&blsp2_dma 19>; + dma-names = "tx", "rx"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp2_spi10_default>; + pinctrl-1 = <&blsp2_spi10_sleep>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + blsp2_i2c5: i2c@f9967000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0xf9967000 0x500>; interrupts = ; @@ -638,8 +692,8 @@ blsp_i2c5: i2c@f9967000 { dmas = <&blsp2_dma 20>, <&blsp2_dma 21>; dma-names = "tx", "rx"; pinctrl-names = "default", "sleep"; - pinctrl-0 = <&i2c5_default>; - pinctrl-1 = <&i2c5_sleep>; + pinctrl-0 = <&i2c11_default>; + pinctrl-1 = <&i2c11_sleep>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -795,7 +849,56 @@ i2c6_sleep: i2c6-sleep { bias-disable; }; - blsp1_spi0_default: blsp1-spi0-default { + i2c7_default: i2c7-default { + function = "blsp_i2c7"; + pins = "gpio44", "gpio43"; + drive-strength = <2>; + bias-disable; + }; + + i2c7_sleep: i2c7-sleep { + function = "gpio"; + pins = "gpio44", "gpio43"; + drive-strength = <2>; + bias-disable; + }; + + blsp2_spi10_default: blsp2-spi10-default { + default { + function = "blsp_spi10"; + pins = "gpio53", "gpio54", "gpio55"; + drive-strength = <10>; + bias-pull-down; + }; + cs { + function = "gpio"; + pins = "gpio55"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp2_spi10_sleep: blsp2-spi10-sleep { + pins = "gpio53", "gpio54", "gpio55"; + drive-strength = <2>; + bias-disable; + }; + + i2c11_default: i2c11-default { + function = "blsp_i2c11"; + pins = "gpio83", "gpio84"; + drive-strength = <2>; + bias-disable; + }; + + i2c11_sleep: i2c11-sleep { + function = "gpio"; + pins = "gpio83", "gpio84"; + drive-strength = <2>; + bias-disable; + }; + + blsp1_spi1_default: blsp1-spi1-default { default { function = "blsp_spi1"; pins = "gpio0", "gpio1", "gpio3"; @@ -810,7 +913,7 @@ cs { }; }; - blsp1_spi0_sleep: blsp1-spi0-sleep { + blsp1_spi1_sleep: blsp1-spi1-sleep { pins = "gpio0", "gpio1", "gpio3"; drive-strength = <2>; bias-disable; From patchwork Sun Jan 31 01:38:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 374097 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47DF4C43331 for ; Sun, 31 Jan 2021 01:40:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 121F864E28 for ; Sun, 31 Jan 2021 01:40:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232466AbhAaBkN (ORCPT ); Sat, 30 Jan 2021 20:40:13 -0500 Received: from relay02.th.seeweb.it ([5.144.164.163]:38593 "EHLO relay02.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230168AbhAaBkJ (ORCPT ); Sat, 30 Jan 2021 20:40:09 -0500 Received: from localhost.localdomain (abaf219.neoplus.adsl.tpnet.pl [83.6.169.219]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 8C05B1F6D5; Sun, 31 Jan 2021 02:39:24 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gustave Monce Subject: [PATCH 04/18] arm64: dts: qcom: msm8992: Make the DT an overlay on top of 8994 Date: Sun, 31 Jan 2021 02:38:35 +0100 Message-Id: <20210131013853.55810-5-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210131013853.55810-1-konrad.dybcio@somainline.org> References: <20210131013853.55810-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This saves a good thousand lines of code, perhaps even more in the long run. Co-authored-by: Gustave Monce Signed-off-by: Konrad Dybcio --- .../dts/qcom/msm8992-bullhead-rev-101.dts | 2 +- .../boot/dts/qcom/msm8992-xiaomi-libra.dts | 39 +- arch/arm64/boot/dts/qcom/msm8992.dtsi | 772 +----------------- arch/arm64/boot/dts/qcom/msm8994.dtsi | 6 +- 4 files changed, 36 insertions(+), 783 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts b/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts index cacbfdbd69e3..23cdcc9f7c72 100644 --- a/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts +++ b/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts @@ -283,7 +283,7 @@ pmi8994_regulators: pmi8994-regulators { }; }; -&sdhc_1 { +&sdhc1 { status = "okay"; mmc-hs400-1_8v; diff --git a/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts b/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts index 5dab8ee0c7d3..357d55496e75 100644 --- a/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts +++ b/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts @@ -70,21 +70,6 @@ ramoops@dfc00000 { pmsg-size = <0x20000>; }; - continuous_splash: framebuffer@3401000{ - reg = <0x0 0x3401000 0x0 0x2200000>; - no-map; - }; - - dfps_data_mem: dfps_data_mem@3400000 { - reg = <0x0 0x3400000 0x0 0x1000>; - no-map; - }; - - peripheral_region: peripheral_region@7400000 { - reg = <0x0 0x7400000 0x0 0x1c00000>; - no-map; - }; - modem_region: modem_region@9000000 { reg = <0x0 0x9000000 0x0 0x5a00000>; no-map; @@ -97,43 +82,49 @@ tzapp: modem_region@ea00000 { }; }; -&blsp_i2c2 { +&blsp1_i2c2 { status = "okay"; /* Atmel or Synaptics touchscreen */ }; -&blsp_i2c5 { +&blsp1_i2c5 { status = "okay"; - /* Silabs si4705 FM transmitter */ + /* ST lsm6db0 gyro/accelerometer */ }; -&blsp_i2c6 { +&blsp1_i2c6 { status = "okay"; - /* NCI NFC, + /* + * NXP NCI NFC, * TI USB320 Type-C controller, * Pericom 30216a USB (de)mux switch */ }; -&blsp_i2c7 { +&blsp2_i2c1 { status = "okay"; /* cm36686 proximity and ambient light sensor */ }; -&blsp_i2c13 { +&blsp2_i2c5 { status = "okay"; - /* ST lsm6db0 gyro/accelerometer */ + /* Silabs si4705 FM transmitter */ }; &blsp2_uart2 { status = "okay"; }; +&peripheral_region { + reg = <0x0 0x7400000 0x0 0x1c00000>; + no-map; +}; + &rpm_requests { pm8994-regulators { compatible = "qcom,rpm-pm8994-regulators"; @@ -364,7 +355,7 @@ pmi8994_bby: boost-bypass { }; }; -&sdhc_1 { +&sdhc1 { status = "okay"; mmc-hs400-1_8v; diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi index b2046497dcaa..58fe58cc7703 100644 --- a/arch/arm64/boot/dts/qcom/msm8992.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi @@ -2,767 +2,29 @@ /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. */ -#include -#include -#include +#include "msm8994.dtsi" -/ { - interrupt-parent = <&intc>; +/* 8992 only features 2 A57 cores. */ +/delete-node/ &CPU6; +/delete-node/ &CPU7; +/delete-node/ &cpu6_map; +/delete-node/ &cpu7_map; - #address-cells = <2>; - #size-cells = <2>; - - chosen { }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - CPU0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x0>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - L2_0: l2-cache { - compatible = "cache"; - cache-level = <2>; - }; - }; - - CPU1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x1>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - }; - - CPU2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x2>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - }; - - CPU3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x3>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - }; - - CPU4: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x100>; - next-level-cache = <&L2_1>; - enable-method = "psci"; - L2_1: l2-cache { - compatible = "cache"; - cache-level = <2>; - }; - }; - - CPU5: cpu@101 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x101>; - next-level-cache = <&L2_1>; - enable-method = "psci"; - }; - - cpu-map { - cluster0 { - core0 { - cpu = <&CPU0>; - }; - - core1 { - cpu = <&CPU1>; - }; - - core2 { - cpu = <&CPU2>; - }; - - core3 { - cpu = <&CPU3>; - }; - }; - - cluster1 { - core0 { - cpu = <&CPU4>; - }; - - core1 { - cpu = <&CPU5>; - }; - }; - }; - }; - - clocks { - xo_board: xo_board { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <19200000>; - }; - - sleep_clk: sleep_clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - }; - }; - - firmware { - scm { - compatible = "qcom,scm-msm8994", "qcom,scm"; - }; - }; - - memory { - device_type = "memory"; - /* We expect the bootloader to fill in the reg */ - reg = <0 0 0 0>; - }; - - pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = ; - }; - - psci { - compatible = "arm,psci-0.2"; - method = "hvc"; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - smem_region: smem@6a00000 { - reg = <0x0 0x6a00000 0x0 0x200000>; - no-map; - }; - }; - - sfpb_mutex: hwmutex { - compatible = "qcom,sfpb-mutex"; - syscon = <&sfpb_mutex_regs 0x0 0x100>; - #hwlock-cells = <1>; - }; - - smem { - compatible = "qcom,smem"; - memory-region = <&smem_region>; - qcom,rpm-msg-ram = <&rpm_msg_ram>; - hwlocks = <&sfpb_mutex 3>; - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0 0xffffffff>; - compatible = "simple-bus"; - - intc: interrupt-controller@f9000000 { - compatible = "qcom,msm-qgic2"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0xf9000000 0x1000>, - <0xf9002000 0x1000>; - }; - - apcs: mailbox@f900d000 { - compatible = "qcom,msm8994-apcs-kpss-global", "syscon"; - reg = <0xf900d000 0x2000>; - #mbox-cells = <1>; - }; - - timer@f9020000 { - #address-cells = <1>; - #size-cells = <1>; - ranges; - compatible = "arm,armv7-timer-mem"; - reg = <0xf9020000 0x1000>; - - frame@f9021000 { - frame-number = <0>; - interrupts = , - ; - reg = <0xf9021000 0x1000>, - <0xf9022000 0x1000>; - }; - - frame@f9023000 { - frame-number = <1>; - interrupts = ; - reg = <0xf9023000 0x1000>; - status = "disabled"; - }; - - frame@f9024000 { - frame-number = <2>; - interrupts = ; - reg = <0xf9024000 0x1000>; - status = "disabled"; - }; - - frame@f9025000 { - frame-number = <3>; - interrupts = ; - reg = <0xf9025000 0x1000>; - status = "disabled"; - }; - - frame@f9026000 { - frame-number = <4>; - interrupts = ; - reg = <0xf9026000 0x1000>; - status = "disabled"; - }; - - frame@f9027000 { - frame-number = <5>; - interrupts = ; - reg = <0xf9027000 0x1000>; - status = "disabled"; - }; - - frame@f9028000 { - frame-number = <6>; - interrupts = ; - reg = <0xf9028000 0x1000>; - status = "disabled"; - }; - }; - - usb3: usb@f92f8800 { - compatible = "qcom,msm8996-dwc3", "qcom,dwc3"; - reg = <0xf92f8800 0x400>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - clocks = <&gcc GCC_USB30_MASTER_CLK>, - <&gcc GCC_SYS_NOC_USB3_AXI_CLK>, - <&gcc GCC_USB30_SLEEP_CLK>, - <&gcc GCC_USB30_MOCK_UTMI_CLK>; - clock-names = "core", "iface", "sleep", "mock_utmi", "ref", "xo"; - - assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_MASTER_CLK>; - assigned-clock-rates = <19200000>, <120000000>; - - power-domains = <&gcc USB30_GDSC>; - qcom,select-utmi-as-pipe-clk; - - dwc3@f9200000 { - compatible = "snps,dwc3"; - reg = <0xf9200000 0xcc00>; - interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>; - snps,dis_u2_susphy_quirk; - snps,dis_enblslpm_quirk; - maximum-speed = "high-speed"; - dr_mode = "peripheral"; - }; - }; - - sdhc_1: sdhci@f9824900 { - compatible = "qcom,sdhci-msm-v4"; - reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>; - reg-names = "hc_mem", "core_mem"; - - interrupts = , - ; - interrupt-names = "hc_irq", "pwr_irq"; - - clocks = <&gcc GCC_SDCC1_APPS_CLK>, - <&gcc GCC_SDCC1_AHB_CLK>, - <&xo_board>; - clock-names = "core", "iface", "xo"; - - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on - &sdc1_rclk_on>; - pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off - &sdc1_rclk_off>; - - regulator-always-on; - bus-width = <8>; - non-removable; - - status = "disabled"; - }; - - sdhc_2: sdhci@f98a4900 { - compatible = "qcom,sdhci-msm-v4"; - reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; - reg-names = "hc_mem", "core_mem"; - - interrupts = , - ; - interrupt-names = "hc_irq", "pwr_irq"; - - clocks = <&gcc GCC_SDCC2_APPS_CLK>, - <&gcc GCC_SDCC2_AHB_CLK>, - <&xo_board>; - clock-names = "core", "iface", "xo"; - - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>; - pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>; - - cd-gpios = <&tlmm 100 0>; - bus-width = <4>; - status = "disabled"; - }; - - blsp1_uart2: serial@f991e000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0xf991e000 0x1000>; - interrupts = ; - clock-names = "core", "iface"; - clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp1_uart2_default>; - pinctrl-1 = <&blsp1_uart2_sleep>; - status = "disabled"; - }; - - blsp_i2c1: i2c@f9923000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0xf9923000 0x500>; - interrupts = ; - clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>; - clock-names = "iface", "core"; - clock-frequency = <400000>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&i2c1_default>; - pinctrl-1 = <&i2c1_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp_i2c2: i2c@f9924000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0xf9924000 0x500>; - interrupts = ; - clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; - clock-names = "iface", "core"; - clock-frequency = <400000>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&i2c2_default>; - pinctrl-1 = <&i2c2_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - /* Somebody was very creative with their numbering scheme downstream... */ - - blsp_i2c13: i2c@f9927000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0xf9927000 0x500>; - interrupts = ; - clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>; - clock-names = "iface", "core"; - clock-frequency = <400000>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&i2c13_default>; - pinctrl-1 = <&i2c13_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp_i2c6: i2c@f9928000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0xf9928000 0x500>; - interrupts = ; - clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>; - clock-names = "iface", "core"; - clock-frequency = <400000>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&i2c6_default>; - pinctrl-1 = <&i2c6_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp2_uart2: serial@f995e000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0xf995e000 0x1000>; - interrupts = ; - clock-names = "core", "iface"; - clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, - <&gcc GCC_BLSP2_AHB_CLK>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp2_uart2_default>; - pinctrl-1 = <&blsp2_uart2_sleep>; - status = "disabled"; - }; - - blsp_i2c7: i2c@f9963000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0xf9963000 0x500>; - interrupts = ; - clocks = <&gcc GCC_BLSP2_AHB_CLK>, - <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>; - clock-names = "iface", "core"; - clock-frequency = <400000>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&i2c7_default>; - pinctrl-1 = <&i2c7_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp_i2c5: i2c@f9967000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0xf9967000 0x500>; - interrupts = ; - clocks = <&gcc GCC_BLSP2_AHB_CLK>, - <&gcc GCC_BLSP2_QUP5_I2C_APPS_CLK>; - clock-names = "iface", "core"; - clock-frequency = <100000>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&i2c5_default>; - pinctrl-1 = <&i2c5_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - gcc: clock-controller@fc400000 { - compatible = "qcom,gcc-msm8994"; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - reg = <0xfc400000 0x2000>; - }; - - rpm_msg_ram: memory@fc428000 { - compatible = "qcom,rpm-msg-ram"; - reg = <0xfc428000 0x4000>; - }; - - restart@fc4ab000 { - compatible = "qcom,pshold"; - reg = <0xfc4ab000 0x4>; - }; - - spmi_bus: spmi@fc4c0000 { - compatible = "qcom,spmi-pmic-arb"; - reg = <0xfc4cf000 0x1000>, - <0xfc4cb000 0x1000>, - <0xfc4ca000 0x1000>; - reg-names = "core", "intr", "cnfg"; - interrupt-names = "periph_irq"; - interrupts = ; - qcom,ee = <0>; - qcom,channel = <0>; - #address-cells = <2>; - #size-cells = <0>; - interrupt-controller; - #interrupt-cells = <4>; - }; - - sfpb_mutex_regs: syscon@fd484000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "syscon"; - reg = <0xfd484000 0x400>; - }; - - tlmm: pinctrl@fd510000 { - compatible = "qcom,msm8994-pinctrl"; - reg = <0xfd510000 0x4000>; - interrupts = ; - gpio-controller; - gpio-ranges = <&tlmm 0 0 146>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - - blsp1_uart2_default: blsp1-uart2-default { - function = "blsp_uart2"; - pins = "gpio4", "gpio5"; - drive-strength = <16>; - bias-disable; - }; - - blsp1_uart2_sleep: blsp1-uart2-sleep { - function = "gpio"; - pins = "gpio4", "gpio5"; - drive-strength = <2>; - bias-pull-down; - }; - - blsp2_uart2_default: blsp2-uart2-default { - function = "blsp_uart8"; - pins = "gpio45", "gpio46", "gpio47", "gpio48"; - drive-strength = <16>; - bias-disable; - }; - - blsp2_uart2_sleep: blsp2-uart2-sleep { - function = "gpio"; - pins = "gpio45", "gpio46", "gpio47", "gpio48"; - drive-strength = <2>; - bias-pull-down; - }; - - sdc1_clk_on: clk-on { - pins = "sdc1_clk"; - bias-disable; - drive-strength = <6>; - }; - - sdc1_clk_off: clk-off { - pins = "sdc1_clk"; - bias-disable; - drive-strength = <2>; - }; - - sdc1_cmd_on: cmd-on { - pins = "sdc1_cmd"; - bias-pull-up; - drive-strength = <6>; - }; - - sdc1_cmd_off: cmd-off { - pins = "sdc1_cmd"; - bias-pull-up; - drive-strength = <2>; - }; - - sdc1_data_on: data-on { - pins = "sdc1_data"; - bias-pull-up; - drive-strength = <6>; - }; - - sdc1_data_off: data-off { - pins = "sdc1_data"; - bias-pull-up; - drive-strength = <2>; - }; - - sdc1_rclk_on: rclk-on { - pins = "sdc1_rclk"; - bias-pull-down; - }; - - sdc1_rclk_off: rclk-off { - pins = "sdc1_rclk"; - bias-pull-down; - }; - - i2c1_default: i2c1-default { - function = "blsp_i2c1"; - pins = "gpio2", "gpio3"; - drive-strength = <2>; - bias-disable; - }; - - i2c1_sleep: i2c1-sleep { - function = "gpio"; - pins = "gpio2", "gpio3"; - drive-strength = <2>; - bias-disable; - }; - - i2c2_default: i2c2-default { - function = "blsp_i2c2"; - pins = "gpio6", "gpio7"; - drive-strength = <2>; - bias-disable; - }; - - i2c2_sleep: i2c2-sleep { - function = "gpio"; - pins = "gpio6", "gpio7"; - drive-strength = <2>; - bias-disable; - }; - - i2c5_default: i2c5-default { - /* Don't be fooled! Nobody knows the reason why though... */ - function = "blsp_i2c11"; - pins = "gpio83", "gpio84"; - drive-strength = <2>; - bias-disable; - }; - - i2c5_sleep: i2c5-sleep { - function = "gpio"; - pins = "gpio83", "gpio84"; - drive-strength = <2>; - bias-disable; - }; - - i2c6_default: i2c6-default { - function = "blsp_i2c6"; - pins = "gpio28", "gpio27"; - drive-strength = <2>; - bias-disable; - }; - - i2c6_sleep: i2c6-sleep { - function = "gpio"; - pins = "gpio28", "gpio27"; - drive-strength = <2>; - bias-disable; - }; - - i2c7_default: i2c7-default { - function = "blsp_i2c7"; - pins = "gpio43", "gpio44"; - drive-strength = <2>; - bias-disable; - }; - - i2c7_sleep: i2c7-sleep { - function = "gpio"; - pins = "gpio43", "gpio44"; - drive-strength = <2>; - bias-disable; - }; - - i2c13_default: i2c13-default { - /* Not a typo either. */ - function = "blsp_i2c5"; - pins = "gpio23", "gpio24"; - drive-strength = <2>; - bias-disable; - }; - - i2c13_sleep: i2c13-sleep { - function = "gpio"; - pins = "gpio23", "gpio24"; - drive-strength = <2>; - bias-disable; - }; - - sdc2_clk_on: sdc2-clk-on { - pins = "sdc2_clk"; - bias-disable; - drive-strength = <16>; - }; - - sdc2_clk_off: sdc2-clk-off { - pins = "sdc2_clk"; - bias-disable; - drive-strength = <2>; - }; - - sdc2_cmd_on: sdc2-cmd-on { - pins = "sdc2_cmd"; - bias-pull-up; - drive-strength = <10>; - }; - - sdc2_cmd_off: sdc2-cmd-off { - pins = "sdc2_cmd"; - bias-pull-up; - drive-strength = <2>; - }; - - sdc2_data_on: sdc2-data-on { - pins = "sdc2_data"; - bias-pull-up; - drive-strength = <10>; - }; - - sdc2_data_off: sdc2-data-off { - pins = "sdc2_data"; - bias-pull-up; - drive-strength = <2>; - }; - }; - }; - - smd_rpm: smd { - compatible = "qcom,smd"; - rpm { - interrupts = ; - qcom,ipc = <&apcs 8 0>; - qcom,smd-edge = <15>; - qcom,local-pid = <0>; - qcom,remote-pid = <6>; - - rpm_requests: rpm-requests { - compatible = "qcom,rpm-msm8994"; - qcom,smd-channels = "rpm_requests"; - - rpmcc: rpmcc { - compatible = "qcom,rpmcc-msm8992"; - #clock-cells = <1>; - }; - - rpmpd: power-controller { - compatible = "qcom,msm8994-rpmpd"; - #power-domain-cells = <1>; - operating-points-v2 = <&rpmpd_opp_table>; - - rpmpd_opp_table: opp-table { - compatible = "operating-points-v2"; +&rpmcc { + compatible = "qcom,rpmcc-msm8992"; +}; - rpmpd_opp_ret: opp1 { - opp-level = <1>; - }; - rpmpd_opp_svs_krait: opp2 { - opp-level = <2>; - }; - rpmpd_opp_svs_soc: opp3 { - opp-level = <3>; - }; - rpmpd_opp_nom: opp4 { - opp-level = <4>; - }; - rpmpd_opp_turbo: opp5 { - opp-level = <5>; - }; - rpmpd_opp_super_turbo: opp6 { - opp-level = <6>; - }; - }; - }; - }; - }; - }; +&tcsr_mutex { + compatible = "qcom,sfpb-mutex"; +}; - timer { - compatible = "arm,armv8-timer"; - interrupts = , +&timer { + interrupts = , , , ; - }; - - vph_pwr: vph-pwr-regulator { - compatible = "regulator-fixed"; - regulator-name = "vph_pwr"; - - regulator-min-microvolt = <3600000>; - regulator-max-microvolt = <3600000>; - - regulator-always-on; - }; }; +&tlmm { + compatible = "qcom,msm8992-pinctrl"; +}; diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index 60e04514af70..f49d442d2edf 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -132,11 +132,11 @@ core1 { cpu = <&CPU5>; }; - core2 { + cpu6_map: core2 { cpu = <&CPU6>; }; - core3 { + cpu7_map: core3 { cpu = <&CPU7>; }; }; @@ -1009,7 +1009,7 @@ sdc2_data_off: sdc2-data-off { }; }; - timer { + timer: timer { compatible = "arm,armv8-timer"; interrupts = , , From patchwork Sun Jan 31 01:38:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 374098 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43CE5C4332B for ; Sun, 31 Jan 2021 01:40:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2DCA764E2D for ; Sun, 31 Jan 2021 01:40:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230168AbhAaBkN (ORCPT ); Sat, 30 Jan 2021 20:40:13 -0500 Received: from m-r1.th.seeweb.it ([5.144.164.170]:43867 "EHLO m-r1.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232412AbhAaBkM (ORCPT ); Sat, 30 Jan 2021 20:40:12 -0500 Received: from localhost.localdomain (abaf219.neoplus.adsl.tpnet.pl [83.6.169.219]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 098D31F6DE; Sun, 31 Jan 2021 02:39:28 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gustave Monce Subject: [PATCH 05/18] arm64: dts: qcom: msm8992/4-lumia*: Create a common DTS Date: Sun, 31 Jan 2021 02:38:36 +0100 Message-Id: <20210131013853.55810-6-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210131013853.55810-1-konrad.dybcio@somainline.org> References: <20210131013853.55810-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Gustave Monce Lumia 950 and 950XL are both based on the Octagon board, sharing the vast majority of components, configuration etc. Commonize it. Signed-off-by: Gustave Monce Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/Makefile | 4 +- .../msm8992-msft-lumia-octagon-talkman.dts | 15 +++++ .../dts/qcom/msm8992-msft-lumia-talkman.dts | 67 ------------------- .../msm8994-msft-lumia-octagon-cityman.dts | 15 +++++ ...an.dts => msm8994-msft-lumia-octagon.dtsi} | 14 ++-- 5 files changed, 38 insertions(+), 77 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/msm8992-msft-lumia-octagon-talkman.dts delete mode 100644 arch/arm64/boot/dts/qcom/msm8992-msft-lumia-talkman.dts create mode 100644 arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dts rename arch/arm64/boot/dts/qcom/{msm8994-msft-lumia-cityman.dts => msm8994-msft-lumia-octagon.dtsi} (83%) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 6e784c7b0621..ff47d8c365ad 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -10,10 +10,10 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-a3u-eur.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-a5u-eur.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8992-bullhead-rev-101.dtb -dtb-$(CONFIG_ARCH_QCOM) += msm8992-msft-lumia-talkman.dtb +dtb-$(CONFIG_ARCH_QCOM) += msm8992-msft-lumia-octagon-talkman.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8992-xiaomi-libra.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8994-angler-rev-101.dtb -dtb-$(CONFIG_ARCH_QCOM) += msm8994-msft-lumia-cityman.dtb +dtb-$(CONFIG_ARCH_QCOM) += msm8994-msft-lumia-octagon-cityman.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8994-sony-xperia-kitakami-ivy.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8994-sony-xperia-kitakami-karin.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8994-sony-xperia-kitakami-satsuki.dtb diff --git a/arch/arm64/boot/dts/qcom/msm8992-msft-lumia-octagon-talkman.dts b/arch/arm64/boot/dts/qcom/msm8992-msft-lumia-octagon-talkman.dts new file mode 100644 index 000000000000..ad8cf5bfa4e1 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8992-msft-lumia-octagon-talkman.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2020, Konrad Dybcio + * Copyright (c) 2020, Gustave Monce + */ + +/dts-v1/; + +#include "msm8992.dtsi" +#include "msm8994-msft-lumia-octagon.dtsi" + +/ { + model = "Microsoft Lumia 950"; + compatible = "microsoft,talkman", "qcom,msm8992"; +}; diff --git a/arch/arm64/boot/dts/qcom/msm8992-msft-lumia-talkman.dts b/arch/arm64/boot/dts/qcom/msm8992-msft-lumia-talkman.dts deleted file mode 100644 index c337a86a5c77..000000000000 --- a/arch/arm64/boot/dts/qcom/msm8992-msft-lumia-talkman.dts +++ /dev/null @@ -1,67 +0,0 @@ -// SPDX-License-Identifier: BSD-3-Clause -/* - * Copyright (c) 2020, Konrad Dybcio - */ - -/dts-v1/; - -#include "msm8992.dtsi" -#include "pm8994.dtsi" -#include "pmi8994.dtsi" -#include -#include - -/ { - model = "Microsoft Lumia 950"; - compatible = "microsoft,talkman", "qcom,msm8992"; - - /* Most Lumia 950 users use GRUB to load their kernels, - * hence there is no need for msm-id and friends. - */ - - /* This enables graphical output via bootloader-enabled display. - * acpi=no is required due to WP platforms having ACPI support, but - * only for Windows-based OSes. - */ - chosen { - bootargs = "earlycon=efifb console=efifb acpi=no"; - - #address-cells = <2>; - #size-cells = <2>; - ranges; - }; -}; - -&blsp_i2c1 { - status = "okay"; - - rmi4-i2c-dev@4b { - compatible = "syna,rmi4-i2c"; - reg = <0x4b>; - #address-cells = <1>; - #size-cells = <0>; - - interrupt-parent = <&tlmm>; - interrupts = <77 IRQ_TYPE_EDGE_FALLING>; - - rmi4-f01@1 { - reg = <0x01>; - syna,nosleep-mode = <1>; - }; - - rmi4-f12@12 { - reg = <0x12>; - syna,sensor-type = <1>; - syna,clip-x-low = <0>; - syna,clip-x-high = <1440>; - syna,clip-y-low = <0>; - syna,clip-y-high = <2560>; - }; - }; -}; - -&sdhc_1 { - status = "okay"; - - mmc-hs200-1_8v; -}; diff --git a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dts b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dts new file mode 100644 index 000000000000..33eb46f88ce8 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2020, Konrad Dybcio + * Copyright (c) 2020, Gustave Monce + */ + +/dts-v1/; + +#include "msm8994.dtsi" +#include "msm8994-msft-lumia-octagon.dtsi" + +/ { + model = "Microsoft Lumia 950 XL"; + compatible = "microsoft,cityman", "qcom,msm8994"; +}; diff --git a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-cityman.dts b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi similarity index 83% rename from arch/arm64/boot/dts/qcom/msm8994-msft-lumia-cityman.dts rename to arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi index 2d989a70e0b5..b9e3e7821cbc 100644 --- a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-cityman.dts +++ b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi @@ -1,20 +1,18 @@ // SPDX-License-Identifier: BSD-3-Clause /* + * Common Board Device Tree for + * Microsoft Mobile MSM8994 Octagon Platforms + * * Copyright (c) 2020, Konrad Dybcio + * Copyright (c) 2020, Gustave Monce */ -/dts-v1/; - -#include "msm8994.dtsi" #include "pm8994.dtsi" #include "pmi8994.dtsi" / { - model = "Microsoft Lumia 950 XL"; - compatible = "microsoft,cityman", "qcom,msm8994"; - /* - * Most Lumia 950XL users use GRUB to load their kernels, + * Most Lumia 950/XL users use GRUB to load their kernels, * hence there is no need for msm-id and friends. */ @@ -55,7 +53,7 @@ rmi4-f12@12 { syna,clip-x-low = <0>; syna,clip-x-high = <1440>; syna,clip-y-low = <0>; - syna,clip-y-high = <2660>; + syna,clip-y-high = <2560>; }; }; }; From patchwork Sun Jan 31 01:38:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 374091 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A3078C433E0 for ; Sun, 31 Jan 2021 01:44:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7DB3664E18 for ; Sun, 31 Jan 2021 01:44:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232691AbhAaBob (ORCPT ); Sat, 30 Jan 2021 20:44:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39684 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232628AbhAaBkj (ORCPT ); Sat, 30 Jan 2021 20:40:39 -0500 Received: from relay04.th.seeweb.it (relay04.th.seeweb.it [IPv6:2001:4b7a:2000:18::165]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C01BDC0617A7 for ; Sat, 30 Jan 2021 17:39:53 -0800 (PST) Received: from localhost.localdomain (abaf219.neoplus.adsl.tpnet.pl [83.6.169.219]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 4683D1F740; Sun, 31 Jan 2021 02:39:51 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gustave Monce Subject: [PATCH 10/18] arm64: dts: qcom: msm8994-octagon: Configure HD3SS460 Type-C mux pins Date: Sun, 31 Jan 2021 02:38:41 +0100 Message-Id: <20210131013853.55810-11-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210131013853.55810-1-konrad.dybcio@somainline.org> References: <20210131013853.55810-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Gustave Monce The driver is not available yet, so hardcode the pins. Signed-off-by: Gustave Monce Signed-off-by: Konrad Dybcio --- .../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi index 78443f5a3881..bf6e63a23600 100644 --- a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi @@ -337,6 +337,37 @@ pinconf { }; }; +&pmi8994_gpios { + pinctrl-0 = <&hd3ss460_pol &hd3ss460_amsel &hd3ss460_en>; + pinctrl-names = "default"; + + /* + * This device uses a TI HD3SS460 Type-C MUX + * As this device has no driver currently, + * the configuration for USB Face Up is set-up here. + * + * TODO: remove once a driver is available + * TODO: add VBUS GPIO 5 + */ + hd3ss460_pol: pol_low { + pins = "gpio8"; + drive-strength = <3>; + bias-pull-down; + }; + + hd3ss460_amsel: amsel_high { + pins = "gpio9"; + drive-strength = <1>; + bias-pull-up; + }; + + hd3ss460_en: en_high { + pins = "gpio10"; + drive-strength = <1>; + bias-pull-up; + }; +}; + &pmi8994_spmi_regulators { vdd_gfx: s2@1700 { reg = <0x1700 0x100>; From patchwork Sun Jan 31 01:38:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 374092 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89484C433E0 for ; Sun, 31 Jan 2021 01:44:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4BE6764E11 for ; Sun, 31 Jan 2021 01:44:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232875AbhAaBnj (ORCPT ); Sat, 30 Jan 2021 20:43:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39670 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232527AbhAaBlO (ORCPT ); Sat, 30 Jan 2021 20:41:14 -0500 Received: from relay02.th.seeweb.it (relay02.th.seeweb.it [IPv6:2001:4b7a:2000:18::163]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E64CDC0613ED; Sat, 30 Jan 2021 17:40:12 -0800 (PST) Received: from localhost.localdomain (abaf219.neoplus.adsl.tpnet.pl [83.6.169.219]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id B48CB1F888; Sun, 31 Jan 2021 02:40:04 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gustave Monce Subject: [PATCH 13/18] arm64: dts: qcom: msm8994-octagon: Configure PON keys Date: Sun, 31 Jan 2021 02:38:44 +0100 Message-Id: <20210131013853.55810-14-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210131013853.55810-1-konrad.dybcio@somainline.org> References: <20210131013853.55810-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Gustave Monce Both the power key and the vol- key are connected over PON. Configure them. Signed-off-by: Gustave Monce Signed-off-by: Konrad Dybcio --- .../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 16 ++++++++++++++++ arch/arm64/boot/dts/qcom/pm8994.dtsi | 2 +- 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi index 73af5265df9b..097f8f6701e3 100644 --- a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi @@ -358,6 +358,22 @@ pinconf { }; }; +&pm8994_pon { + pwrkey { + compatible = "qcom,pm8941-pwrkey"; + interrupts = <0 8 0 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + linux,code = ; + }; + + volwnkey { + compatible = "qcom,pm8941-resin"; + interrupts = <0 8 1 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + linux,code = ; + }; +}; + &pmi8994_gpios { pinctrl-0 = <&hd3ss460_pol &hd3ss460_amsel &hd3ss460_en>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/qcom/pm8994.dtsi b/arch/arm64/boot/dts/qcom/pm8994.dtsi index 5ffdf37d8e31..7f7ece49bdd3 100644 --- a/arch/arm64/boot/dts/qcom/pm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8994.dtsi @@ -43,7 +43,7 @@ rtc@6000 { interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; }; - pon@800 { + pm8994_pon: pon@800 { compatible = "qcom,pm8916-pon"; reg = <0x800>; From patchwork Sun Jan 31 01:38:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 374095 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93FE7C433E6 for ; Sun, 31 Jan 2021 01:41:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6A5C464E1E for ; Sun, 31 Jan 2021 01:41:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232661AbhAaBlH (ORCPT ); Sat, 30 Jan 2021 20:41:07 -0500 Received: from relay03.th.seeweb.it ([5.144.164.164]:53799 "EHLO relay03.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232679AbhAaBlB (ORCPT ); Sat, 30 Jan 2021 20:41:01 -0500 Received: from localhost.localdomain (abaf219.neoplus.adsl.tpnet.pl [83.6.169.219]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id A03F91F519; Sun, 31 Jan 2021 02:40:13 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gustave Monce Subject: [PATCH 15/18] arm64: dts: qcom: msm8994-octagon: Add NXP NFC node Date: Sun, 31 Jan 2021 02:38:46 +0100 Message-Id: <20210131013853.55810-16-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210131013853.55810-1-konrad.dybcio@somainline.org> References: <20210131013853.55810-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Gustave Monce Octagon devices use PN544 connected over I2C. Configure it. Signed-off-by: Gustave Monce Signed-off-by: Konrad Dybcio --- .../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi index 80e4ed48a1e3..e01c9dce187c 100644 --- a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi @@ -300,6 +300,22 @@ rmi4-f12@12 { }; }; +&blsp1_i2c6 { + status = "okay"; + + pn547: pn547@28 { + compatible = "nxp,pn544-i2c"; + + reg = <0x28>; + + interrupt-parent = <&tlmm>; + interrupts = <29 IRQ_TYPE_EDGE_RISING>; + + enable-gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>; + firmware-gpios = <&tlmm 94 GPIO_ACTIVE_HIGH>; + }; +}; + &blsp1_uart2 { status = "okay"; }; From patchwork Sun Jan 31 01:38:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 374093 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB78AC433DB for ; Sun, 31 Jan 2021 01:43:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A3FE964E11 for ; Sun, 31 Jan 2021 01:43:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232310AbhAaBlQ (ORCPT ); Sat, 30 Jan 2021 20:41:16 -0500 Received: from relay03.th.seeweb.it ([5.144.164.164]:40145 "EHLO relay03.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232705AbhAaBlN (ORCPT ); Sat, 30 Jan 2021 20:41:13 -0500 Received: from localhost.localdomain (abaf219.neoplus.adsl.tpnet.pl [83.6.169.219]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 28B761F6C5; Sun, 31 Jan 2021 02:40:18 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gustave Monce Subject: [PATCH 16/18] arm64: dts: qcom: msm8994-octagon: Add sensors on blsp1_i2c5 Date: Sun, 31 Jan 2021 02:38:47 +0100 Message-Id: <20210131013853.55810-17-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210131013853.55810-1-konrad.dybcio@somainline.org> References: <20210131013853.55810-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Gustave Monce Add AK09912 magnetometer, ZPA2326 barometer and MPU6500 accelerometer nodes. Signed-off-by: Gustave Monce Signed-off-by: Konrad Dybcio --- .../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi index e01c9dce187c..4aa33682f975 100644 --- a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi @@ -300,6 +300,42 @@ rmi4-f12@12 { }; }; +&blsp1_i2c5 { + status = "okay"; + + ak09912: magnetometer@c { + compatible = "asahi-kasei,ak09912"; + reg = <0xc>; + + interrupt-parent = <&tlmm>; + interrupts = <26 IRQ_TYPE_EDGE_RISING>; + + vdd-supply = <&vreg_l18a_2p85>; + vid-supply = <&vreg_lvs2a_1p8>; + }; + + zpa2326: barometer@5c { + compatible = "murata,zpa2326"; + reg = <0x5c>; + + interrupt-parent = <&tlmm>; + interrupts = <74 IRQ_TYPE_EDGE_RISING>; + + vdd-supply = <&vreg_lvs2a_1p8>; + }; + + mpu6050: accelerometer@68 { + compatible = "invensense,mpu6500"; + reg = <0x68>; + + interrupt-parent = <&tlmm>; + interrupts = <64 IRQ_TYPE_EDGE_RISING>; + + vdd-supply = <&vreg_lvs2a_1p8>; + vddio-supply = <&vreg_lvs2a_1p8>; + }; +}; + &blsp1_i2c6 { status = "okay"; From patchwork Sun Jan 31 01:38:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 374094 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1561C433E0 for ; Sun, 31 Jan 2021 01:41:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A140564E11 for ; Sun, 31 Jan 2021 01:41:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232791AbhAaBlc (ORCPT ); Sat, 30 Jan 2021 20:41:32 -0500 Received: from relay04.th.seeweb.it ([5.144.164.165]:53407 "EHLO relay04.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232771AbhAaBl3 (ORCPT ); Sat, 30 Jan 2021 20:41:29 -0500 Received: from localhost.localdomain (abaf219.neoplus.adsl.tpnet.pl [83.6.169.219]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id A10931F87F; Sun, 31 Jan 2021 02:40:22 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gustave Monce Subject: [PATCH 17/18] arm64: dts: qcom: msm8994-octagon: Add TAS2553 codec Date: Sun, 31 Jan 2021 02:38:48 +0100 Message-Id: <20210131013853.55810-18-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210131013853.55810-1-konrad.dybcio@somainline.org> References: <20210131013853.55810-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Gustave Monce Lumia 950/XL feature a TAS2553 codec. Configure it using the TAS2552 driver. Signed-off-by: Gustave Monce Signed-off-by: Konrad Dybcio --- .../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi index 4aa33682f975..c0aa8cd80f7c 100644 --- a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi @@ -300,6 +300,26 @@ rmi4-f12@12 { }; }; +&blsp1_i2c2 { + status = "okay"; + + /* + * This device uses the Texas Instruments TAS2553, however the TAS2552 driver + * seems to work here. In the future a proper driver might need to + * be written for this device. + */ + tas2553: tas2553@40 { + compatible = "ti,tas2552"; + reg = <0x40>; + + vbat-supply = <&vph_pwr>; + iovdd-supply = <&vreg_s4a_1p8>; + avdd-supply = <&vreg_s4a_1p8>; + + enable-gpio = <&pm8994_gpios 12 GPIO_ACTIVE_HIGH>; + }; +}; + &blsp1_i2c5 { status = "okay";