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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id 35sm3687362wrn.42.2021.02.03.03.54.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Feb 2021 03:54:00 -0800 (PST) From: Bryan O'Donoghue To: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, mturquette@baylibre.com, sboyd@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, agross@kernel.org Cc: bryan.odonoghue@linaro.org, jonathan@marek.ca, dikshita@codeaurora.org, dmitry.baryshkov@linaro.org, stanimir.varbanov@linaro.org Subject: [PATCH 1/4] dt-bindings: clock: Add missing SM8250 videoc clock indices Date: Wed, 3 Feb 2021 11:54:53 +0000 Message-Id: <20210203115456.1072975-2-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210203115456.1072975-1-bryan.odonoghue@linaro.org> References: <20210203115456.1072975-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Two indexes need to be added to videocc-sm8250.h for venus to function properly. Rather than adding the missing indexes when used we add them separately here to keep checkpatch.pl happy. Signed-off-by: Bryan O'Donoghue --- include/dt-bindings/clock/qcom,videocc-sm8250.h | 2 ++ 1 file changed, 2 insertions(+) -- 2.29.2 diff --git a/include/dt-bindings/clock/qcom,videocc-sm8250.h b/include/dt-bindings/clock/qcom,videocc-sm8250.h index 2b2b3867af25..8d321ac3b1fa 100644 --- a/include/dt-bindings/clock/qcom,videocc-sm8250.h +++ b/include/dt-bindings/clock/qcom,videocc-sm8250.h @@ -16,6 +16,8 @@ #define VIDEO_CC_MVS1C_DIV2_DIV_CLK_SRC 6 #define VIDEO_CC_PLL0 7 #define VIDEO_CC_PLL1 8 +#define VIDEO_CC_MVS0_DIV_CLK_SRC 9 +#define VIDEO_CC_MVS0_CLK 10 /* VIDEO_CC resets */ #define VIDEO_CC_CVP_INTERFACE_BCR 0 From patchwork Wed Feb 3 11:54:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 375379 Delivered-To: patch@linaro.org Received: by 2002:a02:b18a:0:0:0:0:0 with SMTP id t10csp262170jah; Wed, 3 Feb 2021 03:55:45 -0800 (PST) X-Google-Smtp-Source: ABdhPJxO5tebuu57Eg/qh+nzAZtfq2ujRyXmxUBfGgPj75UoMPPK96xViODyv1LLdt8AGsWIC21r X-Received: by 2002:aa7:d912:: with SMTP id a18mr2558271edr.73.1612353345375; Wed, 03 Feb 2021 03:55:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612353345; cv=none; d=google.com; s=arc-20160816; b=q3Q9rOmM6KAwxjDhaJJoTiD7OPpXanjIGBta9LRW16+xMDsNGgYti+dNnhQ70TaskY nxf0Ynu88ngTpdaSA2hRFFlU42ojnV/8jU7MSdygAkGC0QNr3aDg6xB5Gs7n0FKs+gKf yGmgpJojynsZkZH3DxyEFXkb59sYby0QmULrkVezhOa7f9vZg4NhFlKpvuvQzFuHbll1 DO5D6e+VeI+7Hb8ccKmbKAaQGdNmQDfQ/QgSvNkuEojBjYA59TvjX4f9wz8vr83yyKEO CZVdIWGSL045r9yOh5wdVmbNN+hNUFx/+Qbz/KNY0Ay7XoH84yTE+IWS/IjRT6yXxuOx L2lg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Jf1oKzKtxHAKQjrR3pGFqCZX0fsUjZbCoIA88THXekk=; b=qnZEQbXYDgfJ+gFkMhpq+K6F3Z4F5U5qMN3mNbjL6NLgwh93FnVBI6PBS6Lmdi+H0O +QSjwrptNB3AJTfGLvSxVL1EA1Cql5YrQMTHg6l1eWZXNJdgI2tKv7nO4x4hJUzKpjOX MMVkEcJmLJi1S7266kMup4S3K8XgBieNSJjP3X5xApq7WOvrKmWLynUtQ37qTnmH5hsi FlRaOdGTfeERnIexAqVGGkNX4hPKFBPbASdJ3HZHr8OMBFC0A0TRKwsc5e3+SEYW920T 3jzQvBGEqDgWGLlspHMm8KK0s2x6RjoY2F9gVZEnBq6n0vK7RfFrvPavAPNWK9ZsuT4+ qlJQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Shk0cV6b; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id 35sm3687362wrn.42.2021.02.03.03.54.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Feb 2021 03:54:02 -0800 (PST) From: Bryan O'Donoghue To: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, mturquette@baylibre.com, sboyd@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, agross@kernel.org Cc: bryan.odonoghue@linaro.org, jonathan@marek.ca, dikshita@codeaurora.org, dmitry.baryshkov@linaro.org, stanimir.varbanov@linaro.org Subject: [PATCH 2/4] clk: qcom: videocc: Add sm8250 VIDEO_CC_MVS0_DIV_CLK_SRC Date: Wed, 3 Feb 2021 11:54:54 +0000 Message-Id: <20210203115456.1072975-3-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210203115456.1072975-1-bryan.odonoghue@linaro.org> References: <20210203115456.1072975-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This patch adds the missing video_cc_mvs0_div_clk_src entry to videocc-sm8250 replicating in upstream the explicit entry for this clock in downstream. Signed-off-by: Bryan O'Donoghue --- drivers/clk/qcom/videocc-sm8250.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- 2.29.2 diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-sm8250.c index 2797c61f5938..cc84963ced40 100644 --- a/drivers/clk/qcom/videocc-sm8250.c +++ b/drivers/clk/qcom/videocc-sm8250.c @@ -169,6 +169,21 @@ static struct clk_regmap_div video_cc_mvs0c_div2_div_clk_src = { }, }; +static struct clk_regmap_div video_cc_mvs0_div_clk_src = { + .reg = 0xd54, + .shift = 0, + .width = 2, + .clkr.hw.init = &(struct clk_init_data) { + .name = "video_cc_mvs0_div_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &video_cc_mvs0_clk_src.clkr.hw, + }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_regmap_div_ro_ops, + }, +}; + static struct clk_regmap_div video_cc_mvs1c_div2_div_clk_src = { .reg = 0xcf4, .shift = 0, @@ -276,6 +291,7 @@ static struct gdsc mvs1_gdsc = { static struct clk_regmap *video_cc_sm8250_clocks[] = { [VIDEO_CC_MVS0_CLK_SRC] = &video_cc_mvs0_clk_src.clkr, + [VIDEO_CC_MVS0_DIV_CLK_SRC] = &video_cc_mvs0_div_clk_src.clkr, [VIDEO_CC_MVS0C_CLK] = &video_cc_mvs0c_clk.clkr, [VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC] = &video_cc_mvs0c_div2_div_clk_src.clkr, [VIDEO_CC_MVS1_CLK_SRC] = &video_cc_mvs1_clk_src.clkr, From patchwork Wed Feb 3 11:54:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 375380 Delivered-To: patch@linaro.org Received: by 2002:a02:b18a:0:0:0:0:0 with SMTP id t10csp262218jah; Wed, 3 Feb 2021 03:55:48 -0800 (PST) X-Google-Smtp-Source: ABdhPJyqz6MXwpVES0S78NawVMbvMf7yD6OyU1lIRjDnNCWLk6q93ZqZFwGtvLscsdajnxPVUB72 X-Received: by 2002:a17:906:fa10:: with SMTP id lo16mr2828813ejb.135.1612353348331; Wed, 03 Feb 2021 03:55:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612353348; cv=none; d=google.com; s=arc-20160816; b=Q1nW83/PK3csDtVNqVVw1Gp0HEo6BiC7otRYdx29r+vzV53v2tF1Oq7PfFfc1Dv8nD DeDArLHCFjA3zueYEG+Acs2y3tDgZ0yDprsbW5Imnld7iVigOco6+fvpxL0PlGT9Ja9b ccY0lf19scvYjje/koYUBHonnTOzHAyP7Vc1yu1luQNUgyfnwdfOUmLSVfh9nC2U90Rw HJLZHx2utrmmesAeZkT4t7Ab4Oz4yK4F6JqXQhcq8bp7cZUV1/A8x/5J7/l8g07SZpzp Al4/hZ7E9eoHvyrRAF5J6NerAXVmi5QaMQr4b/BN9sQMG4CxV5cPczniGnR0l4CK84A4 mzvw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rZoHRe0oO7IftEQfLmg/yx1mkw4FkCtrh+GE++AIrCc=; b=tEIgK3a59Yjf5vq+QdnfyD9e7cQT4udPKycIUHV7Pz6H3FnwLj40NdM+vpsdVqwKHr nxksGWzbiIdg61pUn1VSeADgLS26Zjt4lfCcgjWSUu9uBKhTWnVk03z7jRp79tLUQ4qH LVviMgRgX3IxLDH6u4OlFPfHM6RH80HFhtC4q6XaGK9vGvXDOHUBMgZbPoZXesa9WqhI qIx8/9pGoTn0UhB3BvnKWyhIbYjj3KAtoawkWi3iV3GJYQ2GRVYTWslS3/YuJMm++EIO hbTLYbj56tXCWDgPWlFCm+MFic+dbYBluWRmBDswzL7mMcaWaFlMJuR88z7YAgD6RH4a Ur7A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=u3XAjlYN; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id 35sm3687362wrn.42.2021.02.03.03.54.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Feb 2021 03:54:04 -0800 (PST) From: Bryan O'Donoghue To: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, mturquette@baylibre.com, sboyd@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, agross@kernel.org Cc: bryan.odonoghue@linaro.org, jonathan@marek.ca, dikshita@codeaurora.org, dmitry.baryshkov@linaro.org, stanimir.varbanov@linaro.org Subject: [PATCH 3/4] clk: qcom: videocc: Add sm8250 VIDEO_CC_MVS0_CLK Date: Wed, 3 Feb 2021 11:54:55 +0000 Message-Id: <20210203115456.1072975-4-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210203115456.1072975-1-bryan.odonoghue@linaro.org> References: <20210203115456.1072975-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This patch adds the missing video_cc_mvs0_div_clk entry to videocc-sm8250 replicating in upstream the explicit entry for this clock in downstream. Signed-off-by: Bryan O'Donoghue --- drivers/clk/qcom/videocc-sm8250.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.29.2 diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-sm8250.c index cc84963ced40..3ade240bd49c 100644 --- a/drivers/clk/qcom/videocc-sm8250.c +++ b/drivers/clk/qcom/videocc-sm8250.c @@ -217,6 +217,24 @@ static struct clk_branch video_cc_mvs0c_clk = { }, }; +static struct clk_branch video_cc_mvs0_clk = { + .halt_reg = 0xd34, + .halt_check = BRANCH_HALT_VOTED, + .clkr = { + .enable_reg = 0xd34, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "video_cc_mvs0_clk", + .parent_data = &(const struct clk_parent_data){ + .hw = &video_cc_mvs0_div_clk_src.clkr.hw, + }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_branch video_cc_mvs1_div2_clk = { .halt_reg = 0xdf4, .halt_check = BRANCH_HALT_VOTED, @@ -290,6 +308,7 @@ static struct gdsc mvs1_gdsc = { }; static struct clk_regmap *video_cc_sm8250_clocks[] = { + [VIDEO_CC_MVS0_CLK] = &video_cc_mvs0_clk.clkr, [VIDEO_CC_MVS0_CLK_SRC] = &video_cc_mvs0_clk_src.clkr, [VIDEO_CC_MVS0_DIV_CLK_SRC] = &video_cc_mvs0_div_clk_src.clkr, [VIDEO_CC_MVS0C_CLK] = &video_cc_mvs0c_clk.clkr, From patchwork Wed Feb 3 11:54:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 375381 Delivered-To: patch@linaro.org Received: by 2002:a02:b18a:0:0:0:0:0 with SMTP id t10csp262242jah; Wed, 3 Feb 2021 03:55:50 -0800 (PST) X-Google-Smtp-Source: ABdhPJwkuxwafOSovLtSgrvjPwoJ/GBBttTAvOs1m/CeqXtj0ZJREv2gfnz/k6M2MV5U67/0+aLj X-Received: by 2002:a05:6402:1341:: with SMTP id y1mr2498813edw.273.1612353350301; Wed, 03 Feb 2021 03:55:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612353350; cv=none; d=google.com; s=arc-20160816; b=xrtp7ev+9h1sg1LOQd5HFov8zzBYNV6rX2A6GnRelTF2kFUN/pBBSa8pRJb5pJFcYl nqBlrTyPYzRa9S+FBq+mIZmyTiK2K2mRqtVjsV1XXwm3/OZpxl0M5Qf1Y+iV7um7yuDH 4mVyYao1JtiV2o3qmr2ZmNj0+x0Zkpxr0DmxevHvBrAJMg3C7n1QnOaBXu6/tRQ3Uz6K iSGjx2r4xbFMKnEsh4RIlkBV5POmF3G5uUrDwUoX2XtfnsqLr4T3LLVBXZQTPHJpjvop p9VTgfeEoNqDabn1lg21lGbu3Ngpqbe3RYJZllGm0P1Pbdx2Di8D+tOc6fuvE1ya8GJi 7/TQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=tidbrV96cevG91PVzX2INYeaRwIIrioVPhXX0yu4SxQ=; b=uV5Byo+oYOTbfCPnuRlBV5NbtFz/KkdoDrkn6VWSLyupDWSQxkrxyNGPjb7XZs443G 1VIbahndHG2/J4mVng8bz25/bIk1v7/iIj+XZkKd0sHCoJlGwq5fYZXioj+dSBDLAUV1 YddHAxzx0L9wl2klOvkkC84eEjDSaeKo+cTNBSw89RXyKFLUYwpC4j9MRqb1FSFJUWv1 R/Gv6QXHILd5nGyq8Lm9OWhkpvC90kq+jobmgtK4YesxkAlWKWxj84cLSckGIe56dOS9 HFYeApCQnHvPECOyzGs+UqpUD24ziy7+tokXA9FHpKq3W6jjOyd0cAEDW3mbr2XWMNs/ u54w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xFloSyxo; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id 35sm3687362wrn.42.2021.02.03.03.54.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Feb 2021 03:54:06 -0800 (PST) From: Bryan O'Donoghue To: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, mturquette@baylibre.com, sboyd@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, agross@kernel.org Cc: bryan.odonoghue@linaro.org, jonathan@marek.ca, dikshita@codeaurora.org, dmitry.baryshkov@linaro.org, stanimir.varbanov@linaro.org Subject: [PATCH 4/4] clk: qcom: videocc: Add gdsc mmcx-reg supply hook Date: Wed, 3 Feb 2021 11:54:56 +0000 Message-Id: <20210203115456.1072975-5-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210203115456.1072975-1-bryan.odonoghue@linaro.org> References: <20210203115456.1072975-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This commit adds a regulator supply hook to mmcx-reg missing from - mvs0c_gdsc - mvs1c_gdsc - mvs0_gdsc - mvs1_gdsc Signed-off-by: Bryan O'Donoghue --- drivers/clk/qcom/videocc-sm8250.c | 4 ++++ 1 file changed, 4 insertions(+) -- 2.29.2 diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-sm8250.c index 3ade240bd49c..b0efadc19634 100644 --- a/drivers/clk/qcom/videocc-sm8250.c +++ b/drivers/clk/qcom/videocc-sm8250.c @@ -278,6 +278,7 @@ static struct gdsc mvs0c_gdsc = { }, .flags = 0, .pwrsts = PWRSTS_OFF_ON, + .supply = "mmcx", }; static struct gdsc mvs1c_gdsc = { @@ -287,6 +288,7 @@ static struct gdsc mvs1c_gdsc = { }, .flags = 0, .pwrsts = PWRSTS_OFF_ON, + .supply = "mmcx", }; static struct gdsc mvs0_gdsc = { @@ -296,6 +298,7 @@ static struct gdsc mvs0_gdsc = { }, .flags = HW_CTRL, .pwrsts = PWRSTS_OFF_ON, + .supply = "mmcx", }; static struct gdsc mvs1_gdsc = { @@ -305,6 +308,7 @@ static struct gdsc mvs1_gdsc = { }, .flags = HW_CTRL, .pwrsts = PWRSTS_OFF_ON, + .supply = "mmcx", }; static struct clk_regmap *video_cc_sm8250_clocks[] = {