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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c11sm8312664wrs.28.2021.02.04.07.00.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Feb 2021 07:00:05 -0800 (PST) From: Bryan O'Donoghue To: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, mturquette@baylibre.com, sboyd@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, agross@kernel.org Cc: bryan.odonoghue@linaro.org, jonathan@marek.ca, dikshita@codeaurora.org, dmitry.baryshkov@linaro.org, stanimir.varbanov@linaro.org Subject: [PATCH v2 1/4] dt-bindings: clock: Add missing SM8250 videoc clock indices Date: Thu, 4 Feb 2021 15:01:17 +0000 Message-Id: <20210204150120.1521959-2-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210204150120.1521959-1-bryan.odonoghue@linaro.org> References: <20210204150120.1521959-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Two indexes need to be added to videocc-sm8250.h for venus to function properly. Rather than adding the missing indexes when used we add them separately here to keep checkpatch.pl happy. Signed-off-by: Bryan O'Donoghue Reviewed-by: Dmitry Baryshkov Tested-by: Dmitry Baryshkov --- include/dt-bindings/clock/qcom,videocc-sm8250.h | 2 ++ 1 file changed, 2 insertions(+) -- 2.29.2 diff --git a/include/dt-bindings/clock/qcom,videocc-sm8250.h b/include/dt-bindings/clock/qcom,videocc-sm8250.h index 2b2b3867af25..8d321ac3b1fa 100644 --- a/include/dt-bindings/clock/qcom,videocc-sm8250.h +++ b/include/dt-bindings/clock/qcom,videocc-sm8250.h @@ -16,6 +16,8 @@ #define VIDEO_CC_MVS1C_DIV2_DIV_CLK_SRC 6 #define VIDEO_CC_PLL0 7 #define VIDEO_CC_PLL1 8 +#define VIDEO_CC_MVS0_DIV_CLK_SRC 9 +#define VIDEO_CC_MVS0_CLK 10 /* VIDEO_CC resets */ #define VIDEO_CC_CVP_INTERFACE_BCR 0 From patchwork Thu Feb 4 15:01:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 376293 Delivered-To: patch@linaro.org Received: by 2002:a02:b18a:0:0:0:0:0 with SMTP id t10csp1432591jah; Thu, 4 Feb 2021 08:28:41 -0800 (PST) X-Google-Smtp-Source: ABdhPJzAxZa4t+MxqIruyW3YSD8/H66SFLf6WvP3o6tsx1zzyK2gJi4uZhpvWBMOE0AU4stTUInl X-Received: by 2002:a17:906:2681:: with SMTP id t1mr8932775ejc.29.1612456121657; Thu, 04 Feb 2021 08:28:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612456121; cv=none; d=google.com; s=arc-20160816; b=E0mv3uvz657WJkSM8Yk6VQlpzPPVHpLd3T10HFKD4muALKloPJyn88G3cZHPuU80y0 R+XPsuQ3En0RawT4ATd17NpYVQXftJx4KfEx8JUYW4jfZcbOaUyWwq0p9OYCrAwnQ+uD j+b5CtF5mu+OHSgscpb3IKFapTj7S/K0Rce1dm5PpFjWAkTEBE+V0sLUeR8LFEtTeX98 eCmJpQZSonQztNG81USctQQHx9DhJUuBlg1tSSENQnicdwkzu/va7KFNrsCEinfDl4vC spC9PV/aNPwY9eftyN1Z0uNWxMcRZK4mz9zUM6bI2iBaTBfidQkgBVV/Fu+YXR9qS0jP obug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=28ZBg6HWPIrbV+zPYpH6RT+vX30g3C029HWLCzM+KTU=; b=kK14awBuuQX4OIUehZZbZyBtewj7K2EnWdnsDxDNahZim1iZ465wdFYiN1YdKb5AKU oZEk01VsQOAcNsoJog9eRMCx6XDaFKngAfCD201Y2twavRF++Ad6LhilrKfVvGVxJl/M yUV2/CgiCdbCDW2DR3rJqS2uQzyuTb5qcEJh4ia05QHKG65x2e0QV1o0VHQAUwqdFiX6 0Bfu1i+hWrtHMz8djncZ09JJ8MOzHnrZzhTWf8zki+D6foQ5QieCTssi8JlTwRa5B4/e U1bkfztco6Vmmt9tPDxiMN7nnV5iqvj/WOCw/DeBGVjSLsw+txfJic7gRF8lGoR4yZYt F7Zw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XWA5TX5+; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c11sm8312664wrs.28.2021.02.04.07.00.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Feb 2021 07:00:07 -0800 (PST) From: Bryan O'Donoghue To: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, mturquette@baylibre.com, sboyd@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, agross@kernel.org Cc: bryan.odonoghue@linaro.org, jonathan@marek.ca, dikshita@codeaurora.org, dmitry.baryshkov@linaro.org, stanimir.varbanov@linaro.org Subject: [PATCH v2 2/4] clk: qcom: videocc: Add sm8250 VIDEO_CC_MVS0_DIV_CLK_SRC Date: Thu, 4 Feb 2021 15:01:18 +0000 Message-Id: <20210204150120.1521959-3-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210204150120.1521959-1-bryan.odonoghue@linaro.org> References: <20210204150120.1521959-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This patch adds the missing video_cc_mvs0_div_clk_src entry to videocc-sm8250 replicating in upstream the explicit entry for this clock in downstream. Signed-off-by: Bryan O'Donoghue Reviewed-by: Dmitry Baryshkov Tested-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sm8250.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- 2.29.2 diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-sm8250.c index 2797c61f5938..cc84963ced40 100644 --- a/drivers/clk/qcom/videocc-sm8250.c +++ b/drivers/clk/qcom/videocc-sm8250.c @@ -169,6 +169,21 @@ static struct clk_regmap_div video_cc_mvs0c_div2_div_clk_src = { }, }; +static struct clk_regmap_div video_cc_mvs0_div_clk_src = { + .reg = 0xd54, + .shift = 0, + .width = 2, + .clkr.hw.init = &(struct clk_init_data) { + .name = "video_cc_mvs0_div_clk_src", + .parent_data = &(const struct clk_parent_data){ + .hw = &video_cc_mvs0_clk_src.clkr.hw, + }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_regmap_div_ro_ops, + }, +}; + static struct clk_regmap_div video_cc_mvs1c_div2_div_clk_src = { .reg = 0xcf4, .shift = 0, @@ -276,6 +291,7 @@ static struct gdsc mvs1_gdsc = { static struct clk_regmap *video_cc_sm8250_clocks[] = { [VIDEO_CC_MVS0_CLK_SRC] = &video_cc_mvs0_clk_src.clkr, + [VIDEO_CC_MVS0_DIV_CLK_SRC] = &video_cc_mvs0_div_clk_src.clkr, [VIDEO_CC_MVS0C_CLK] = &video_cc_mvs0c_clk.clkr, [VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC] = &video_cc_mvs0c_div2_div_clk_src.clkr, [VIDEO_CC_MVS1_CLK_SRC] = &video_cc_mvs1_clk_src.clkr, From patchwork Thu Feb 4 15:01:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 376290 Delivered-To: patch@linaro.org Received: by 2002:a02:b18a:0:0:0:0:0 with SMTP id t10csp1432426jah; Thu, 4 Feb 2021 08:28:29 -0800 (PST) X-Google-Smtp-Source: ABdhPJyPFy6Vm5DlbB1QjiTPEEkgb5pVWldziojgZH33wXcyXE0UuTJdvENuxLjC5875wRgKSoHu X-Received: by 2002:a05:6402:c9:: with SMTP id i9mr8612848edu.123.1612456109622; Thu, 04 Feb 2021 08:28:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612456109; cv=none; d=google.com; s=arc-20160816; b=k+o3YhQnnK5BoCV+R4IvtF6CXSQFjKNagOBwCGZEM2Idnz9b50aFiTpvqmMcoRgvws lSRT1TmYqjAXLBOarOJsOxtQUvhulAkHCydpzgU3tCHek1b8vz4da4YB8r9W8LOsLvdJ Y4l8nlTxxwxLrIMNZFOyvAzIpnISudhvOoKljHoBx0DXJtROBeRaay/MEY3eZPiB2HiQ F63EFkPvXhzTCo6B0b/KwcbHDDzQA8RL0kkeauXeJDpiF0YB2TD8ewkhQjpbaK+gYtOq /ta8PEChJgvNQohFQznwJBMaOPCJjwzsJObJ8h8bGRmRYwaJOH5y5dmwBdQtUucrwzhd UYEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=g/PBuY8B4LXNYC34z8jQVbK8y5NFUz4tvBI8DdIY53A=; b=ZKLMA8qbwYt19SNYa5jJ/3Mk3HFaELI2ENiuC5cGdJK/EfF7yyhYw9OeLMqAPSlV+n krlE0cmUgEInQsPOJt7Pzy+O+cWXo2YLmMyvVeen7+NTuV3MXKJqmGhF9zSNdAe0aokQ hoQItoQWh0rw0q7DRzbZBZsZBpgBOlrmcH0AjS5FnYbtROQjEC3rGZnzFpqcv40w6AWY KelqCtxhC4cTrMbO4BKMx+bTe/QrwIg5+mgnDumQfXoXKMs0r9+iKcLztVBjk7mngNmf sC2WtrVAP7fQtYpodDvTJAcPbsooQHIR55ZtmAR+T5MY4++VX7tRKwHPVYdKjFGKgtzv Mw0Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=M9BCIDzc; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c11sm8312664wrs.28.2021.02.04.07.00.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Feb 2021 07:00:09 -0800 (PST) From: Bryan O'Donoghue To: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, mturquette@baylibre.com, sboyd@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, agross@kernel.org Cc: bryan.odonoghue@linaro.org, jonathan@marek.ca, dikshita@codeaurora.org, dmitry.baryshkov@linaro.org, stanimir.varbanov@linaro.org Subject: [PATCH v2 3/4] clk: qcom: videocc: Add sm8250 VIDEO_CC_MVS0_CLK Date: Thu, 4 Feb 2021 15:01:19 +0000 Message-Id: <20210204150120.1521959-4-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210204150120.1521959-1-bryan.odonoghue@linaro.org> References: <20210204150120.1521959-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This patch adds the missing video_cc_mvs0_clk entry to videocc-sm8250 replicating in upstream the explicit entry for this clock in downstream. Signed-off-by: Bryan O'Donoghue Reviewed-by: Dmitry Baryshkov Tested-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sm8250.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.29.2 diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-sm8250.c index cc84963ced40..3ade240bd49c 100644 --- a/drivers/clk/qcom/videocc-sm8250.c +++ b/drivers/clk/qcom/videocc-sm8250.c @@ -217,6 +217,24 @@ static struct clk_branch video_cc_mvs0c_clk = { }, }; +static struct clk_branch video_cc_mvs0_clk = { + .halt_reg = 0xd34, + .halt_check = BRANCH_HALT_VOTED, + .clkr = { + .enable_reg = 0xd34, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "video_cc_mvs0_clk", + .parent_data = &(const struct clk_parent_data){ + .hw = &video_cc_mvs0_div_clk_src.clkr.hw, + }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_branch video_cc_mvs1_div2_clk = { .halt_reg = 0xdf4, .halt_check = BRANCH_HALT_VOTED, @@ -290,6 +308,7 @@ static struct gdsc mvs1_gdsc = { }; static struct clk_regmap *video_cc_sm8250_clocks[] = { + [VIDEO_CC_MVS0_CLK] = &video_cc_mvs0_clk.clkr, [VIDEO_CC_MVS0_CLK_SRC] = &video_cc_mvs0_clk_src.clkr, [VIDEO_CC_MVS0_DIV_CLK_SRC] = &video_cc_mvs0_div_clk_src.clkr, [VIDEO_CC_MVS0C_CLK] = &video_cc_mvs0c_clk.clkr, From patchwork Thu Feb 4 15:01:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 376283 Delivered-To: patch@linaro.org Received: by 2002:a02:b18a:0:0:0:0:0 with SMTP id t10csp1356255jah; Thu, 4 Feb 2021 07:03:50 -0800 (PST) X-Google-Smtp-Source: ABdhPJw5t96/TtMbXqCLV2Y+H+2Uf2vbwzeR9Tk0SZJ9NIQWdCwUjtmzd2MMrOK1IwVCl7B+pygZ X-Received: by 2002:a17:906:555:: with SMTP id k21mr8175956eja.148.1612451030401; Thu, 04 Feb 2021 07:03:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612451030; cv=none; d=google.com; s=arc-20160816; b=dZ7+sZDLNRc5Rk255E8F7RCwgJn/ijWhyUsS6svwJxGwt8+76BJ/DiJdrkXVYm5795 gtM8FGK195swjUOlHVUd8GOqUquGplWMz9N8vbm4yMi1lym6F3UjQs0LaRP6qf9Q85SU RQhqrPYLL26brgNOtD5IHdi2vqk5D1nPkox6v311DSVsEPXNZ3Di/xwdSzzLbHP18JXI fcmlUWAHBwgyDIFFJ/98ittKZdA7wkJDWtIBBzz3H0j7ybw+P55n2QIKOv0s7cqPgbZC e8q+ghek91IKE47HehZ8oj2U8jO4KT4WhDR1WTCbrk8iv6BZELfMwCHB3/WiwQ/cntVO oCVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nc9gnI1H6fzB+6K5saFm3Jx2SbTp7zcViLcj0vH0QAE=; b=Jm5LRj+HZRAiL0vk7ACkXG60rDuIuetwepKyq0IpjNHmN9dFhflMXhbUPENpVvnJ2i q0pkmENdJ85jlOvwJZuVVJGmL2DaeeHinNRCaYVXq0YY9P1RfrxTENnYGP84a47xZymy PKetVvYr5l5A4WOiZD7uK1SCU9IhPQaKryCsrZ1I7fLhaDNxfTT36XFRSak+liSc4Qot pLfv+2YCe+BNB15Nk/dXvE9vOLmm0Aa4I3KgtxDXO46wFbygkO9nCkNAayQhKhBS1m6f Pf5TgO1gcAniVufZk8wAPmQGAwbtCTeqnwTAJz0c6ECCpP5CbhwiTm+J8r+bUhx4ixsW L3sA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xBjDITC5; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c11sm8312664wrs.28.2021.02.04.07.00.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Feb 2021 07:00:11 -0800 (PST) From: Bryan O'Donoghue To: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, mturquette@baylibre.com, sboyd@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, agross@kernel.org Cc: bryan.odonoghue@linaro.org, jonathan@marek.ca, dikshita@codeaurora.org, dmitry.baryshkov@linaro.org, stanimir.varbanov@linaro.org Subject: [PATCH v2 4/4] clk: qcom: videocc: Add gdsc mmcx-reg supply hook Date: Thu, 4 Feb 2021 15:01:20 +0000 Message-Id: <20210204150120.1521959-5-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210204150120.1521959-1-bryan.odonoghue@linaro.org> References: <20210204150120.1521959-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This commit adds a regulator supply hook to mmcx-reg missing from - mvs0c_gdsc - mvs1c_gdsc - mvs0_gdsc - mvs1_gdsc Signed-off-by: Bryan O'Donoghue Reviewed-by: Dmitry Baryshkov Tested-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sm8250.c | 4 ++++ 1 file changed, 4 insertions(+) -- 2.29.2 diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-sm8250.c index 3ade240bd49c..b0efadc19634 100644 --- a/drivers/clk/qcom/videocc-sm8250.c +++ b/drivers/clk/qcom/videocc-sm8250.c @@ -278,6 +278,7 @@ static struct gdsc mvs0c_gdsc = { }, .flags = 0, .pwrsts = PWRSTS_OFF_ON, + .supply = "mmcx", }; static struct gdsc mvs1c_gdsc = { @@ -287,6 +288,7 @@ static struct gdsc mvs1c_gdsc = { }, .flags = 0, .pwrsts = PWRSTS_OFF_ON, + .supply = "mmcx", }; static struct gdsc mvs0_gdsc = { @@ -296,6 +298,7 @@ static struct gdsc mvs0_gdsc = { }, .flags = HW_CTRL, .pwrsts = PWRSTS_OFF_ON, + .supply = "mmcx", }; static struct gdsc mvs1_gdsc = { @@ -305,6 +308,7 @@ static struct gdsc mvs1_gdsc = { }, .flags = HW_CTRL, .pwrsts = PWRSTS_OFF_ON, + .supply = "mmcx", }; static struct clk_regmap *video_cc_sm8250_clocks[] = {