diff mbox series

[2/1] target/arm: Use helper_retaddr in stxp helpers

Message ID 20171114125304.854-1-richard.henderson@linaro.org
State Superseded
Headers show
Series tcg: Record code_gen_buffer address for user-only memory helpers | expand

Commit Message

Richard Henderson Nov. 14, 2017, 12:53 p.m. UTC
We use raw memory primitives along the !parallel_cpus paths in order to
simplify the endianness handling.  Because of that, we did not benefit
from the generic changes to cpu_ldst_user_only_template.h.

The simplest fix is to manipulate helper_retaddr here.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/helper-a64.c | 6 ++++++
 1 file changed, 6 insertions(+)

-- 
2.12.0

Comments

Peter Maydell Nov. 14, 2017, 1:13 p.m. UTC | #1
On 14 November 2017 at 12:53, Richard Henderson
<richard.henderson@linaro.org> wrote:
> We use raw memory primitives along the !parallel_cpus paths in order to

> simplify the endianness handling.  Because of that, we did not benefit

> from the generic changes to cpu_ldst_user_only_template.h.

>

> The simplest fix is to manipulate helper_retaddr here.

>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/arm/helper-a64.c | 6 ++++++

>  1 file changed, 6 insertions(+)

>

> diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c

> index d0e435ca4b..96a3ecf707 100644

> --- a/target/arm/helper-a64.c

> +++ b/target/arm/helper-a64.c

> @@ -456,6 +456,8 @@ static uint64_t do_paired_cmpxchg64_le(CPUARMState *env, uint64_t addr,

>  #ifdef CONFIG_USER_ONLY

>          /* ??? Enforce alignment.  */

>          uint64_t *haddr = g2h(addr);

> +

> +        helper_retaddr = ra;

>          o0 = ldq_le_p(haddr + 0);

>          o1 = ldq_le_p(haddr + 1);

>          oldv = int128_make128(o0, o1);

> @@ -465,6 +467,7 @@ static uint64_t do_paired_cmpxchg64_le(CPUARMState *env, uint64_t addr,

>              stq_le_p(haddr + 0, int128_getlo(newv));

>              stq_le_p(haddr + 1, int128_gethi(newv));

>          }

> +        helper_retaddr = 0;

>  #else

>          int mem_idx = cpu_mmu_index(env, false);

>          TCGMemOpIdx oi0 = make_memop_idx(MO_LEQ | MO_ALIGN_16, mem_idx);

> @@ -523,6 +526,8 @@ static uint64_t do_paired_cmpxchg64_be(CPUARMState *env, uint64_t addr,

>  #ifdef CONFIG_USER_ONLY

>          /* ??? Enforce alignment.  */

>          uint64_t *haddr = g2h(addr);

> +

> +        helper_retaddr = ra;

>          o1 = ldq_be_p(haddr + 0);

>          o0 = ldq_be_p(haddr + 1);

>          oldv = int128_make128(o0, o1);

> @@ -532,6 +537,7 @@ static uint64_t do_paired_cmpxchg64_be(CPUARMState *env, uint64_t addr,

>              stq_be_p(haddr + 0, int128_gethi(newv));

>              stq_be_p(haddr + 1, int128_getlo(newv));

>          }

> +        helper_retaddr = 0;

>  #else

>          int mem_idx = cpu_mmu_index(env, false);

>          TCGMemOpIdx oi0 = make_memop_idx(MO_BEQ | MO_ALIGN_16, mem_idx);

> --

> 2.12.0


These functions aren't directly called from guest code, so needs
this fixup to work with an unoptimised build:


diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index 96a3ecf..b84ebca 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -432,9 +432,8 @@ uint64_t HELPER(crc32c_64)(uint64_t acc, uint64_t
val, uint32_t bytes)
 /* Returns 0 on success; 1 otherwise.  */
 static uint64_t do_paired_cmpxchg64_le(CPUARMState *env, uint64_t addr,
                                        uint64_t new_lo, uint64_t new_hi,
-                                       bool parallel)
+                                       bool parallel, uintptr_t ra)
 {
-    uintptr_t ra = GETPC();
     Int128 oldv, cmpv, newv;
     bool success;

@@ -491,20 +490,19 @@ static uint64_t
do_paired_cmpxchg64_le(CPUARMState *env, uint64_t addr,
 uint64_t HELPER(paired_cmpxchg64_le)(CPUARMState *env, uint64_t addr,
                                               uint64_t new_lo, uint64_t new_hi)
 {
-    return do_paired_cmpxchg64_le(env, addr, new_lo, new_hi, false);
+    return do_paired_cmpxchg64_le(env, addr, new_lo, new_hi, false, GETPC());
 }

 uint64_t HELPER(paired_cmpxchg64_le_parallel)(CPUARMState *env, uint64_t addr,
                                               uint64_t new_lo, uint64_t new_hi)
 {
-    return do_paired_cmpxchg64_le(env, addr, new_lo, new_hi, true);
+    return do_paired_cmpxchg64_le(env, addr, new_lo, new_hi, true, GETPC());
 }

 static uint64_t do_paired_cmpxchg64_be(CPUARMState *env, uint64_t addr,
                                        uint64_t new_lo, uint64_t new_hi,
-                                       bool parallel)
+                                       bool parallel, uintptr_t ra)
 {
-    uintptr_t ra = GETPC();
     Int128 oldv, cmpv, newv;
     bool success;

@@ -561,11 +559,11 @@ static uint64_t
do_paired_cmpxchg64_be(CPUARMState *env, uint64_t addr,
 uint64_t HELPER(paired_cmpxchg64_be)(CPUARMState *env, uint64_t addr,
                                      uint64_t new_lo, uint64_t new_hi)
 {
-    return do_paired_cmpxchg64_be(env, addr, new_lo, new_hi, false);
+    return do_paired_cmpxchg64_be(env, addr, new_lo, new_hi, false, GETPC());
 }

 uint64_t HELPER(paired_cmpxchg64_be_parallel)(CPUARMState *env, uint64_t addr,
                                      uint64_t new_lo, uint64_t new_hi)
 {
-    return do_paired_cmpxchg64_be(env, addr, new_lo, new_hi, true);
+    return do_paired_cmpxchg64_be(env, addr, new_lo, new_hi, true, GETPC());
 }


thanks
-- PMM
Alex Bennée Nov. 14, 2017, 4:09 p.m. UTC | #2
Richard Henderson <richard.henderson@linaro.org> writes:

> We use raw memory primitives along the !parallel_cpus paths in order to

> simplify the endianness handling.  Because of that, we did not benefit

> from the generic changes to cpu_ldst_user_only_template.h.

>

> The simplest fix is to manipulate helper_retaddr here.

>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/arm/helper-a64.c | 6 ++++++

>  1 file changed, 6 insertions(+)

>

> diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c

> index d0e435ca4b..96a3ecf707 100644

> --- a/target/arm/helper-a64.c

> +++ b/target/arm/helper-a64.c

> @@ -456,6 +456,8 @@ static uint64_t do_paired_cmpxchg64_le(CPUARMState *env, uint64_t addr,

>  #ifdef CONFIG_USER_ONLY

>          /* ??? Enforce alignment.  */

>          uint64_t *haddr = g2h(addr);

> +

> +        helper_retaddr = ra;

>          o0 = ldq_le_p(haddr + 0);

>          o1 = ldq_le_p(haddr + 1);

>          oldv = int128_make128(o0, o1);

> @@ -465,6 +467,7 @@ static uint64_t do_paired_cmpxchg64_le(CPUARMState *env, uint64_t addr,

>              stq_le_p(haddr + 0, int128_getlo(newv));

>              stq_le_p(haddr + 1, int128_gethi(newv));

>          }

> +        helper_retaddr = 0;

>  #else

>          int mem_idx = cpu_mmu_index(env, false);

>          TCGMemOpIdx oi0 = make_memop_idx(MO_LEQ | MO_ALIGN_16, mem_idx);

> @@ -523,6 +526,8 @@ static uint64_t do_paired_cmpxchg64_be(CPUARMState *env, uint64_t addr,

>  #ifdef CONFIG_USER_ONLY

>          /* ??? Enforce alignment.  */

>          uint64_t *haddr = g2h(addr);

> +

> +        helper_retaddr = ra;

>          o1 = ldq_be_p(haddr + 0);

>          o0 = ldq_be_p(haddr + 1);

>          oldv = int128_make128(o0, o1);

> @@ -532,6 +537,7 @@ static uint64_t do_paired_cmpxchg64_be(CPUARMState *env, uint64_t addr,

>              stq_be_p(haddr + 0, int128_gethi(newv));

>              stq_be_p(haddr + 1, int128_getlo(newv));

>          }

> +        helper_retaddr = 0;

>  #else

>          int mem_idx = cpu_mmu_index(env, false);

>          TCGMemOpIdx oi0 = make_memop_idx(MO_BEQ | MO_ALIGN_16, mem_idx);



Reviewed-by: Alex Bennée <alex.bennee@linaro.org>


--
Alex Bennée
diff mbox series

Patch

diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index d0e435ca4b..96a3ecf707 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -456,6 +456,8 @@  static uint64_t do_paired_cmpxchg64_le(CPUARMState *env, uint64_t addr,
 #ifdef CONFIG_USER_ONLY
         /* ??? Enforce alignment.  */
         uint64_t *haddr = g2h(addr);
+
+        helper_retaddr = ra;
         o0 = ldq_le_p(haddr + 0);
         o1 = ldq_le_p(haddr + 1);
         oldv = int128_make128(o0, o1);
@@ -465,6 +467,7 @@  static uint64_t do_paired_cmpxchg64_le(CPUARMState *env, uint64_t addr,
             stq_le_p(haddr + 0, int128_getlo(newv));
             stq_le_p(haddr + 1, int128_gethi(newv));
         }
+        helper_retaddr = 0;
 #else
         int mem_idx = cpu_mmu_index(env, false);
         TCGMemOpIdx oi0 = make_memop_idx(MO_LEQ | MO_ALIGN_16, mem_idx);
@@ -523,6 +526,8 @@  static uint64_t do_paired_cmpxchg64_be(CPUARMState *env, uint64_t addr,
 #ifdef CONFIG_USER_ONLY
         /* ??? Enforce alignment.  */
         uint64_t *haddr = g2h(addr);
+
+        helper_retaddr = ra;
         o1 = ldq_be_p(haddr + 0);
         o0 = ldq_be_p(haddr + 1);
         oldv = int128_make128(o0, o1);
@@ -532,6 +537,7 @@  static uint64_t do_paired_cmpxchg64_be(CPUARMState *env, uint64_t addr,
             stq_be_p(haddr + 0, int128_gethi(newv));
             stq_be_p(haddr + 1, int128_getlo(newv));
         }
+        helper_retaddr = 0;
 #else
         int mem_idx = cpu_mmu_index(env, false);
         TCGMemOpIdx oi0 = make_memop_idx(MO_BEQ | MO_ALIGN_16, mem_idx);