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[v2,00/19] ARM: dts: aspeed: updates and new machines

Message ID 20171215062443.23059-1-joel@jms.id.au
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Series ARM: dts: aspeed: updates and new machines | expand

Message

Joel Stanley Dec. 15, 2017, 6:24 a.m. UTC
This series of device tree patches for the ASPEED BMC machines
moves all systems to use the soon to be merged clk driver, and
updates machines to use all of the drivers we have upstream.

 v2: Address review from Arnd
  - Remove NUM_CLKS from dt header
  - Send VUART patch as a fix, drop it from this series
  - Add reasoning for breaking old kernel in the 'proper clock
    references' patch

In addition it adds three new OpenBMC systems that have been developed
in the OpenBMC kernel tree over the past year: two Power9 OpenPower
systems, and a port by Google to a Quanta x86 server.

I have boot tested these on Romulus and Palmetto, as well as boot tested
all device trees in Qemu.

Please review the boards you are familiar with. I will merge these in to
the ASPEED ARM SoC tree for inclusion in 4.16.

Andrew Jeffery (1):
  ARM: dts: aspeed: Add LPC and child devices

Joel Stanley (16):
  dt-bindings: clock: Add ASPEED constants
  dt-bindings: gpio: Add ASPEED constants
  ARM: dts: aspeed: Add proper clock references
  ARM: dts: aspeed: Add MAC clocks
  ARM: dts: aspeed: Add watchdog clocks
  ARM: dts: aspeed: Add flash controller clocks
  ARM: dts: aspeed: Add clock phandle to GPIO
  ARM: dts: aspeed: Add PWM and tachometer node
  ARM: dts: aspeed: Add LPC Snoop device
  ARM: dts: aspeed: Remove skeleton.dtsi
  ARM: dts: aspeed: Update license headers
  ARM: dts: Add OpenBMC flash layout
  ARM: dts: aspeed: Sort ASPEED entries in makefile
  ARM: dts: aspeed: Add Witherspoon BMC machine
  ARM: dts: aspeed-romulus: Update Romulus system
  ARM: dts: aspeed-plametto: Add flash layout

Rick Altherr (1):
  ARM: dts: aspeed: Add Qanta Q71L BMC machine

Xo Wang (1):
  ARM: dts: aspeed: Add Ingrasys Zaius BMC machine

 arch/arm/boot/dts/Makefile                       |   8 +-
 arch/arm/boot/dts/aspeed-ast2500-evb.dts         |   2 +-
 arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts    |   3 +-
 arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts     | 155 ++++++-
 arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts | 547 +++++++++++++++++++++++
 arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts       | 427 ++++++++++++++++++
 arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts     | 458 +++++++++++++++++++
 arch/arm/boot/dts/aspeed-g4.dtsi                 | 164 ++++---
 arch/arm/boot/dts/aspeed-g5.dtsi                 | 155 ++++---
 arch/arm/boot/dts/openbmc-flash-layout.dtsi      |  32 ++
 include/dt-bindings/clock/aspeed-clock.h         |  52 +++
 include/dt-bindings/gpio/aspeed-gpio.h           |  49 ++
 12 files changed, 1906 insertions(+), 146 deletions(-)
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
 create mode 100644 arch/arm/boot/dts/openbmc-flash-layout.dtsi
 create mode 100644 include/dt-bindings/clock/aspeed-clock.h
 create mode 100644 include/dt-bindings/gpio/aspeed-gpio.h

-- 
2.14.1

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Comments

Rob Herring (Arm) Dec. 16, 2017, 6:17 p.m. UTC | #1
On Fri, Dec 15, 2017 at 04:54:26PM +1030, Joel Stanley wrote:
> These are used to by the device tree to map pin numbers to constants

> required by the GPIO bindings.

> 

> Signed-off-by: Joel Stanley <joel@jms.id.au>

> ---

>  arch/arm/boot/dts/aspeed-g4.dtsi       |  1 +

>  arch/arm/boot/dts/aspeed-g5.dtsi       |  1 +

>  include/dt-bindings/gpio/aspeed-gpio.h | 49 ++++++++++++++++++++++++++++++++++

>  3 files changed, 51 insertions(+)

>  create mode 100644 include/dt-bindings/gpio/aspeed-gpio.h

> 

> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi

> index 45d815a86d42..100d092e6c07 100644

> --- a/arch/arm/boot/dts/aspeed-g4.dtsi

> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi

> @@ -1,5 +1,6 @@

>  // SPDX-License-Identifier: GPL-2.0

>  #include "skeleton.dtsi"

> +#include <dt-bindings/gpio/aspeed-gpio.h>


Don't you need to use the defines? Probably should be a separate patch.

Rob
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Cédric Le Goater Dec. 18, 2017, 9:02 a.m. UTC | #2
On 12/15/2017 07:24 AM, Joel Stanley wrote:
> Signed-off-by: Joel Stanley <joel@jms.id.au>



Reviewed-by: Cédric Le Goater <clg@kaod.org>



> ---

>  arch/arm/boot/dts/aspeed-g4.dtsi | 2 ++

>  arch/arm/boot/dts/aspeed-g5.dtsi | 3 +++

>  2 files changed, 5 insertions(+)

> 

> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi

> index cf407b4db630..2e3666d4fbeb 100644

> --- a/arch/arm/boot/dts/aspeed-g4.dtsi

> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi

> @@ -177,11 +177,13 @@

>  			wdt1: watchdog@1e785000 {

>  				compatible = "aspeed,ast2400-wdt";

>  				reg = <0x1e785000 0x1c>;

> +				clocks = <&syscon ASPEED_CLK_APB>;

>  			};

>  

>  			wdt2: watchdog@1e785020 {

>  				compatible = "aspeed,ast2400-wdt";

>  				reg = <0x1e785020 0x1c>;

> +				clocks = <&syscon ASPEED_CLK_APB>;

>  			};

>  

>  			vuart: serial@1e787000 {

> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi

> index ab26156d6822..24bb2d16b900 100644

> --- a/arch/arm/boot/dts/aspeed-g5.dtsi

> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi

> @@ -219,16 +219,19 @@

>  			wdt1: watchdog@1e785000 {

>  				compatible = "aspeed,ast2500-wdt";

>  				reg = <0x1e785000 0x20>;

> +				clocks = <&syscon ASPEED_CLK_APB>;

>  			};

>  

>  			wdt2: watchdog@1e785020 {

>  				compatible = "aspeed,ast2500-wdt";

>  				reg = <0x1e785020 0x20>;

> +				clocks = <&syscon ASPEED_CLK_APB>;

>  			};

>  

>  			wdt3: watchdog@1e785040 {

>  				compatible = "aspeed,ast2500-wdt";

>  				reg = <0x1e785040 0x20>;

> +				clocks = <&syscon ASPEED_CLK_APB>;

>  				status = "disabled";

>  			};

>  

> 


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Cédric Le Goater Dec. 18, 2017, 9:04 a.m. UTC | #3
On 12/15/2017 07:24 AM, Joel Stanley wrote:
> This is a layout used by OpenBMC systems. It describes the fixed flash

> layout of a 32MB mtd device.

> 

> Signed-off-by: Joel Stanley <joel@jms.id.au>



Reviewed-by: Cédric Le Goater <clg@kaod.org>



> ---

>  arch/arm/boot/dts/openbmc-flash-layout.dtsi | 32 +++++++++++++++++++++++++++++

>  1 file changed, 32 insertions(+)

>  create mode 100644 arch/arm/boot/dts/openbmc-flash-layout.dtsi

> 

> diff --git a/arch/arm/boot/dts/openbmc-flash-layout.dtsi b/arch/arm/boot/dts/openbmc-flash-layout.dtsi

> new file mode 100644

> index 000000000000..63ad8db7a431

> --- /dev/null

> +++ b/arch/arm/boot/dts/openbmc-flash-layout.dtsi

> @@ -0,0 +1,32 @@

> +// SPDX-License-Identifier: GPL-2.0+

> +

> +partitions {

> +	compatible = "fixed-partitions";

> +	#address-cells = <1>;

> +	#size-cells = <1>;

> +

> +	u-boot@0 {

> +		reg = <0x0 0x60000>;

> +		label = "u-boot";

> +	};

> +

> +	u-boot-env@60000 {

> +		reg = <0x60000 0x20000>;

> +		label = "u-boot-env";

> +	};

> +

> +	kernel@80000 {

> +		reg = <0x80000 0x440000>;

> +		label = "kernel";

> +	};

> +

> +	rofs@0c0000 {

> +		reg = <0x4c0000 0x1740000>;

> +		label = "rofs";

> +	};

> +

> +	rwfs@1c00000 {

> +		reg = <0x1c00000 0x400000>;

> +		label = "rwfs";

> +	};

> +};

> 


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Cédric Le Goater Dec. 18, 2017, 9:08 a.m. UTC | #4
On 12/15/2017 07:24 AM, Joel Stanley wrote:
> We don't require it for any of the ASPEED systems.


Reviewed-by: Cédric Le Goater <clg@kaod.org>



> 

> Signed-off-by: Joel Stanley <joel@jms.id.au>

> ---

>  arch/arm/boot/dts/aspeed-g4.dtsi | 1 -

>  arch/arm/boot/dts/aspeed-g5.dtsi | 1 -

>  2 files changed, 2 deletions(-)

> 

> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi

> index b3580f37f507..2d7ac577d6b5 100644

> --- a/arch/arm/boot/dts/aspeed-g4.dtsi

> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi

> @@ -1,5 +1,4 @@

>  // SPDX-License-Identifier: GPL-2.0

> -#include "skeleton.dtsi"

>  #include <dt-bindings/clock/aspeed-clock.h>

>  #include <dt-bindings/gpio/aspeed-gpio.h>

>  

> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi

> index 50766f0629f8..030a760696fd 100644

> --- a/arch/arm/boot/dts/aspeed-g5.dtsi

> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi

> @@ -1,5 +1,4 @@

>  // SPDX-License-Identifier: GPL-2.0

> -#include "skeleton.dtsi"

>  #include <dt-bindings/clock/aspeed-clock.h>

>  #include <dt-bindings/gpio/aspeed-gpio.h>

>  

> 


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Cédric Le Goater Dec. 18, 2017, 9:16 a.m. UTC | #5
On 12/15/2017 07:24 AM, Joel Stanley wrote:
> LPC snoop hardware on the ASPEED BMC, used for monitoring

> host I/O port activity.

> 

> Signed-off-by: Joel Stanley <joel@jms.id.au>

> ---

>  arch/arm/boot/dts/aspeed-g4.dtsi | 7 +++++++

>  arch/arm/boot/dts/aspeed-g5.dtsi | 6 ++++++

>  2 files changed, 13 insertions(+)

> 

> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi

> index f6fee40c04c0..b3580f37f507 100644

> --- a/arch/arm/boot/dts/aspeed-g4.dtsi

> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi

> @@ -236,6 +236,13 @@

>  						status = "disabled";

>  					};

>  

> +					lpc_snoop: lpc-snoop@0 {

> +						compatible = "aspeed,ast2500-lpc-snoop";


it should be :

	aspeed,ast2400-lpc-snoop

a part from that :

Reviewed-by: Cédric Le Goater <clg@kaod.org>


> +						reg = <0x0 0x80>;

> +						interrupts = <8>;

> +						status = "disabled";

> +					};

> +

>  					lhc: lhc@20 {

>  						compatible = "aspeed,ast2500-lhc";

>  						reg = <0x20 0x24 0x48 0x8>;

> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi

> index 96a9d2fe3f0d..50766f0629f8 100644

> --- a/arch/arm/boot/dts/aspeed-g5.dtsi

> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi

> @@ -287,6 +287,12 @@

>  						status = "disabled";

>  					};

>  

> +					lpc_snoop: lpc-snoop@0 {

> +						compatible = "aspeed,ast2500-lpc-snoop";

> +						reg = <0x0 0x80>;

> +						interrupts = <8>;

> +						status = "disabled";

> +					};

>  

>  					lhc: lhc@20 {

>  						compatible = "aspeed,ast2500-lhc";

> 


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Joel Stanley Dec. 20, 2017, 3:21 a.m. UTC | #6
On Mon, Dec 18, 2017 at 7:46 PM, Cédric Le Goater <clg@kaod.org> wrote:
> On 12/15/2017 07:24 AM, Joel Stanley wrote:

>> LPC snoop hardware on the ASPEED BMC, used for monitoring

>> host I/O port activity.

>>

>> Signed-off-by: Joel Stanley <joel@jms.id.au>

>> ---

>>  arch/arm/boot/dts/aspeed-g4.dtsi | 7 +++++++

>>  arch/arm/boot/dts/aspeed-g5.dtsi | 6 ++++++

>>  2 files changed, 13 insertions(+)

>>

>> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi

>> index f6fee40c04c0..b3580f37f507 100644

>> --- a/arch/arm/boot/dts/aspeed-g4.dtsi

>> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi

>> @@ -236,6 +236,13 @@

>>                                               status = "disabled";

>>                                       };

>>

>> +                                     lpc_snoop: lpc-snoop@0 {

>> +                                             compatible = "aspeed,ast2500-lpc-snoop";

>

> it should be :

>

>         aspeed,ast2400-lpc-snoop

>

> a part from that :

>

> Reviewed-by: Cédric Le Goater <clg@kaod.org>


Fixed in v3.

Cheers,

Joel
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Joel Stanley Dec. 20, 2017, 3:22 a.m. UTC | #7
On Mon, Dec 18, 2017 at 8:02 PM, Cédric Le Goater <clg@kaod.org> wrote:
>> +};

>> +

>> +&fmc {

>> +     status = "okay";

>> +

>> +     flash@0 {

>> +             status = "okay";

>> +             label = "pnor";

>> +             m25p,fast-read;

>> +#include "openbmc-flash-layout.dtsi"

>> +     };

>> +};

>> +

>> +&spi1 {

>> +     status = "okay";

>> +

>> +     pinctrl-names = "default";

>> +     pinctrl-0 = <&pinctrl_spi1_default>;

>> +

>> +     flash@0 {

>> +             status = "okay";

>> +             label = "pnor";

>> +             m25p,fast-read;

>>       };

>>  };

>

>

> hmm, the fmc and spi1 bindings were already added in commit 1142aea9ff9d.

>

>

>> @@ -38,6 +101,7 @@

>>               status = "okay";

>>               m25p,fast-read;

>>               label = "bmc";

>> +#include "openbmc-flash-layout.dtsi"

>

>

> This looks like an extra "fmc" node ?


You're right. It still built and booted too. Good catch.

Cheers,

Joel
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