| Message ID | 20180725210819.1458-1-brian.brooks@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | [v2,bpf-next] samples/bpf: xdpsock: order memory on AArch64 | expand |
Den ons 25 juli 2018 kl 23:09 skrev Brian Brooks <brian.brooks@linaro.org>: > > Define u_smp_rmb() and u_smp_wmb() to respective barrier instructions. > This ensures the processor will order accesses to queue indices against > accesses to queue ring entries. > Thanks Brian! Acked-by: Björn Töpel <bjorn.topel@intel.com> > Signed-off-by: Brian Brooks <brian.brooks@linaro.org> > --- > samples/bpf/xdpsock_user.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/samples/bpf/xdpsock_user.c b/samples/bpf/xdpsock_user.c > index 5904b1543831..1e82f7c617c3 100644 > --- a/samples/bpf/xdpsock_user.c > +++ b/samples/bpf/xdpsock_user.c > @@ -145,8 +145,13 @@ static void dump_stats(void); > } while (0) > > #define barrier() __asm__ __volatile__("": : :"memory") > +#ifdef __aarch64__ > +#define u_smp_rmb() __asm__ __volatile__("dmb ishld": : :"memory") > +#define u_smp_wmb() __asm__ __volatile__("dmb ishst": : :"memory") > +#else > #define u_smp_rmb() barrier() > #define u_smp_wmb() barrier() > +#endif > #define likely(x) __builtin_expect(!!(x), 1) > #define unlikely(x) __builtin_expect(!!(x), 0) > > -- > 2.18.0 >
On 07/25/2018 11:08 PM, Brian Brooks wrote: > Define u_smp_rmb() and u_smp_wmb() to respective barrier instructions. > This ensures the processor will order accesses to queue indices against > accesses to queue ring entries. > > Signed-off-by: Brian Brooks <brian.brooks@linaro.org> Applied to bpf-next, thanks Brian!
diff --git a/samples/bpf/xdpsock_user.c b/samples/bpf/xdpsock_user.c index 5904b1543831..1e82f7c617c3 100644 --- a/samples/bpf/xdpsock_user.c +++ b/samples/bpf/xdpsock_user.c @@ -145,8 +145,13 @@ static void dump_stats(void); } while (0) #define barrier() __asm__ __volatile__("": : :"memory") +#ifdef __aarch64__ +#define u_smp_rmb() __asm__ __volatile__("dmb ishld": : :"memory") +#define u_smp_wmb() __asm__ __volatile__("dmb ishst": : :"memory") +#else #define u_smp_rmb() barrier() #define u_smp_wmb() barrier() +#endif #define likely(x) __builtin_expect(!!(x), 1) #define unlikely(x) __builtin_expect(!!(x), 0)
Define u_smp_rmb() and u_smp_wmb() to respective barrier instructions. This ensures the processor will order accesses to queue indices against accesses to queue ring entries. Signed-off-by: Brian Brooks <brian.brooks@linaro.org> --- samples/bpf/xdpsock_user.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.18.0