diff mbox series

arm: dts: vexpress-v2p-ca15_a7: disable NOR flash node by default

Message ID 20190530091139.11643-1-sudeep.holla@arm.com
State Accepted
Commit 6f3710f1f65fdc0da2b042ea6a9a738ddd146d4e
Headers show
Series arm: dts: vexpress-v2p-ca15_a7: disable NOR flash node by default | expand

Commit Message

Sudeep Holla May 30, 2019, 9:11 a.m. UTC
Accessing the NOR flash memory from the kernel will disrupt CPU sleep/
idles states and CPU hotplugging. We need to disable this DT node by
default. Setups that want to access the flash can modify this entry to
enable the flash again but also ensuring to disable CPU idle states and
CPU hotplug.

The platform firmware assumes the flash is always in read mode while
Linux kernel driver leaves NOR flash in "read id" mode after
initialization. If it gets used actively, it can be in some other state.

So far we had not seen this issue as the NOR flash drivers in kernel
were not enabled by default. However it was enable in multi_v7 config by
Commit 5f068190cc10 ("ARM: multi_v7_defconfig: Enable support for CFI NOR FLASH")

So, let's mark the NOR flash disabled so that the platform can boot
again. This based on:
Commit 980bbff018f6 ("ARM64: juno: disable NOR flash node by default")

Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

---
 arch/arm/boot/dts/vexpress-v2m-rs1.dtsi    | 2 +-
 arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 9 +++++++++
 2 files changed, 10 insertions(+), 1 deletion(-)

-- 
2.17.1

Comments

Linus Walleij May 30, 2019, 10:50 a.m. UTC | #1
On Thu, May 30, 2019 at 11:11 AM Sudeep Holla <sudeep.holla@arm.com> wrote:

> Accessing the NOR flash memory from the kernel will disrupt CPU sleep/

> idles states and CPU hotplugging. We need to disable this DT node by

> default. Setups that want to access the flash can modify this entry to

> enable the flash again but also ensuring to disable CPU idle states and

> CPU hotplug.

>

> The platform firmware assumes the flash is always in read mode while

> Linux kernel driver leaves NOR flash in "read id" mode after

> initialization. If it gets used actively, it can be in some other state.

>

> So far we had not seen this issue as the NOR flash drivers in kernel

> were not enabled by default. However it was enable in multi_v7 config by

> Commit 5f068190cc10 ("ARM: multi_v7_defconfig: Enable support for CFI NOR FLASH")

>

> So, let's mark the NOR flash disabled so that the platform can boot

> again. This based on:

> Commit 980bbff018f6 ("ARM64: juno: disable NOR flash node by default")

>

> Cc: Liviu Dudau <liviu.dudau@arm.com>

> Cc: Linus Walleij <linus.walleij@linaro.org>

> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>


Reviewed-by: Linus Walleij <linus.walleij@linaro.org>


It's a bit sad that this cannot be easily fixed (I don't know if it can even
be fixed with firmware updates?), it's kind of useful to be able to
update the flash from within Linux, as that mimics what pretty much
every IoT device (such as routers) is doing and would be nince for
an OpenWrt port.

Yours,
Linus Walleij
Sudeep Holla May 30, 2019, 11:01 a.m. UTC | #2
On Thu, May 30, 2019 at 12:50:12PM +0200, Linus Walleij wrote:
> On Thu, May 30, 2019 at 11:11 AM Sudeep Holla <sudeep.holla@arm.com> wrote:

> 

> > Accessing the NOR flash memory from the kernel will disrupt CPU sleep/

> > idles states and CPU hotplugging. We need to disable this DT node by

> > default. Setups that want to access the flash can modify this entry to

> > enable the flash again but also ensuring to disable CPU idle states and

> > CPU hotplug.

> >

> > The platform firmware assumes the flash is always in read mode while

> > Linux kernel driver leaves NOR flash in "read id" mode after

> > initialization. If it gets used actively, it can be in some other state.

> >

> > So far we had not seen this issue as the NOR flash drivers in kernel

> > were not enabled by default. However it was enable in multi_v7 config by

> > Commit 5f068190cc10 ("ARM: multi_v7_defconfig: Enable support for CFI NOR FLASH")

> >

> > So, let's mark the NOR flash disabled so that the platform can boot

> > again. This based on:

> > Commit 980bbff018f6 ("ARM64: juno: disable NOR flash node by default")

> >

> > Cc: Liviu Dudau <liviu.dudau@arm.com>

> > Cc: Linus Walleij <linus.walleij@linaro.org>

> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

> > Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

>

> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

>


Thanks.

> It's a bit sad that this cannot be easily fixed (I don't know if it can even

> be fixed with firmware updates?), it's kind of useful to be able to

> update the flash from within Linux, as that mimics what pretty much

> every IoT device (such as routers) is doing and would be nince for

> an OpenWrt port.

>


IMO, it issue with partitioning of the system. Basically these traditional
NOR flash don't support partitions at hardware level so that one accessed
by firmware/secure side is protected from another accessed from non-secure.

I like the eMMC boot partitions in that ways as these are hardware
partitions and the device state is separate for these.

Also, ideally firmware/secure side should just restrict themselves to
Secure ROM, but as a record we consistently ensure firmware on SROM is
busted and use non-secure ROM/NOR Flash as bypass :) which then makes
it tricky to deal with such scenarios in Linux. Hope we fill have some
system with everything working *one day* :D

--
Regards,
Sudeep
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index d3963e9eaf48..1b5bc536c547 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -30,7 +30,7 @@ 
 			#interrupt-cells = <1>;
 			ranges;
 
-			flash@0,00000000 {
+			nor_flash: flash@0,00000000 {
 				compatible = "arm,vexpress-flash", "cfi-flash";
 				reg = <0 0x00000000 0x04000000>,
 				      <4 0x00000000 0x04000000>;
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index 164c904c9992..1de0a658adf1 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -680,3 +680,12 @@ 
 				<0 3 &gic 0 39 4>;
 	};
 };
+
+&nor_flash {
+	/*
+	 * Unfortunately, accessing the flash disturbs the CPU idle states
+	 * (suspend) and CPU hotplug of this platform. For this reason, flash
+	 * hardware access is disabled by default on this platform alone.
+	 */
+	status = "disabled";
+};