Message ID | 20210727202004.712665-1-dmitry.baryshkov@linaro.org |
---|---|
Headers | show |
Series | clk: qcom: use power-domain for sm8250's clock controllers | expand |
On Tue, 27 Jul 2021 at 22:20, Dmitry Baryshkov <dmitry.baryshkov@linaro.org> wrote: > > On SM8250 both the display and video clock controllers are powered up by > the MMCX power domain. Handle this by linking clock controllers to the > proper power domain, and using runtime power management to enable and > disable the MMCX power domain. > > Dependencies: > - https://lore.kernel.org/linux-arm-msm/20210703005416.2668319-1-bjorn.andersson@linaro.org/ > (pending) > > Changes since v5: > - Dropped devm_pm_runtime_enable callback to remove extra dependency > > Changes since v4: > - Dropped pm_runtime handling from drivers/clk/qcom/common.c Moved the > code into dispcc-sm8250.c and videocc-sm8250.c > > Changes since v3: > - Wrap gdsc_enable/gdsc_disable into pm_runtime_get/put calls rather > than calling pm_runtime_get in gdsc_enabled and _put in gdsc_disable > - Squash gdsc patches together to remove possible dependencies between > two patches. > > Changes since v2: > - Move pm_runtime calls from generic genpd code to the gdsc code for > now (as suggested by Ulf & Bjorn) > > Changes since v1: > - Rebase on top of Bjorn's patches, removing the need for setting > performance state directly. > - Move runtime PM calls from GDSC code to generic genpd code. > - Always call pm_runtime_enable in the Qualcomm generic clock > controller code. > - Register GDSC power domains as subdomains of the domain powering the > clock controller if there is one. > > ---------------------------------------------------------------- > Dmitry Baryshkov (8): > dt-bindings: clock: qcom,dispcc-sm8x50: add mmcx power domain > dt-bindings: clock: qcom,videocc: add mmcx power domain > clk: qcom: dispcc-sm8250: use runtime PM for the clock controller > clk: qcom: videocc-sm8250: use runtime PM for the clock controller > clk: qcom: gdsc: enable optional power domain support > arm64: dts: qcom: sm8250: remove mmcx regulator > clk: qcom: dispcc-sm8250: stop using mmcx regulator > clk: qcom: videocc-sm8250: stop using mmcx regulator > > .../bindings/clock/qcom,dispcc-sm8x50.yaml | 7 +++ > .../devicetree/bindings/clock/qcom,videocc.yaml | 7 +++ > arch/arm64/boot/dts/qcom/sm8250.dtsi | 11 +--- > drivers/clk/qcom/dispcc-sm8250.c | 28 ++++++++-- > drivers/clk/qcom/gdsc.c | 59 ++++++++++++++++++++-- > drivers/clk/qcom/gdsc.h | 2 + > drivers/clk/qcom/videocc-sm8250.c | 31 +++++++++--- > 7 files changed, 124 insertions(+), 21 deletions(-) > For the series: Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Kind regards Uffe
Quoting Dmitry Baryshkov (2021-07-27 13:19:56) > On SM8250 both the display and video clock controllers are powered up by > the MMCX power domain. Handle this by linking clock controllers to the > proper power domain, and using runtime power management to enable and > disable the MMCX power domain. > > Dependencies: > - https://lore.kernel.org/linux-arm-msm/20210703005416.2668319-1-bjorn.andersson@linaro.org/ > (pending) Does this patch series need to go through the qcom tree? Presumably the dependency is going through qcom -> arm-soc > > Changes since v5: > - Dropped devm_pm_runtime_enable callback to remove extra dependency > > Changes since v4: > - Dropped pm_runtime handling from drivers/clk/qcom/common.c Moved the > code into dispcc-sm8250.c and videocc-sm8250.c > > Changes since v3: > - Wrap gdsc_enable/gdsc_disable into pm_runtime_get/put calls rather > than calling pm_runtime_get in gdsc_enabled and _put in gdsc_disable > - Squash gdsc patches together to remove possible dependencies between > two patches. >
On 26/08/2021 21:31, Stephen Boyd wrote: > Quoting Dmitry Baryshkov (2021-07-27 13:19:56) >> On SM8250 both the display and video clock controllers are powered up by >> the MMCX power domain. Handle this by linking clock controllers to the >> proper power domain, and using runtime power management to enable and >> disable the MMCX power domain. >> >> Dependencies: >> - https://lore.kernel.org/linux-arm-msm/20210703005416.2668319-1-bjorn.andersson@linaro.org/ >> (pending) > > Does this patch series need to go through the qcom tree? Presumably the > dependency is going through qcom -> arm-soc It looks like Bjorn did not apply his patches in the for-5.15 series, so we'd have to wait anyway. Probably I should rebase these patches instead on Rajendra's required-opps patch (which is going in this window). > >> >> Changes since v5: >> - Dropped devm_pm_runtime_enable callback to remove extra dependency >> >> Changes since v4: >> - Dropped pm_runtime handling from drivers/clk/qcom/common.c Moved the >> code into dispcc-sm8250.c and videocc-sm8250.c >> >> Changes since v3: >> - Wrap gdsc_enable/gdsc_disable into pm_runtime_get/put calls rather >> than calling pm_runtime_get in gdsc_enabled and _put in gdsc_disable >> - Squash gdsc patches together to remove possible dependencies between >> two patches. >> -- With best wishes Dmitry
Quoting Dmitry Baryshkov (2021-08-26 14:56:23) > On 26/08/2021 21:31, Stephen Boyd wrote: > > Quoting Dmitry Baryshkov (2021-07-27 13:19:56) > >> On SM8250 both the display and video clock controllers are powered up by > >> the MMCX power domain. Handle this by linking clock controllers to the > >> proper power domain, and using runtime power management to enable and > >> disable the MMCX power domain. > >> > >> Dependencies: > >> - https://lore.kernel.org/linux-arm-msm/20210703005416.2668319-1-bjorn.andersson@linaro.org/ > >> (pending) > > > > Does this patch series need to go through the qcom tree? Presumably the > > dependency is going through qcom -> arm-soc > > It looks like Bjorn did not apply his patches in the for-5.15 series, so > we'd have to wait anyway. Probably I should rebase these patches instead > on Rajendra's required-opps patch (which is going in this window). > Ok. Thanks. I'll drop it from my queue for now.
On Sun, 29 Aug 2021 at 06:51, Stephen Boyd <sboyd@kernel.org> wrote: > > Quoting Dmitry Baryshkov (2021-08-26 14:56:23) > > On 26/08/2021 21:31, Stephen Boyd wrote: > > > Quoting Dmitry Baryshkov (2021-07-27 13:19:56) > > >> On SM8250 both the display and video clock controllers are powered up by > > >> the MMCX power domain. Handle this by linking clock controllers to the > > >> proper power domain, and using runtime power management to enable and > > >> disable the MMCX power domain. > > >> > > >> Dependencies: > > >> - https://lore.kernel.org/linux-arm-msm/20210703005416.2668319-1-bjorn.andersson@linaro.org/ > > >> (pending) > > > > > > Does this patch series need to go through the qcom tree? Presumably the > > > dependency is going through qcom -> arm-soc > > > > It looks like Bjorn did not apply his patches in the for-5.15 series, so > > we'd have to wait anyway. Probably I should rebase these patches instead > > on Rajendra's required-opps patch (which is going in this window). > > > > Ok. Thanks. I'll drop it from my queue for now. Just for the reference. I've sent v7 of this patchset. After thinking more about power domains relationship, I think we have a hole in the abstraction here. Currently subdomains cause power domains to be powered up, but do not dictate the performance level the parent domain should be working in. While this does not look like an issue for the gdsc (and thus it can be easily solved by the Bjorn's patches, which enforce rpmhpd to be powered on to 'at least lowest possible' performance state, this might be not the case for the future links. I think at some point the pd_add_subdomain() interface should be extended with the ability to specify minimum required performance state when the link becomes on. Until that time I have changed code to enforce having clock controller in pm resume state when gdsc is enabled, thus CC itself votes on parent's (rpmhpd) performance state. -- With best wishes Dmitry
On Tue, 7 Sept 2021 at 17:34, Ulf Hansson <ulf.hansson@linaro.org> wrote: > > On Sun, 29 Aug 2021 at 17:54, Dmitry Baryshkov > <dmitry.baryshkov@linaro.org> wrote: > > > > On Sun, 29 Aug 2021 at 06:51, Stephen Boyd <sboyd@kernel.org> wrote: > > > > > > Quoting Dmitry Baryshkov (2021-08-26 14:56:23) > > > > On 26/08/2021 21:31, Stephen Boyd wrote: > > > > > Quoting Dmitry Baryshkov (2021-07-27 13:19:56) > > > > >> On SM8250 both the display and video clock controllers are powered up by > > > > >> the MMCX power domain. Handle this by linking clock controllers to the > > > > >> proper power domain, and using runtime power management to enable and > > > > >> disable the MMCX power domain. > > > > >> > > > > >> Dependencies: > > > > >> - https://lore.kernel.org/linux-arm-msm/20210703005416.2668319-1-bjorn.andersson@linaro.org/ > > > > >> (pending) > > > > > > > > > > Does this patch series need to go through the qcom tree? Presumably the > > > > > dependency is going through qcom -> arm-soc > > > > > > > > It looks like Bjorn did not apply his patches in the for-5.15 series, so > > > > we'd have to wait anyway. Probably I should rebase these patches instead > > > > on Rajendra's required-opps patch (which is going in this window). > > > > > > > > > > Ok. Thanks. I'll drop it from my queue for now. > > > > Just for the reference. I've sent v7 of this patchset. After thinking > > more about power domains relationship, I think we have a hole in the > > abstraction here. Currently subdomains cause power domains to be > > powered up, but do not dictate the performance level the parent domain > > should be working in. > > That's not entirely true. In genpd_add_subdomain() we verify that if > the child is powered on, the parent must already be powered on, > otherwise we treat this a bad setup and return an error code. > > What seems to be missing though, is that if there is a performance > state applied for the child domain, that should be propagated to the > parent domain too. Right? > > > While this does not look like an issue for the > > gdsc (and thus it can be easily solved by the Bjorn's patches, which > > enforce rpmhpd to be powered on to 'at least lowest possible' > > performance state, this might be not the case for the future links. I > > think at some point the pd_add_subdomain() interface should be > > extended with the ability to specify minimum required performance > > state when the link becomes on. > > I guess that minimum performance state could be considered as a > "required-opp" in the DT node for the power-domain provider, no? Yes, up to some point. But this enforces a particular driver code (that I've had to change from v6 to v7). In v6 the gdsc's power_on code would pm_runtime_get() the provider device, power on the domain and the pm_runtime_put() the provider device. Thus the gdsc genpd would be powered on (keeping parent domains in the on state), but the provider device itself would be runtime-suspended (neat idea by Bjorn). However this relied on changes in rpmhpd behaviour (which still did not make it to linux-next). In v7 we have to keep the provider device in resumed state while the gdsc genpd is powered on (to keep the required-opps vote in place). I suppose that 'child requires minimum parent's performance state' might become common property at some point, allowing us to drop this pm_runtime handling. > Another option would simply be to manage this solely in the > platform/soc specific genpd provider. Would that work? Yes, I've had this in the very old iteration of mmcx fixup patchset (even before mmcx-regulator came into play). It ended up with quite an ugly piece of code. > > > Until that time I have changed code to > > enforce having clock controller in pm resume state when gdsc is > > enabled, thus CC itself votes on parent's (rpmhpd) performance state. > > > > > > -- > > With best wishes > > Dmitry > > Kind regards > Uffe -- With best wishes Dmitry