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[1/2] dt-bindings: opp: qcom-opp: Convert to DT schema

Message ID 20210901155559.627491-1-angelogioacchino.delregno@somainline.org
State New
Headers show
Series [1/2] dt-bindings: opp: qcom-opp: Convert to DT schema | expand

Commit Message

AngeloGioacchino Del Regno Sept. 1, 2021, 3:55 p.m. UTC
Rewrite the qcom-opp as qcom-level-opp in dt schema format.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
---
 .../bindings/opp/qcom-level-opp.yaml          | 68 +++++++++++++++++++
 .../devicetree/bindings/opp/qcom-opp.txt      | 19 ------
 2 files changed, 68 insertions(+), 19 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/opp/qcom-level-opp.yaml
 delete mode 100644 Documentation/devicetree/bindings/opp/qcom-opp.txt

Comments

Rob Herring (Arm) Sept. 2, 2021, 7:16 p.m. UTC | #1
On Wed, Sep 01, 2021 at 05:55:59PM +0200, AngeloGioacchino Del Regno wrote:
> This adds a binding documenting operating-points-v2-kryo-cpu in a
> qcom-cpu-opp.yaml file. Logic is to add any new Qualcomm SoCs CPU
> related OPP compatibles in here.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
> ---
>  .../devicetree/bindings/opp/qcom-cpu-opp.yaml | 68 +++++++++++++++++++
>  1 file changed, 68 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/opp/qcom-cpu-opp.yaml
> 
> diff --git a/Documentation/devicetree/bindings/opp/qcom-cpu-opp.yaml b/Documentation/devicetree/bindings/opp/qcom-cpu-opp.yaml
> new file mode 100644
> index 000000000000..b4d83b64228c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/opp/qcom-cpu-opp.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: GPL-2.0

As checkpatch says, dual license.

> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/opp/qcom-cpu-opp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Technologies, Inc. CPU OPP bindings
> +
> +maintainers:
> +  - Ilia Lin <ilia.lin@kernel.org>
> +
> +allOf:
> +  - $ref: opp-v2-base.yaml#
> +
> +properties:
> +  compatible:
> +    const: operating-points-v2-kryo-cpu
> +
> +  nvmem-cells:
> +    description: |
> +      A phandle pointing to a nvmem-cells node representing the efuse
> +      registers that has information about the speedbin that is used
> +      to select the right frequency/voltage value pair.
> +    maxItems: 1
> +
> +  opp-shared: true
> +
> +required:
> +  - compatible
> +
> +patternProperties:
> +  '^opp-?[0-9]+$':
> +    type: object
> +
> +    properties:
> +      clock-latency-ns: true
> +      opp-hz: true
> +      opp-microvolt: true
> +      opp-supported-hw: true
> +      required-opps: true
> +
> +    required:
> +      - opp-hz
> +
> +    unevaluatedProperties: false
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    cpu_opp_table: opp-table-cpu {
> +        compatible = "operating-points-v2-kryo-cpu";
> +        opp-shared;
> +
> +        opp-1094400000 {
> +            opp-hz = /bits/ 64 <1094400000>;
> +            required-opps = <&cpr_opp1>;
> +        };
> +        opp-1248000000 {
> +            opp-hz = /bits/ 64 <1248000000>;
> +            required-opps = <&cpr_opp2>;
> +        };
> +        opp-1401600000 {
> +            opp-hz = /bits/ 64 <1401600000>;
> +            required-opps = <&cpr_opp3>;
> +        };
> +    };
> +...
> -- 
> 2.32.0
> 
>
Rob Herring (Arm) Sept. 2, 2021, 7:19 p.m. UTC | #2
On Wed, Sep 01, 2021 at 05:55:58PM +0200, AngeloGioacchino Del Regno wrote:
> Rewrite the qcom-opp as qcom-level-opp in dt schema format.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
> ---
>  .../bindings/opp/qcom-level-opp.yaml          | 68 +++++++++++++++++++
>  .../devicetree/bindings/opp/qcom-opp.txt      | 19 ------
>  2 files changed, 68 insertions(+), 19 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/opp/qcom-level-opp.yaml
>  delete mode 100644 Documentation/devicetree/bindings/opp/qcom-opp.txt
> 
> diff --git a/Documentation/devicetree/bindings/opp/qcom-level-opp.yaml b/Documentation/devicetree/bindings/opp/qcom-level-opp.yaml
> new file mode 100644
> index 000000000000..65dd2d5d9566
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/opp/qcom-level-opp.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: GPL-2.0

This one of course came from default GPL2 source, but I'm sure the 
authors are QCom/Linaro and they would be happy to dual license.

> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/opp/qcom-level-opp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm OPP bindings for fuse and voltage level OPPs
> +
> +maintainers:
> +  - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
> +  - Niklas Cassel <niklas.cassel@linaro.org>
> +
> +allOf:
> +  - $ref: opp-v2-base.yaml#
> +
> +properties:
> +  compatible:
> +    const: operating-points-v2-qcom-level
> +
> +  opp-shared: true
> +
> +required:
> +  - compatible
> +
> +patternProperties:
> +  '^opp-?[0-9]+$':
> +    type: object
> +
> +    properties:
> +      opp-level: true
> +      qcom,opp-fuse-level:
> +        description:
> +          At least one positive value representing the fuse corner or level
> +          associated with this OPP node. In case this is used for CPR >=v3,
> +          multiple array entries are referring to different CPR threads.
> +          Sometimes several corners/levels shares a certain fuse
> +          corner/level. A fuse corner/level contains e.g. ref uV, min uV,
> +          and max uV.
> +        $ref: /schemas/types.yaml#/definitions/uint32-array
> +
> +    required:
> +      - opp-level
> +      - qcom,opp-fuse-level
> +
> +    unevaluatedProperties: false
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    cpr_opp_table: opp-table-cpr {
> +        compatible = "operating-points-v2-qcom-level";
> +
> +        cpr_opp1: opp1 {
> +            opp-level = <1>;
> +            qcom,opp-fuse-level = <1>;
> +        };
> +        cpr_opp2: opp2 {
> +            opp-level = <2>;
> +            qcom,opp-fuse-level = <2>;
> +        };
> +        cpr_opp3: opp3 {
> +            opp-level = <3>;
> +            qcom,opp-fuse-level = <3>;
> +        };
> +    };
> +
> +...
> diff --git a/Documentation/devicetree/bindings/opp/qcom-opp.txt b/Documentation/devicetree/bindings/opp/qcom-opp.txt
> deleted file mode 100644
> index 41d3e4ff2dc3..000000000000
> --- a/Documentation/devicetree/bindings/opp/qcom-opp.txt
> +++ /dev/null
> @@ -1,19 +0,0 @@
> -Qualcomm OPP bindings to describe OPP nodes
> -
> -The bindings are based on top of the operating-points-v2 bindings
> -described in Documentation/devicetree/bindings/opp/opp-v2-base.yaml
> -Additional properties are described below.
> -
> -* OPP Table Node
> -
> -Required properties:
> -- compatible: Allow OPPs to express their compatibility. It should be:
> -  "operating-points-v2-qcom-level"
> -
> -* OPP Node
> -
> -Required properties:
> -- qcom,opp-fuse-level: A positive value representing the fuse corner/level
> -  associated with this OPP node. Sometimes several corners/levels shares
> -  a certain fuse corner/level. A fuse corner/level contains e.g. ref uV,
> -  min uV, and max uV.
> -- 
> 2.32.0
> 
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/opp/qcom-level-opp.yaml b/Documentation/devicetree/bindings/opp/qcom-level-opp.yaml
new file mode 100644
index 000000000000..65dd2d5d9566
--- /dev/null
+++ b/Documentation/devicetree/bindings/opp/qcom-level-opp.yaml
@@ -0,0 +1,68 @@ 
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/opp/qcom-level-opp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm OPP bindings for fuse and voltage level OPPs
+
+maintainers:
+  - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
+  - Niklas Cassel <niklas.cassel@linaro.org>
+
+allOf:
+  - $ref: opp-v2-base.yaml#
+
+properties:
+  compatible:
+    const: operating-points-v2-qcom-level
+
+  opp-shared: true
+
+required:
+  - compatible
+
+patternProperties:
+  '^opp-?[0-9]+$':
+    type: object
+
+    properties:
+      opp-level: true
+      qcom,opp-fuse-level:
+        description:
+          At least one positive value representing the fuse corner or level
+          associated with this OPP node. In case this is used for CPR >=v3,
+          multiple array entries are referring to different CPR threads.
+          Sometimes several corners/levels shares a certain fuse
+          corner/level. A fuse corner/level contains e.g. ref uV, min uV,
+          and max uV.
+        $ref: /schemas/types.yaml#/definitions/uint32-array
+
+    required:
+      - opp-level
+      - qcom,opp-fuse-level
+
+    unevaluatedProperties: false
+
+additionalProperties: false
+
+examples:
+  - |
+    cpr_opp_table: opp-table-cpr {
+        compatible = "operating-points-v2-qcom-level";
+
+        cpr_opp1: opp1 {
+            opp-level = <1>;
+            qcom,opp-fuse-level = <1>;
+        };
+        cpr_opp2: opp2 {
+            opp-level = <2>;
+            qcom,opp-fuse-level = <2>;
+        };
+        cpr_opp3: opp3 {
+            opp-level = <3>;
+            qcom,opp-fuse-level = <3>;
+        };
+    };
+
+...
diff --git a/Documentation/devicetree/bindings/opp/qcom-opp.txt b/Documentation/devicetree/bindings/opp/qcom-opp.txt
deleted file mode 100644
index 41d3e4ff2dc3..000000000000
--- a/Documentation/devicetree/bindings/opp/qcom-opp.txt
+++ /dev/null
@@ -1,19 +0,0 @@ 
-Qualcomm OPP bindings to describe OPP nodes
-
-The bindings are based on top of the operating-points-v2 bindings
-described in Documentation/devicetree/bindings/opp/opp-v2-base.yaml
-Additional properties are described below.
-
-* OPP Table Node
-
-Required properties:
-- compatible: Allow OPPs to express their compatibility. It should be:
-  "operating-points-v2-qcom-level"
-
-* OPP Node
-
-Required properties:
-- qcom,opp-fuse-level: A positive value representing the fuse corner/level
-  associated with this OPP node. Sometimes several corners/levels shares
-  a certain fuse corner/level. A fuse corner/level contains e.g. ref uV,
-  min uV, and max uV.