diff mbox series

[4/6] usb: dwc3: Handle fractional reference clocks

Message ID 20220114233904.907918-5-sean.anderson@seco.com
State New
Headers show
Series usb: dwc3: Calculate REFCLKPER et. al. from reference clock | expand

Commit Message

Sean Anderson Jan. 14, 2022, 11:39 p.m. UTC 
GUCTL.REFCLKPER can only account for clock frequencies with integer
periods. To address this, program REFCLK_FLADJ with the relative error
caused by period truncation. The formula given in the register reference
has been rearranged to allow calculation based on rate (instead of
period), and to allow for fixed-point arithmetic.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---

 drivers/usb/dwc3/core.c | 25 +++++++++++++++++++++++--
 drivers/usb/dwc3/core.h |  1 +
 2 files changed, 24 insertions(+), 2 deletions(-)

Comments

Robert Hancock Jan. 15, 2022, 1:09 a.m. UTC | #1 
On Fri, 2022-01-14 at 18:39 -0500, Sean Anderson wrote:
> GUCTL.REFCLKPER can only account for clock frequencies with integer
> periods. To address this, program REFCLK_FLADJ with the relative error
> caused by period truncation. The formula given in the register reference
> has been rearranged to allow calculation based on rate (instead of
> period), and to allow for fixed-point arithmetic.
> 
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
> 
>  drivers/usb/dwc3/core.c | 25 +++++++++++++++++++++++--
>  drivers/usb/dwc3/core.h |  1 +
>  2 files changed, 24 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index 5214daceda86..48bb3e42cdd0 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -348,7 +348,7 @@ static void dwc3_frame_length_adjustment(struct dwc3
> *dwc)
>  static void dwc3_ref_clk_period(struct dwc3 *dwc)
>  {
>  	u32 reg;
> -	unsigned long rate, period;
> +	unsigned long fladj, rate, period;
>  
>  	if (dwc->ref_clk) {
>  		rate = clk_get_rate(dwc->ref_clk);
> @@ -357,16 +357,37 @@ static void dwc3_ref_clk_period(struct dwc3 *dwc)
>  		period = NSEC_PER_SEC / rate;
>  	} else if (dwc->ref_clk_per) {
>  		period = dwc->ref_clk_per;
> +		rate = NSEC_PER_SEC / period;
>  	} else {
>  		return;
>  	}
>  
> +	/*
> +	 * The calculation below is
> +	 *
> +	 * 125000 * (NSEC_PER_SEC / (rate * period) - 1)
> +	 *
> +	 * but rearranged for fixed-point arithmetic.
> +	 *
> +	 * Note that rate * period ~= NSEC_PER_SECOND, minus the number of
> +	 * nanoseconds of error caused by the truncation which happened during
> +	 * the division when calculating rate or period (whichever one was
> +	 * derived from the other). We first calculate the relative error, then
> +	 * scale it to units of 0.08%.
> +	 */
> +	fladj = div64_u64(125000ULL * NSEC_PER_SEC, (u64)rate * period);
> +	fladj -= 125000;
> +
>  	reg = dwc3_readl(dwc->regs, DWC3_GUCTL);
>  	reg &= ~DWC3_GUCTL_REFCLKPER_MASK;
>  	reg |=  FIELD_PREP(DWC3_GUCTL_REFCLKPER_MASK, period);
>  	dwc3_writel(dwc->regs, DWC3_GUCTL, reg);
> -}
>  
> 

dwc3_frame_length_adjustment which also writes to the DWC3_GFLADJ register has
a conditional to skip it if DWC3_VER_IS_PRIOR(DWC3, 250A), not sure if it's
needed for this field or not?

> +	reg = dwc3_readl(dwc->regs, DWC3_GFLADJ);
> +	reg &= ~DWC3_GFLADJ_REFCLK_FLADJ_MASK;
> +	reg |= FIELD_PREP(DWC3_GFLADJ_REFCLK_FLADJ_MASK, fladj);
> +	dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
> +}
>  
>  /**
>   * dwc3_free_one_event_buffer - Frees one event buffer
> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
> index 32dfcf3a83d5..50c094af131d 100644
> --- a/drivers/usb/dwc3/core.h
> +++ b/drivers/usb/dwc3/core.h
> @@ -388,6 +388,7 @@
>  /* Global Frame Length Adjustment Register */
>  #define DWC3_GFLADJ_30MHZ_SDBND_SEL		BIT(7)
>  #define DWC3_GFLADJ_30MHZ_MASK			0x3f
> +#define DWC3_GFLADJ_REFCLK_FLADJ_MASK		GENMASK(21, 8)
>  
>  /* Global User Control Register*/
>  #define DWC3_GUCTL_REFCLKPER_MASK		0xffc00000
diff mbox series

Patch

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 5214daceda86..48bb3e42cdd0 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -348,7 +348,7 @@  static void dwc3_frame_length_adjustment(struct dwc3 *dwc)
 static void dwc3_ref_clk_period(struct dwc3 *dwc)
 {
 	u32 reg;
-	unsigned long rate, period;
+	unsigned long fladj, rate, period;
 
 	if (dwc->ref_clk) {
 		rate = clk_get_rate(dwc->ref_clk);
@@ -357,16 +357,37 @@  static void dwc3_ref_clk_period(struct dwc3 *dwc)
 		period = NSEC_PER_SEC / rate;
 	} else if (dwc->ref_clk_per) {
 		period = dwc->ref_clk_per;
+		rate = NSEC_PER_SEC / period;
 	} else {
 		return;
 	}
 
+	/*
+	 * The calculation below is
+	 *
+	 * 125000 * (NSEC_PER_SEC / (rate * period) - 1)
+	 *
+	 * but rearranged for fixed-point arithmetic.
+	 *
+	 * Note that rate * period ~= NSEC_PER_SECOND, minus the number of
+	 * nanoseconds of error caused by the truncation which happened during
+	 * the division when calculating rate or period (whichever one was
+	 * derived from the other). We first calculate the relative error, then
+	 * scale it to units of 0.08%.
+	 */
+	fladj = div64_u64(125000ULL * NSEC_PER_SEC, (u64)rate * period);
+	fladj -= 125000;
+
 	reg = dwc3_readl(dwc->regs, DWC3_GUCTL);
 	reg &= ~DWC3_GUCTL_REFCLKPER_MASK;
 	reg |=  FIELD_PREP(DWC3_GUCTL_REFCLKPER_MASK, period);
 	dwc3_writel(dwc->regs, DWC3_GUCTL, reg);
-}
 
+	reg = dwc3_readl(dwc->regs, DWC3_GFLADJ);
+	reg &= ~DWC3_GFLADJ_REFCLK_FLADJ_MASK;
+	reg |= FIELD_PREP(DWC3_GFLADJ_REFCLK_FLADJ_MASK, fladj);
+	dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
+}
 
 /**
  * dwc3_free_one_event_buffer - Frees one event buffer
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 32dfcf3a83d5..50c094af131d 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -388,6 +388,7 @@ 
 /* Global Frame Length Adjustment Register */
 #define DWC3_GFLADJ_30MHZ_SDBND_SEL		BIT(7)
 #define DWC3_GFLADJ_30MHZ_MASK			0x3f
+#define DWC3_GFLADJ_REFCLK_FLADJ_MASK		GENMASK(21, 8)
 
 /* Global User Control Register*/
 #define DWC3_GUCTL_REFCLKPER_MASK		0xffc00000