diff mbox series

[v3,10/16] tcg/mips: Remove retranslation code

Message ID 20181130215221.20554-11-richard.henderson@linaro.org
State Superseded
Headers show
Series tcg: Assorted cleanups | expand

Commit Message

Richard Henderson Nov. 30, 2018, 9:52 p.m. UTC
There is no longer a need for preserving branch offset operands,
as we no longer re-translate.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 tcg/mips/tcg-target.inc.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

-- 
2.17.2

Comments

Alex Bennée Dec. 3, 2018, 10:39 a.m. UTC | #1
Richard Henderson <richard.henderson@linaro.org> writes:

> There is no longer a need for preserving branch offset operands,

> as we no longer re-translate.

>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Reviewed-by: Alex Bennée <alex.bennee@linaro.org>


> ---

>  tcg/mips/tcg-target.inc.c | 7 +------

>  1 file changed, 1 insertion(+), 6 deletions(-)

>

> diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c

> index cff525373b..e21cb1ae28 100644

> --- a/tcg/mips/tcg-target.inc.c

> +++ b/tcg/mips/tcg-target.inc.c

> @@ -483,12 +483,7 @@ static inline void tcg_out_opc_bf64(TCGContext *s, MIPSInsn opc, MIPSInsn opm,

>  static inline void tcg_out_opc_br(TCGContext *s, MIPSInsn opc,

>                                    TCGReg rt, TCGReg rs)

>  {

> -    /* We pay attention here to not modify the branch target by reading

> -       the existing value and using it again. This ensure that caches and

> -       memory are kept coherent during retranslation. */

> -    uint16_t offset = (uint16_t)*s->code_ptr;

> -

> -    tcg_out_opc_imm(s, opc, rt, rs, offset);

> +    tcg_out_opc_imm(s, opc, rt, rs, 0);

>  }

>

>  /*



--
Alex Bennée
diff mbox series

Patch

diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
index cff525373b..e21cb1ae28 100644
--- a/tcg/mips/tcg-target.inc.c
+++ b/tcg/mips/tcg-target.inc.c
@@ -483,12 +483,7 @@  static inline void tcg_out_opc_bf64(TCGContext *s, MIPSInsn opc, MIPSInsn opm,
 static inline void tcg_out_opc_br(TCGContext *s, MIPSInsn opc,
                                   TCGReg rt, TCGReg rs)
 {
-    /* We pay attention here to not modify the branch target by reading
-       the existing value and using it again. This ensure that caches and
-       memory are kept coherent during retranslation. */
-    uint16_t offset = (uint16_t)*s->code_ptr;
-
-    tcg_out_opc_imm(s, opc, rt, rs, offset);
+    tcg_out_opc_imm(s, opc, rt, rs, 0);
 }
 
 /*