| Message ID | f9aa108f-cb0a-2cee-7fce-e2803dcadb24@free.fr |
|---|---|
| State | New |
| Headers | show |
| Series | [v4] arm64: dts: qcom: msm8998: Add PSCI cpuidle low power states | expand |
+ linux-pm On 24/05/2019 14:32, Marc Gonzalez wrote: > From: Amit Kucheria <amit.kucheria@linaro.org> > > Add device bindings for cpuidle states for cpu devices. > > [marc: rebase, fix arm,psci-suspend-param, fix entry-latency-us] > Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> > --- > Changes from v3: > - Fixup all 4 entry-latency-us (Niklas) > Changes from v2: > - Rebase > - Fixup arm,psci-suspend-param for power-collapse states (otherwise: reboot) > --- > arch/arm64/boot/dts/qcom/msm8998.dtsi | 50 +++++++++++++++++++++++++++ > 1 file changed, 50 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi > index 412195b9794c..ac6bd32c0e7d 100644 > --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi > @@ -78,6 +78,7 @@ > compatible = "arm,armv8"; > reg = <0x0 0x0>; > enable-method = "psci"; > + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; > next-level-cache = <&L2_0>; > L2_0: l2-cache { > compatible = "arm,arch-cache"; > @@ -96,6 +97,7 @@ > compatible = "arm,armv8"; > reg = <0x0 0x1>; > enable-method = "psci"; > + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; > next-level-cache = <&L2_0>; > L1_I_1: l1-icache { > compatible = "arm,arch-cache"; > @@ -110,6 +112,7 @@ > compatible = "arm,armv8"; > reg = <0x0 0x2>; > enable-method = "psci"; > + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; > next-level-cache = <&L2_0>; > L1_I_2: l1-icache { > compatible = "arm,arch-cache"; > @@ -124,6 +127,7 @@ > compatible = "arm,armv8"; > reg = <0x0 0x3>; > enable-method = "psci"; > + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; > next-level-cache = <&L2_0>; > L1_I_3: l1-icache { > compatible = "arm,arch-cache"; > @@ -138,6 +142,7 @@ > compatible = "arm,armv8"; > reg = <0x0 0x100>; > enable-method = "psci"; > + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; > next-level-cache = <&L2_1>; > L2_1: l2-cache { > compatible = "arm,arch-cache"; > @@ -156,6 +161,7 @@ > compatible = "arm,armv8"; > reg = <0x0 0x101>; > enable-method = "psci"; > + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; > next-level-cache = <&L2_1>; > L1_I_101: l1-icache { > compatible = "arm,arch-cache"; > @@ -170,6 +176,7 @@ > compatible = "arm,armv8"; > reg = <0x0 0x102>; > enable-method = "psci"; > + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; > next-level-cache = <&L2_1>; > L1_I_102: l1-icache { > compatible = "arm,arch-cache"; > @@ -184,6 +191,7 @@ > compatible = "arm,armv8"; > reg = <0x0 0x103>; > enable-method = "psci"; > + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; > next-level-cache = <&L2_1>; > L1_I_103: l1-icache { > compatible = "arm,arch-cache"; > @@ -230,6 +238,48 @@ > }; > }; > }; > + > + idle-states { > + entry-method = "psci"; > + > + LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { > + compatible = "arm,idle-state"; > + idle-state-name = "little-retention"; > + arm,psci-suspend-param = <0x00000002>; > + entry-latency-us = <81>; > + exit-latency-us = <86>; > + min-residency-us = <200>; > + }; > + > + LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 { > + compatible = "arm,idle-state"; > + idle-state-name = "little-power-collapse"; > + arm,psci-suspend-param = <0x40000003>; > + entry-latency-us = <273>; > + exit-latency-us = <612>; > + min-residency-us = <1000>; > + local-timer-stop; > + }; > + > + BIG_CPU_SLEEP_0: cpu-sleep-1-0 { > + compatible = "arm,idle-state"; > + idle-state-name = "big-retention"; > + arm,psci-suspend-param = <0x00000002>; > + entry-latency-us = <79>; > + exit-latency-us = <82>; > + min-residency-us = <200>; > + }; > + > + BIG_CPU_SLEEP_1: cpu-sleep-1-1 { > + compatible = "arm,idle-state"; > + idle-state-name = "big-power-collapse"; > + arm,psci-suspend-param = <0x40000003>; > + entry-latency-us = <336>; > + exit-latency-us = <525>; > + min-residency-us = <1000>; > + local-timer-stop; > + }; > + }; Niklas and I have been discussing the min-residency-us prop. https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/arm/idle-states.txt I thought a requirement would be min-residency > entry-latency + exit-latency but it doesn't seem to be the case. Do the values proposed here look kosher? Regards.
On Wed, May 29, 2019 at 01:08:44PM +0200, Marc Gonzalez wrote: > + linux-pm > > On 24/05/2019 14:32, Marc Gonzalez wrote: > > > From: Amit Kucheria <amit.kucheria@linaro.org> > > > > Add device bindings for cpuidle states for cpu devices. > > > > [marc: rebase, fix arm,psci-suspend-param, fix entry-latency-us] > > Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> > > Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> > > --- > > Changes from v3: > > - Fixup all 4 entry-latency-us (Niklas) > > Changes from v2: > > - Rebase > > - Fixup arm,psci-suspend-param for power-collapse states (otherwise: reboot) > > --- > > arch/arm64/boot/dts/qcom/msm8998.dtsi | 50 +++++++++++++++++++++++++++ > > 1 file changed, 50 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi > > index 412195b9794c..ac6bd32c0e7d 100644 > > --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi > > +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi > > @@ -78,6 +78,7 @@ > > compatible = "arm,armv8"; > > reg = <0x0 0x0>; > > enable-method = "psci"; > > + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; > > next-level-cache = <&L2_0>; > > L2_0: l2-cache { > > compatible = "arm,arch-cache"; > > @@ -96,6 +97,7 @@ > > compatible = "arm,armv8"; > > reg = <0x0 0x1>; > > enable-method = "psci"; > > + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; > > next-level-cache = <&L2_0>; > > L1_I_1: l1-icache { > > compatible = "arm,arch-cache"; > > @@ -110,6 +112,7 @@ > > compatible = "arm,armv8"; > > reg = <0x0 0x2>; > > enable-method = "psci"; > > + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; > > next-level-cache = <&L2_0>; > > L1_I_2: l1-icache { > > compatible = "arm,arch-cache"; > > @@ -124,6 +127,7 @@ > > compatible = "arm,armv8"; > > reg = <0x0 0x3>; > > enable-method = "psci"; > > + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; > > next-level-cache = <&L2_0>; > > L1_I_3: l1-icache { > > compatible = "arm,arch-cache"; > > @@ -138,6 +142,7 @@ > > compatible = "arm,armv8"; > > reg = <0x0 0x100>; > > enable-method = "psci"; > > + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; > > next-level-cache = <&L2_1>; > > L2_1: l2-cache { > > compatible = "arm,arch-cache"; > > @@ -156,6 +161,7 @@ > > compatible = "arm,armv8"; > > reg = <0x0 0x101>; > > enable-method = "psci"; > > + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; > > next-level-cache = <&L2_1>; > > L1_I_101: l1-icache { > > compatible = "arm,arch-cache"; > > @@ -170,6 +176,7 @@ > > compatible = "arm,armv8"; > > reg = <0x0 0x102>; > > enable-method = "psci"; > > + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; > > next-level-cache = <&L2_1>; > > L1_I_102: l1-icache { > > compatible = "arm,arch-cache"; > > @@ -184,6 +191,7 @@ > > compatible = "arm,armv8"; > > reg = <0x0 0x103>; > > enable-method = "psci"; > > + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; > > next-level-cache = <&L2_1>; > > L1_I_103: l1-icache { > > compatible = "arm,arch-cache"; > > @@ -230,6 +238,48 @@ > > }; > > }; > > }; > > + > > + idle-states { > > + entry-method = "psci"; > > + > > + LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { > > + compatible = "arm,idle-state"; > > + idle-state-name = "little-retention"; > > + arm,psci-suspend-param = <0x00000002>; > > + entry-latency-us = <81>; > > + exit-latency-us = <86>; > > + min-residency-us = <200>; > > + }; > > + > > + LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 { > > + compatible = "arm,idle-state"; > > + idle-state-name = "little-power-collapse"; > > + arm,psci-suspend-param = <0x40000003>; > > + entry-latency-us = <273>; > > + exit-latency-us = <612>; > > + min-residency-us = <1000>; > > + local-timer-stop; > > + }; > > + > > + BIG_CPU_SLEEP_0: cpu-sleep-1-0 { > > + compatible = "arm,idle-state"; > > + idle-state-name = "big-retention"; > > + arm,psci-suspend-param = <0x00000002>; > > + entry-latency-us = <79>; > > + exit-latency-us = <82>; > > + min-residency-us = <200>; > > + }; > > + > > + BIG_CPU_SLEEP_1: cpu-sleep-1-1 { > > + compatible = "arm,idle-state"; > > + idle-state-name = "big-power-collapse"; > > + arm,psci-suspend-param = <0x40000003>; > > + entry-latency-us = <336>; > > + exit-latency-us = <525>; > > + min-residency-us = <1000>; > > + local-timer-stop; > > + }; > > + }; > > Niklas and I have been discussing the min-residency-us prop. > > https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/arm/idle-states.txt > > I thought a requirement would be > > min-residency > entry-latency + exit-latency > > but it doesn't seem to be the case. > > Do the values proposed here look kosher? As the document describes the right values should be computed by plotting energy consumption. min-residency is a worst case scenario because the energy consumed to enter an idle state depends on the system state (eg cache state), so the worst case value should be added there. Lorenzo
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 412195b9794c..ac6bd32c0e7d 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -78,6 +78,7 @@ compatible = "arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; next-level-cache = <&L2_0>; L2_0: l2-cache { compatible = "arm,arch-cache"; @@ -96,6 +97,7 @@ compatible = "arm,armv8"; reg = <0x0 0x1>; enable-method = "psci"; + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; next-level-cache = <&L2_0>; L1_I_1: l1-icache { compatible = "arm,arch-cache"; @@ -110,6 +112,7 @@ compatible = "arm,armv8"; reg = <0x0 0x2>; enable-method = "psci"; + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; next-level-cache = <&L2_0>; L1_I_2: l1-icache { compatible = "arm,arch-cache"; @@ -124,6 +127,7 @@ compatible = "arm,armv8"; reg = <0x0 0x3>; enable-method = "psci"; + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; next-level-cache = <&L2_0>; L1_I_3: l1-icache { compatible = "arm,arch-cache"; @@ -138,6 +142,7 @@ compatible = "arm,armv8"; reg = <0x0 0x100>; enable-method = "psci"; + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; next-level-cache = <&L2_1>; L2_1: l2-cache { compatible = "arm,arch-cache"; @@ -156,6 +161,7 @@ compatible = "arm,armv8"; reg = <0x0 0x101>; enable-method = "psci"; + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; next-level-cache = <&L2_1>; L1_I_101: l1-icache { compatible = "arm,arch-cache"; @@ -170,6 +176,7 @@ compatible = "arm,armv8"; reg = <0x0 0x102>; enable-method = "psci"; + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; next-level-cache = <&L2_1>; L1_I_102: l1-icache { compatible = "arm,arch-cache"; @@ -184,6 +191,7 @@ compatible = "arm,armv8"; reg = <0x0 0x103>; enable-method = "psci"; + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; next-level-cache = <&L2_1>; L1_I_103: l1-icache { compatible = "arm,arch-cache"; @@ -230,6 +238,48 @@ }; }; }; + + idle-states { + entry-method = "psci"; + + LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { + compatible = "arm,idle-state"; + idle-state-name = "little-retention"; + arm,psci-suspend-param = <0x00000002>; + entry-latency-us = <81>; + exit-latency-us = <86>; + min-residency-us = <200>; + }; + + LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 { + compatible = "arm,idle-state"; + idle-state-name = "little-power-collapse"; + arm,psci-suspend-param = <0x40000003>; + entry-latency-us = <273>; + exit-latency-us = <612>; + min-residency-us = <1000>; + local-timer-stop; + }; + + BIG_CPU_SLEEP_0: cpu-sleep-1-0 { + compatible = "arm,idle-state"; + idle-state-name = "big-retention"; + arm,psci-suspend-param = <0x00000002>; + entry-latency-us = <79>; + exit-latency-us = <82>; + min-residency-us = <200>; + }; + + BIG_CPU_SLEEP_1: cpu-sleep-1-1 { + compatible = "arm,idle-state"; + idle-state-name = "big-power-collapse"; + arm,psci-suspend-param = <0x40000003>; + entry-latency-us = <336>; + exit-latency-us = <525>; + min-residency-us = <1000>; + local-timer-stop; + }; + }; }; firmware {