[PULL,11/48] target/arm: Explicitly enable VFP short-vectors for aarch32 -cpu max

Message ID 20190613121433.5246-12-peter.maydell@linaro.org
State Accepted
Commit 973751fd798d41402d34f9f705c0c6d1633d0cda
Headers show
  • target-arm queue
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Commit Message

Peter Maydell June 13, 2019, 12:13 p.m.
At the moment our -cpu max for AArch32 supports VFP short-vectors
because we always implement them, even for CPUs which should
not have them. The following commits are going to switch to
using the correct ID-register-check to enable or disable short
vector support, so we need to turn it on explicitly for -cpu max,
because Cortex-A15 doesn't implement it.

We don't enable this for the AArch64 -cpu max, because the v8A
architecture never supports short-vectors.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

 target/arm/cpu.c | 4 ++++
 1 file changed, 4 insertions(+)



diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index c8441fc07b7..2335659a852 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2023,6 +2023,10 @@  static void arm_max_initfn(Object *obj)
     } else {
+        /* old-style VFP short-vector support */
+        cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSHVEC, 1);
         /* We don't set these in system emulation mode for the moment,
          * since we don't correctly set (all of) the ID registers to