diff mbox series

[v2] cmd: cache: Fix non-cached memory cachability

Message ID 20200428093804.20773-1-patrice.chotard@st.com
State Accepted
Commit c2a2123e33371b2dc3406789764996d4fa73aac3
Headers show
Series [v2] cmd: cache: Fix non-cached memory cachability | expand

Commit Message

Patrice CHOTARD April 28, 2020, 9:38 a.m. UTC
If dcache is switched OFF to ON state and if non-cached memory is
used, this non-cached memory must be re-declared as uncached to mmu
each time dcache is set ON.

Introduce noncached_set_region() to set this non-cached region's mmu
settings. Let architecture override it by defining it as a weak
function.

For ARM architecture, noncached_set_region() defines all noncached
region as non-cacheable.

Issue found on STM32MP1 platform using dwc_eth_qos ethernet driver,
when going from dcache OFF to dcache ON state, ethernet driver issued
TX timeout errors when performing dhcp or ping.

It can be reproduced with the following sequence:

dhcp
while true ; do
  ping 192.168.1.300 ;
  dcache off ;
  ping 192.168.1.300 ;
  dcache on ;
done

Signed-off-by: Patrice Chotard <patrice.chotard at st.com>
Cc: Marek Vasut <marex at denx.de>
Cc: Joe Hershberger <joe.hershberger at ni.com>
Cc: Ramon Fried <rfried.dev at gmail.com>
Cc: Stephen Warren <swarren at nvidia.com>

---

Changes in v2:
    - make noncached_set_region a weak function

 arch/arm/lib/cache.c | 13 ++++++++++---
 cmd/cache.c          |  5 +++++
 2 files changed, 15 insertions(+), 3 deletions(-)

Comments

Marek Vasut April 28, 2020, 9:50 a.m. UTC | #1
On 4/28/20 11:38 AM, Patrice Chotard wrote:
> If dcache is switched OFF to ON state and if non-cached memory is
> used, this non-cached memory must be re-declared as uncached to mmu
> each time dcache is set ON.
> 
> Introduce noncached_set_region() to set this non-cached region's mmu
> settings. Let architecture override it by defining it as a weak
> function.
> 
> For ARM architecture, noncached_set_region() defines all noncached
> region as non-cacheable.
> 
> Issue found on STM32MP1 platform using dwc_eth_qos ethernet driver,
> when going from dcache OFF to dcache ON state, ethernet driver issued
> TX timeout errors when performing dhcp or ping.
> 
> It can be reproduced with the following sequence:
> 
> dhcp
> while true ; do
>   ping 192.168.1.300 ;
>   dcache off ;
>   ping 192.168.1.300 ;
>   dcache on ;
> done
> 
> Signed-off-by: Patrice Chotard <patrice.chotard at st.com>
> Cc: Marek Vasut <marex at denx.de>
> Cc: Joe Hershberger <joe.hershberger at ni.com>
> Cc: Ramon Fried <rfried.dev at gmail.com>
> Cc: Stephen Warren <swarren at nvidia.com>
> 
> ---
> 
> Changes in v2:
>     - make noncached_set_region a weak function
> 
>  arch/arm/lib/cache.c | 13 ++++++++++---
>  cmd/cache.c          |  5 +++++
>  2 files changed, 15 insertions(+), 3 deletions

Reviewed-by: Marek Vasut <marex at denx.de>
Tom Rini May 7, 2020, 1:04 p.m. UTC | #2
On Tue, Apr 28, 2020 at 11:38:03AM +0200, Patrice Chotard wrote:

> If dcache is switched OFF to ON state and if non-cached memory is
> used, this non-cached memory must be re-declared as uncached to mmu
> each time dcache is set ON.
> 
> Introduce noncached_set_region() to set this non-cached region's mmu
> settings. Let architecture override it by defining it as a weak
> function.
> 
> For ARM architecture, noncached_set_region() defines all noncached
> region as non-cacheable.
> 
> Issue found on STM32MP1 platform using dwc_eth_qos ethernet driver,
> when going from dcache OFF to dcache ON state, ethernet driver issued
> TX timeout errors when performing dhcp or ping.
> 
> It can be reproduced with the following sequence:
> 
> dhcp
> while true ; do
>   ping 192.168.1.300 ;
>   dcache off ;
>   ping 192.168.1.300 ;
>   dcache on ;
> done
> 
> Signed-off-by: Patrice Chotard <patrice.chotard at st.com>
> Cc: Marek Vasut <marex at denx.de>
> Cc: Joe Hershberger <joe.hershberger at ni.com>
> Cc: Ramon Fried <rfried.dev at gmail.com>
> Cc: Stephen Warren <swarren at nvidia.com>
> Reviewed-by: Marek Vasut <marex at denx.de>

Applied to u-boot/master, thanks!
diff mbox series

Patch

diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 44dde26065..224f2aef14 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -75,6 +75,15 @@  static unsigned long noncached_start;
 static unsigned long noncached_end;
 static unsigned long noncached_next;
 
+void noncached_set_region(void)
+{
+#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
+	mmu_set_region_dcache_behaviour(noncached_start,
+					noncached_end - noncached_start,
+					DCACHE_OFF);
+#endif
+}
+
 void noncached_init(void)
 {
 	phys_addr_t start, end;
@@ -91,9 +100,7 @@  void noncached_init(void)
 	noncached_end = end;
 	noncached_next = start;
 
-#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
-	mmu_set_region_dcache_behaviour(noncached_start, size, DCACHE_OFF);
-#endif
+	noncached_set_region();
 }
 
 phys_addr_t noncached_alloc(size_t size, size_t align)
diff --git a/cmd/cache.c b/cmd/cache.c
index 27dcec0931..7678615dd8 100644
--- a/cmd/cache.c
+++ b/cmd/cache.c
@@ -20,6 +20,10 @@  void __weak invalidate_icache_all(void)
 	puts("No arch specific invalidate_icache_all available!\n");
 }
 
+__weak void noncached_set_region(void)
+{
+}
+
 static int do_icache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	switch (argc) {
@@ -64,6 +68,7 @@  static int do_dcache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 			break;
 		case 1:
 			dcache_enable();
+			noncached_set_region();
 			break;
 		case 2:
 			flush_dcache_all();