diff mbox series

[05/12] board: lx2160a: Make sure the RD tables address align to 64KB

Message ID 20200319053846.2304-6-Zhiqiang.Hou@nxp.com
State New
Headers show
Series fsl: layerscape: Initialize the GIC redistributor | expand

Commit Message

Zhiqiang Hou March 19, 2020, 5:38 a.m. UTC 
From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>

As the lower 16bit of the redistributor pending table is reserved
for describing the memory attributes, we must give a 64KB aligned
address to the GIC LPI initialization function.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
---
 board/freescale/lx2160a/lx2160a.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 30b18a75c5..f38c45ada5 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -17,6 +17,7 @@ 
 #include <asm/io.h>
 #include <fdt_support.h>
 #include <linux/libfdt.h>
+#include <linux/sizes.h>
 #include <fsl-mc/fsl_mc.h>
 #include <env_internal.h>
 #include <efi_loader.h>
@@ -663,7 +664,7 @@  int ft_board_setup(void *blob, bd_t *bd)
 	}
 
 #ifdef CONFIG_GIC_V3_ITS
-	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
+	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
 	ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
 	if (!ret) {
 		if (gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))