diff mbox series

[4/4] ARM: dts: qcom: sdx65-mtp: Enable USB3 and PHY support

Message ID 1649761414-19217-5-git-send-email-quic_rohiagar@quicinc.com
State New
Headers show
Series Devicetree updates for Interconnect, USB3 and PHY support | expand

Commit Message

Rohit Agarwal April 12, 2022, 11:03 a.m. UTC
Enable the support for USB3 controller, QMP PHY and HS PHY on SDX65 MTP.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
 arch/arm/boot/dts/qcom-sdx65-mtp.dts | 29 +++++++++++++++++++++++++----
 1 file changed, 25 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
index 79dc31a..6920524 100644
--- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts
+++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
@@ -123,7 +123,7 @@ 
 			regulator-max-microvolt = <1300000>;
 		};
 
-		ldo1 {
+		vreg_l1b_1p2: ldo1 {
 			regulator-min-microvolt = <1200000>;
 			regulator-max-microvolt = <1200000>;
 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
@@ -141,13 +141,13 @@ 
 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 		};
 
-		ldo4 {
+		vreg_l4b_0p88: ldo4 {
 			regulator-min-microvolt = <880000>;
 			regulator-max-microvolt = <912000>;
 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 		};
 
-		ldo5 {
+		vreg_l5b_1p8: ldo5 {
 			regulator-min-microvolt = <1800000>;
 			regulator-max-microvolt = <1800000>;
 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
@@ -177,7 +177,7 @@ 
 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 		};
 
-		ldo10 {
+		vreg_l10b_3p08: ldo10 {
 			regulator-min-microvolt = <3088000>;
 			regulator-max-microvolt = <3088000>;
 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
@@ -244,3 +244,24 @@ 
 		};
 	};
 };
+
+&usb {
+	status = "okay";
+};
+
+&usb_dwc3 {
+	dr_mode = "peripheral";
+};
+
+&usb_hsphy {
+	status = "okay";
+	vdda-pll-supply = <&vreg_l4b_0p88>;
+	vdda33-supply = <&vreg_l10b_3p08>;
+	vdda18-supply = <&vreg_l5b_1p8>;
+};
+
+&usb_qmpphy {
+	status = "okay";
+	vdda-phy-supply = <&vreg_l4b_0p88>;
+	vdda-pll-supply = <&vreg_l1b_1p2>;
+};