| Message ID | 20190625164733.11091-12-jorge.ramirez-ortiz@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | [v3,01/14] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency | expand |
On Tue 25 Jun 09:47 PDT 2019, Jorge Ramirez-Ortiz wrote: > The high frequency pll functionality is required to enable CPU > frequency scaling operation. > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org> > Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> > Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> > --- > arch/arm64/boot/dts/qcom/qcs404.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi > index d876dae5b0a5..94471aa31979 100644 > --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi > @@ -852,6 +852,15 @@ > #mbox-cells = <1>; > }; > > + apcs_hfpll: clock-controller@b016000 { > + compatible = "qcom,hfpll"; > + reg = <0x0b016000 0x30>; > + #clock-cells = <0>; > + clock-output-names = "apcs_hfpll"; > + clocks = <&xo_board>; > + clock-names = "xo"; > + }; > + > timer@b120000 { > #address-cells = <1>; > #size-cells = <1>; > -- > 2.21.0 >
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index d876dae5b0a5..94471aa31979 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -852,6 +852,15 @@ #mbox-cells = <1>; }; + apcs_hfpll: clock-controller@b016000 { + compatible = "qcom,hfpll"; + reg = <0x0b016000 0x30>; + #clock-cells = <0>; + clock-output-names = "apcs_hfpll"; + clocks = <&xo_board>; + clock-names = "xo"; + }; + timer@b120000 { #address-cells = <1>; #size-cells = <1>;