| Message ID | 20210819154436.117798-2-krzysztof.kozlowski@canonical.com |
|---|---|
| State | New |
| Headers | show |
| Series | [1/6] dt-bindings: riscv: correct e51 and u54-mc CPU bindings | expand |
On 24/08/2021 16:33, Rob Herring wrote: > On Thu, Aug 19, 2021 at 05:44:32PM +0200, Krzysztof Kozlowski wrote: >> The Microchip MPFS Icicle Kit uses Cadence SD/SDIO/eMMC Host Controller >> without any additional vendor compatible: > > I think the lack of vendor compatible is the error here. Experience has > shown that vendor specific compatibles are needed for licensed IP. > In such case this could be: 1. a specific "microchip,mpfs250t-sd4hc", which seems to be on MPFS Icicle Kit: https://www.digikey.co.uk/en/product-highlight/m/microchip-technology/mpfs-icicle-kit-es--polarfire-soc-fpga-icicle-kit 2. or a generic "microchip,mpfs-sd4hc" Any hints here? Best regards, Krzysztof
On 30/08/2021 16:09, Rob Herring wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On Tue, Aug 24, 2021 at 2:02 PM Krzysztof Kozlowski > <krzysztof.kozlowski@canonical.com> wrote: >> On 24/08/2021 16:33, Rob Herring wrote: >>> On Thu, Aug 19, 2021 at 05:44:32PM +0200, Krzysztof Kozlowski wrote: >>>> The Microchip MPFS Icicle Kit uses Cadence SD/SDIO/eMMC Host Controller >>>> without any additional vendor compatible: >>> I think the lack of vendor compatible is the error here. Experience has >>> shown that vendor specific compatibles are needed for licensed IP. >>> >> In such case this could be: >> 1. a specific "microchip,mpfs250t-sd4hc", which >> seems to be on MPFS Icicle Kit: >> https://www.digikey.co.uk/en/product-highlight/m/microchip-technology/mpfs-icicle-kit-es--polarfire-soc-fpga-icicle-kit >> >> 2. or a generic "microchip,mpfs-sd4hc" >> >> Any hints here? > Best for a Microchip person to answer, but sure there's some existing > compatible strings for other blocks on this chip to follow the same > pattern. > > Rob #2 would be ideal since the controller doesn't change across the part range, the 250t bit in the part name just covers the size/configuration of the FPGA. Conor > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml index af7442f73881..0489aa92cb54 100644 --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml @@ -15,9 +15,11 @@ allOf: properties: compatible: - items: - - enum: - - socionext,uniphier-sd4hc + oneOf: + - items: + - enum: + - socionext,uniphier-sd4hc + - const: cdns,sd4hc - const: cdns,sd4hc reg:
The Microchip MPFS Icicle Kit uses Cadence SD/SDIO/eMMC Host Controller without any additional vendor compatible: arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: mmc@20008000: compatible:0: 'cdns,sd4hc' is not one of ['socionext,uniphier-sd4hc'] arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: mmc@20008000: compatible: ['cdns,sd4hc'] is too short Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)