| Message ID | 20230126110833.264439-3-marcel@ziswiler.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v5,01/10] arm64: dts: freescale: imx8-ss-lsio: add support for lsio_pwm0-3 | expand |
Hi Marcel, Am Donnerstag, 26. Januar 2023, 12:08:25 CET schrieb Marcel Ziswiler: > From: Max Krummenacher <max.krummenacher@toradex.com> > > This commit adds io-channel-cells property to the ADC nodes. This > property is required in order for an IIO consumer driver to work. > Especially required for Apalis iMX8 QM, as the touchscreen driver > uses ADC channels with the ADC driver based on IIO framework. > > Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> > Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> > Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Yep, that's even required per bindings. Acked-by: Alexander Stein <alexander.stein@ew.tq-group.com> > --- > > (no changes since v3) > > Changes in v3: > - Fix subject as pointed out by Shawn. Thanks! > > arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index > a943a1e2797f..6e5ef8b69bf8 100644 > --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > @@ -270,6 +270,7 @@ i2c3: i2c@5a830000 { > > adc0: adc@5a880000 { > compatible = "nxp,imx8qxp-adc"; > + #io-channel-cells = <1>; > reg = <0x5a880000 0x10000>; > interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; > interrupt-parent = <&gic>; > @@ -284,6 +285,7 @@ adc0: adc@5a880000 { > > adc1: adc@5a890000 { > compatible = "nxp,imx8qxp-adc"; > + #io-channel-cells = <1>; > reg = <0x5a890000 0x10000>; > interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; > interrupt-parent = <&gic>;
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index a943a1e2797f..6e5ef8b69bf8 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -270,6 +270,7 @@ i2c3: i2c@5a830000 { adc0: adc@5a880000 { compatible = "nxp,imx8qxp-adc"; + #io-channel-cells = <1>; reg = <0x5a880000 0x10000>; interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&gic>; @@ -284,6 +285,7 @@ adc0: adc@5a880000 { adc1: adc@5a890000 { compatible = "nxp,imx8qxp-adc"; + #io-channel-cells = <1>; reg = <0x5a890000 0x10000>; interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&gic>;