| Message ID | 1510061722-14092-1-git-send-email-peter.maydell@linaro.org |
|---|---|
| Headers | show |
| Series | target-arm queue | expand |
On 7 November 2017 at 13:35, Peter Maydell <peter.maydell@linaro.org> wrote: > A small set of arm bugfixes for rc0. > > > > The following changes since commit 5853e92207193e967abf5e4c25b4a551c7604725: > > Merge remote-tracking branch 'remotes/pmaydell/tags/pull-cocoa-20171107' into staging (2017-11-07 12:19:48 +0000) > > are available in the git repository at: > > git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20171107 > > for you to fetch changes up to 8a7348b5d62d7ea16807e6bea54b448a0184bb0f: > > hw/intc/arm_gicv3_its: Don't abort on table save failure (2017-11-07 13:03:52 +0000) > > ---------------------------------------------------------------- > target-arm queue: > * arm_gicv3_its: Don't abort on table save failure > * arm_gicv3_its: Fix the VM termination in vm_change_state_handler() > * translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD > * hw/arm: Mark the "fsl,imx31/25/6" devices with user_creatable = false > * arm: implement cache/shareability attribute bits for PAR registers > > ---------------------------------------------------------------- > Andrew Baumann (1): > arm: implement cache/shareability attribute bits for PAR registers > > Eric Auger (1): > hw/intc/arm_gicv3_its: Don't abort on table save failure > > Peter Maydell (1): > translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD > > Shanker Donthineni (1): > hw/intc/arm_gicv3_its: Fix the VM termination in vm_change_state_handler() > > Thomas Huth (3): > hw/arm: Mark the "fsl,imx6" device with user_creatable = false > hw/arm: Mark the "fsl,imx25" device with user_creatable = false > hw/arm: Mark the "fsl,imx31" device with user_creatable = false Applied, thanks. -- PMM
A small set of arm bugfixes for rc0. The following changes since commit 5853e92207193e967abf5e4c25b4a551c7604725: Merge remote-tracking branch 'remotes/pmaydell/tags/pull-cocoa-20171107' into staging (2017-11-07 12:19:48 +0000) are available in the git repository at: git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20171107 for you to fetch changes up to 8a7348b5d62d7ea16807e6bea54b448a0184bb0f: hw/intc/arm_gicv3_its: Don't abort on table save failure (2017-11-07 13:03:52 +0000) ---------------------------------------------------------------- target-arm queue: * arm_gicv3_its: Don't abort on table save failure * arm_gicv3_its: Fix the VM termination in vm_change_state_handler() * translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD * hw/arm: Mark the "fsl,imx31/25/6" devices with user_creatable = false * arm: implement cache/shareability attribute bits for PAR registers ---------------------------------------------------------------- Andrew Baumann (1): arm: implement cache/shareability attribute bits for PAR registers Eric Auger (1): hw/intc/arm_gicv3_its: Don't abort on table save failure Peter Maydell (1): translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD Shanker Donthineni (1): hw/intc/arm_gicv3_its: Fix the VM termination in vm_change_state_handler() Thomas Huth (3): hw/arm: Mark the "fsl,imx6" device with user_creatable = false hw/arm: Mark the "fsl,imx25" device with user_creatable = false hw/arm: Mark the "fsl,imx31" device with user_creatable = false hw/arm/fsl-imx25.c | 6 +- hw/arm/fsl-imx31.c | 6 +- hw/arm/fsl-imx6.c | 3 +- hw/intc/arm_gicv3_its_kvm.c | 12 +-- target/arm/helper.c | 178 ++++++++++++++++++++++++++++++++++++++++---- target/arm/translate.c | 39 ++++++++-- 6 files changed, 214 insertions(+), 30 deletions(-)