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[PULL,0/7] target-arm queue

Message ID 20200727151920.19150-1-peter.maydell@linaro.org
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Series target-arm queue | expand

Message

Peter Maydell July 27, 2020, 3:19 p.m. UTC
Just some bugfixes this time around.

-- PMM

The following changes since commit 4215d3413272ad6d1c6c9d0234450b602e46a74c:

  Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.1-20200727' into staging (2020-07-27 09:33:04 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200727

for you to fetch changes up to d4f6dda182e19afa75706936805e18397cb95f07:

  target/arm: Improve IMPDEF algorithm for IRG (2020-07-27 16:12:11 +0100)

----------------------------------------------------------------
target-arm queue:
 * ACPI: Assert that we don't run out of the preallocated memory
 * hw/misc/aspeed_sdmc: Fix incorrect memory size
 * target/arm: Always pass cacheattr in S1_ptw_translate
 * docs/system/arm/virt: Document 'mte' machine option
 * hw/arm/boot: Fix PAUTH, MTE for EL3 direct kernel boot
 * target/arm: Improve IMPDEF algorithm for IRG

----------------------------------------------------------------
Dongjiu Geng (1):
      ACPI: Assert that we don't run out of the preallocated memory

Peter Maydell (1):
      docs/system/arm/virt: Document 'mte' machine option

Philippe Mathieu-Daudé (1):
      hw/misc/aspeed_sdmc: Fix incorrect memory size

Richard Henderson (4):
      target/arm: Always pass cacheattr in S1_ptw_translate
      hw/arm/boot: Fix PAUTH for EL3 direct kernel boot
      hw/arm/boot: Fix MTE for EL3 direct kernel boot
      target/arm: Improve IMPDEF algorithm for IRG

 docs/system/arm/virt.rst |  4 ++++
 hw/acpi/ghes.c           | 12 ++++--------
 hw/arm/boot.c            |  6 ++++++
 hw/misc/aspeed_sdmc.c    |  7 ++++---
 target/arm/helper.c      | 19 ++++++-------------
 target/arm/mte_helper.c  | 37 ++++++++++++++++++++++++++++++-------
 6 files changed, 54 insertions(+), 31 deletions(-)

Comments

Peter Maydell July 28, 2020, 6:43 p.m. UTC | #1
On Mon, 27 Jul 2020 at 16:19, Peter Maydell <peter.maydell@linaro.org> wrote:
>

> Just some bugfixes this time around.

>

> -- PMM

>

> The following changes since commit 4215d3413272ad6d1c6c9d0234450b602e46a74c:

>

>   Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.1-20200727' into staging (2020-07-27 09:33:04 +0100)

>

> are available in the Git repository at:

>

>   https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200727

>

> for you to fetch changes up to d4f6dda182e19afa75706936805e18397cb95f07:

>

>   target/arm: Improve IMPDEF algorithm for IRG (2020-07-27 16:12:11 +0100)

>

> ----------------------------------------------------------------

> target-arm queue:

>  * ACPI: Assert that we don't run out of the preallocated memory

>  * hw/misc/aspeed_sdmc: Fix incorrect memory size

>  * target/arm: Always pass cacheattr in S1_ptw_translate

>  * docs/system/arm/virt: Document 'mte' machine option

>  * hw/arm/boot: Fix PAUTH, MTE for EL3 direct kernel boot

>  * target/arm: Improve IMPDEF algorithm for IRG

>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
for any user-visible changes.

-- PMM