Show patches with: Submitter = Greg Bellows       |    Archived = No       |   403 patches
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Patch Series S/W/F Date Submitter Delegate State
[v4,01/33] target-arm: add cpu feature EL3 to CPUs with Security Extensions --- 2014-06-30 Greg Bellows Superseded
[v4,03/33] target-arm: increase arrays of registers R13 & R14 --- 2014-06-30 Greg Bellows Superseded
[v4,05/33] target-arm: reject switching to monitor mode --- 2014-06-30 Greg Bellows Superseded
[v4,13/33] target-arm: implement IRQ/FIQ routing to Monitor mode --- 2014-06-30 Greg Bellows Superseded
[v5,01/33] target-arm: increase arrays of registers R13 & R14 --- 2014-09-30 Greg Bellows Superseded
[v5,03/33] target-arm: reject switching to monitor mode --- 2014-09-30 Greg Bellows Superseded
[v5,14/33] target-arm: implement IRQ/FIQ routing to Monitor mode --- 2014-09-30 Greg Bellows Superseded
[v5,33/33] target-arm: add cpu feature EL3 to CPUs with Security Extensions --- 2014-09-30 Greg Bellows Superseded
[v6,03/32] target-arm: reject switching to monitor mode --- 2014-10-10 Greg Bellows Superseded
[v6,15/32] target-arm: implement IRQ/FIQ routing to Monitor mode --- 2014-10-10 Greg Bellows Superseded
[v6,32/32] target-arm: add cpu feature EL3 to CPUs with Security Extensions --- 2014-10-10 Greg Bellows Superseded
[v7,03/32] target-arm: reject switching to monitor mode --- 2014-10-21 Greg Bellows Superseded
[v7,15/32] target-arm: implement IRQ/FIQ routing to Monitor mode --- 2014-10-21 Greg Bellows Superseded
[v7,32/32] target-arm: add cpu feature EL3 to CPUs with Security Extensions --- 2014-10-21 Greg Bellows Superseded
[v8,03/27] target-arm: add banked register accessors --- 2014-10-30 Greg Bellows Superseded
[v8,04/27] target-arm: add non-secure Translation Block flag --- 2014-10-30 Greg Bellows Superseded
[v8,09/27] target-arm: implement IRQ/FIQ routing to Monitor mode --- 2014-10-30 Greg Bellows Superseded
[v8,27/27] target-arm: add cpu feature EL3 to CPUs with Security Extensions --- 2014-10-30 Greg Bellows Superseded
[v9,02/26] target-arm: add async excp target_el function --- 2014-11-05 Greg Bellows Superseded
[v9,03/26] target-arm: add banked register accessors --- 2014-11-05 Greg Bellows Superseded
[v9,04/26] target-arm: add non-secure Translation Block flag --- 2014-11-05 Greg Bellows Superseded
[v9,05/26] target-arm: add CPREG secure state support --- 2014-11-05 Greg Bellows Superseded
[v9,08/26] target-arm: move AArch32 SCR into security reglist --- 2014-11-05 Greg Bellows Superseded
[v9,09/26] target-arm: implement IRQ/FIQ routing to Monitor mode --- 2014-11-05 Greg Bellows Superseded
[v9,10/26] target-arm: add NSACR register --- 2014-11-05 Greg Bellows Superseded
[v9,11/26] target-arm: add SDER definition --- 2014-11-05 Greg Bellows Superseded
[v9,15/26] target-arm: make CSSELR banked --- 2014-11-05 Greg Bellows Superseded
[v9,16/26] target-arm: make TTBR0/1 banked --- 2014-11-05 Greg Bellows Superseded
[v9,18/26] target-arm: make DACR banked --- 2014-11-05 Greg Bellows Superseded
[v9,19/26] target-arm: make IFSR banked --- 2014-11-05 Greg Bellows Superseded
[v9,20/26] target-arm: make DFSR banked --- 2014-11-05 Greg Bellows Superseded
[v9,21/26] target-arm: make IFAR/DFAR banked --- 2014-11-05 Greg Bellows Superseded
[v9,22/26] target-arm: make PAR banked --- 2014-11-05 Greg Bellows Superseded
[v9,23/26] target-arm: make VBAR banked --- 2014-11-05 Greg Bellows Superseded
[v9,24/26] target-arm: make c13 cp regs banked (FCSEIDR, ...) --- 2014-11-05 Greg Bellows Superseded
[v9,25/26] target-arm: make MAIR0/1 banked --- 2014-11-05 Greg Bellows Superseded
[v9,26/26] target-arm: add cpu feature EL3 to CPUs with Security Extensions --- 2014-11-05 Greg Bellows Superseded
[v10,02/26] target-arm: add async excp target_el function --- 2014-11-06 Greg Bellows Superseded
[v10,03/26] target-arm: add banked register accessors --- 2014-11-06 Greg Bellows Superseded
[v10,04/26] target-arm: add non-secure Translation Block flag --- 2014-11-06 Greg Bellows Superseded
[v10,05/26] target-arm: add CPREG secure state support --- 2014-11-06 Greg Bellows Superseded
[v10,08/26] target-arm: move AArch32 SCR into security reglist --- 2014-11-06 Greg Bellows Superseded
[v10,09/26] target-arm: implement IRQ/FIQ routing to Monitor mode --- 2014-11-06 Greg Bellows Superseded
[v10,10/26] target-arm: add NSACR register --- 2014-11-06 Greg Bellows Superseded
[v10,11/26] target-arm: add SDER definition --- 2014-11-06 Greg Bellows Superseded
[v10,12/26] target-arm: add MVBAR support --- 2014-11-06 Greg Bellows Superseded
[v10,13/26] target-arm: add SCTLR_EL3 and make SCTLR banked --- 2014-11-06 Greg Bellows Superseded
[v10,15/26] target-arm: make CSSELR banked --- 2014-11-06 Greg Bellows Superseded
[v10,16/26] target-arm: make TTBR0/1 banked --- 2014-11-06 Greg Bellows Superseded
[v10,18/26] target-arm: make DACR banked --- 2014-11-06 Greg Bellows Superseded
[v10,19/26] target-arm: make IFSR banked --- 2014-11-06 Greg Bellows Superseded
[v10,20/26] target-arm: make DFSR banked --- 2014-11-06 Greg Bellows Superseded
[v10,21/26] target-arm: make IFAR/DFAR banked --- 2014-11-06 Greg Bellows Superseded
[v10,22/26] target-arm: make PAR banked --- 2014-11-06 Greg Bellows Superseded
[v10,23/26] target-arm: make VBAR banked --- 2014-11-06 Greg Bellows Superseded
[v10,24/26] target-arm: make c13 cp regs banked (FCSEIDR, ...) --- 2014-11-06 Greg Bellows Superseded
[v10,25/26] target-arm: make MAIR0/1 banked --- 2014-11-06 Greg Bellows Superseded
[v10,26/26] target-arm: add cpu feature EL3 to CPUs with Security Extensions --- 2014-11-06 Greg Bellows Superseded
[v11,01/26] target-arm: extend async excp masking --- 2014-11-17 Greg Bellows Superseded
[v11,02/26] target-arm: add async excp target_el function --- 2014-11-17 Greg Bellows Superseded
[v11,03/26] target-arm: add banked register accessors --- 2014-11-17 Greg Bellows Superseded
[v11,04/26] target-arm: add non-secure Translation Block flag --- 2014-11-17 Greg Bellows Superseded
[v11,05/26] target-arm: add CPREG secure state support --- 2014-11-17 Greg Bellows Superseded
[v11,07/26] target-arm: insert AArch32 cpregs twice into hashtable --- 2014-11-17 Greg Bellows Superseded
[v11,08/26] target-arm: move AArch32 SCR into security reglist --- 2014-11-17 Greg Bellows Superseded
[v11,09/26] target-arm: implement IRQ/FIQ routing to Monitor mode --- 2014-11-17 Greg Bellows Superseded
[v11,10/26] target-arm: add NSACR register --- 2014-11-17 Greg Bellows Superseded
[v11,11/26] target-arm: add SDER definition --- 2014-11-17 Greg Bellows Superseded
[v11,12/26] target-arm: add MVBAR support --- 2014-11-17 Greg Bellows Superseded
[v11,13/26] target-arm: add SCTLR_EL3 and make SCTLR banked --- 2014-11-17 Greg Bellows Superseded
[v11,14/26] target-arm: respect SCR.FW, SCR.AW and SCTLR.NMFI --- 2014-11-17 Greg Bellows Superseded
[v11,15/26] target-arm: make CSSELR banked --- 2014-11-17 Greg Bellows Superseded
[v11,16/26] target-arm: make TTBR0/1 banked --- 2014-11-17 Greg Bellows Superseded
[v11,17/26] target-arm: make TTBCR banked --- 2014-11-17 Greg Bellows Superseded
[v11,18/26] target-arm: make DACR banked --- 2014-11-17 Greg Bellows Superseded
[v11,19/26] target-arm: make IFSR banked --- 2014-11-17 Greg Bellows Superseded
[v11,20/26] target-arm: make DFSR banked --- 2014-11-17 Greg Bellows Superseded
[v11,21/26] target-arm: make IFAR/DFAR banked --- 2014-11-17 Greg Bellows Superseded
[v11,22/26] target-arm: make PAR banked --- 2014-11-17 Greg Bellows Superseded
[v11,23/26] target-arm: make VBAR banked --- 2014-11-17 Greg Bellows Superseded
[v11,24/26] target-arm: make c13 cp regs banked (FCSEIDR, ...) --- 2014-11-17 Greg Bellows Superseded
[v11,25/26] target-arm: make MAIR0/1 banked --- 2014-11-17 Greg Bellows Superseded
[v11,26/26] target-arm: add cpu feature EL3 to CPUs with Security Extensions --- 2014-11-17 Greg Bellows Superseded
[02/13] target-arm: Add vexpress a9 & a15 machine objects --- 2014-12-03 Greg Bellows Superseded
[03/13] target-arm: Switch to common vexpress machine init --- 2014-12-03 Greg Bellows Superseded
[06/13] target-arm: Change vexpress daughterboard init arg --- 2014-12-03 Greg Bellows Superseded
[07/13] target-arm: Add virt class and machine types --- 2014-12-03 Greg Bellows Superseded
[09/13] target-arm: Add feature unset function --- 2014-12-03 Greg Bellows Superseded
[13/13] target-arm: add cpu feature EL3 to CPUs with Security Extensions --- 2014-12-03 Greg Bellows Superseded
[v2,01/15] target-arm: Add vexpress class and machine types --- 2014-12-11 Greg Bellows Superseded
[v2,02/15] target-arm: Add vexpress a9 & a15 machine objects --- 2014-12-11 Greg Bellows Superseded
[v2,03/15] target-arm: Switch to common vexpress machine init --- 2014-12-11 Greg Bellows Superseded
[v2,05/15] target-arm: Change vexpress daughterboard init arg --- 2014-12-11 Greg Bellows Superseded
[v2,06/15] target-arm: Add virt class and machine types --- 2014-12-11 Greg Bellows Superseded
[v2,08/15] target-arm: Add feature unset function --- 2014-12-11 Greg Bellows Superseded
[v2,13/15] target-arm: Breakout integratorcp and versatilepb cpu init --- 2014-12-11 Greg Bellows Superseded
[v2,14/15] target-arm: Disable EL3 on unsupported machines --- 2014-12-11 Greg Bellows Superseded
[v2,15/15] target-arm: add cpu feature EL3 to CPUs with Security Extensions --- 2014-12-11 Greg Bellows Superseded
[v3,01/15] target-arm: Add vexpress class and machine types --- 2014-12-15 Greg Bellows Superseded
[v3,02/15] target-arm: Add vexpress a9 & a15 machine objects --- 2014-12-15 Greg Bellows Superseded
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