| Message ID | 20180810193129.1556-7-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/arm: More sve-ish fixes | expand |
On Fri, Aug 10, 2018 at 9:31 PM, Richard Henderson <richard.henderson@linaro.org> wrote: > For 0x1.0000000000003p+0 + 0x1.ffffffep+14 = 0x1.0001fffp+15 > we dropped the sticky bit and so failed to raise inexact. > > Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Laurent > --- > fpu/softfloat.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/fpu/softfloat.c b/fpu/softfloat.c > index 8cd2400081..7d63cffdeb 100644 > --- a/fpu/softfloat.c > +++ b/fpu/softfloat.c > @@ -701,7 +701,7 @@ static FloatParts addsub_floats(FloatParts a, FloatParts b, bool subtract, > } > a.frac += b.frac; > if (a.frac & DECOMPOSED_OVERFLOW_BIT) { > - a.frac >>= 1; > + shift64RightJamming(a.frac, 1, &a.frac); > a.exp += 1; > } > return a; > -- > 2.17.1 >
diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 8cd2400081..7d63cffdeb 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -701,7 +701,7 @@ static FloatParts addsub_floats(FloatParts a, FloatParts b, bool subtract, } a.frac += b.frac; if (a.frac & DECOMPOSED_OVERFLOW_BIT) { - a.frac >>= 1; + shift64RightJamming(a.frac, 1, &a.frac); a.exp += 1; } return a;
For 0x1.0000000000003p+0 + 0x1.ffffffep+14 = 0x1.0001fffp+15 we dropped the sticky bit and so failed to raise inexact. Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- fpu/softfloat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1