| Message ID | 20190819213755.26175-45-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/arm: Convert aa32 base isa to decodetree | expand |
On 8/19/19 11:37 PM, Richard Henderson wrote: > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> > --- > target/arm/translate.c | 6 ++++++ > target/arm/Makefile.objs | 6 ++++++ > target/arm/t16.decode | 20 ++++++++++++++++++++ > 3 files changed, 32 insertions(+) > create mode 100644 target/arm/t16.decode > > diff --git a/target/arm/translate.c b/target/arm/translate.c > index 49bab7d863..90d608a2d2 100644 > --- a/target/arm/translate.c > +++ b/target/arm/translate.c > @@ -7538,6 +7538,7 @@ static int t32_branch24(DisasContext *s, int x) > #include "decode-a32.inc.c" > #include "decode-a32-uncond.inc.c" > #include "decode-t32.inc.c" > +#include "decode-t16.inc.c" > > /* Helpers to swap operands for reverse-subtract. */ > static void gen_rsb(TCGv_i32 dst, TCGv_i32 a, TCGv_i32 b) > @@ -10550,6 +10551,11 @@ static void disas_thumb_insn(DisasContext *s, uint32_t insn) > TCGv_i32 tmp2; > TCGv_i32 addr; > > + if (disas_t16(s, insn)) { > + return; > + } > + /* fall back to legacy decoder */ > + > switch (insn >> 12) { > case 0: case 1: > > diff --git a/target/arm/Makefile.objs b/target/arm/Makefile.objs > index 7806b4dac0..cf26c16f5f 100644 > --- a/target/arm/Makefile.objs > +++ b/target/arm/Makefile.objs > @@ -43,12 +43,18 @@ target/arm/decode-t32.inc.c: $(SRC_PATH)/target/arm/t32.decode $(DECODETREE) > $(PYTHON) $(DECODETREE) --static-decode disas_t32 -o $@ $<,\ > "GEN", $(TARGET_DIR)$@) > > +target/arm/decode-t16.inc.c: $(SRC_PATH)/target/arm/t16.decode $(DECODETREE) > + $(call quiet-command,\ > + $(PYTHON) $(DECODETREE) -w 16 --static-decode disas_t16 -o $@ $<,\ > + "GEN", $(TARGET_DIR)$@) > + > target/arm/translate-sve.o: target/arm/decode-sve.inc.c > target/arm/translate.o: target/arm/decode-vfp.inc.c > target/arm/translate.o: target/arm/decode-vfp-uncond.inc.c > target/arm/translate.o: target/arm/decode-a32.inc.c > target/arm/translate.o: target/arm/decode-a32-uncond.inc.c > target/arm/translate.o: target/arm/decode-t32.inc.c > +target/arm/translate.o: target/arm/decode-t16.inc.c > > obj-y += tlb_helper.o debug_helper.o > obj-y += translate.o op_helper.o > diff --git a/target/arm/t16.decode b/target/arm/t16.decode > new file mode 100644 > index 0000000000..e954f61fe4 > --- /dev/null > +++ b/target/arm/t16.decode > @@ -0,0 +1,20 @@ > +# Thumb1 instructions > +# > +# Copyright (c) 2019 Linaro, Ltd > +# > +# This library is free software; you can redistribute it and/or > +# modify it under the terms of the GNU Lesser General Public > +# License as published by the Free Software Foundation; either > +# version 2 of the License, or (at your option) any later version. > +# > +# This library is distributed in the hope that it will be useful, > +# but WITHOUT ANY WARRANTY; without even the implied warranty of > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > +# Lesser General Public License for more details. > +# > +# You should have received a copy of the GNU Lesser General Public > +# License along with this library; if not, see <http://www.gnu.org/licenses/>. > + > +# > +# This file is processed by scripts/decodetree.py > +# >
diff --git a/target/arm/translate.c b/target/arm/translate.c index 49bab7d863..90d608a2d2 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7538,6 +7538,7 @@ static int t32_branch24(DisasContext *s, int x) #include "decode-a32.inc.c" #include "decode-a32-uncond.inc.c" #include "decode-t32.inc.c" +#include "decode-t16.inc.c" /* Helpers to swap operands for reverse-subtract. */ static void gen_rsb(TCGv_i32 dst, TCGv_i32 a, TCGv_i32 b) @@ -10550,6 +10551,11 @@ static void disas_thumb_insn(DisasContext *s, uint32_t insn) TCGv_i32 tmp2; TCGv_i32 addr; + if (disas_t16(s, insn)) { + return; + } + /* fall back to legacy decoder */ + switch (insn >> 12) { case 0: case 1: diff --git a/target/arm/Makefile.objs b/target/arm/Makefile.objs index 7806b4dac0..cf26c16f5f 100644 --- a/target/arm/Makefile.objs +++ b/target/arm/Makefile.objs @@ -43,12 +43,18 @@ target/arm/decode-t32.inc.c: $(SRC_PATH)/target/arm/t32.decode $(DECODETREE) $(PYTHON) $(DECODETREE) --static-decode disas_t32 -o $@ $<,\ "GEN", $(TARGET_DIR)$@) +target/arm/decode-t16.inc.c: $(SRC_PATH)/target/arm/t16.decode $(DECODETREE) + $(call quiet-command,\ + $(PYTHON) $(DECODETREE) -w 16 --static-decode disas_t16 -o $@ $<,\ + "GEN", $(TARGET_DIR)$@) + target/arm/translate-sve.o: target/arm/decode-sve.inc.c target/arm/translate.o: target/arm/decode-vfp.inc.c target/arm/translate.o: target/arm/decode-vfp-uncond.inc.c target/arm/translate.o: target/arm/decode-a32.inc.c target/arm/translate.o: target/arm/decode-a32-uncond.inc.c target/arm/translate.o: target/arm/decode-t32.inc.c +target/arm/translate.o: target/arm/decode-t16.inc.c obj-y += tlb_helper.o debug_helper.o obj-y += translate.o op_helper.o diff --git a/target/arm/t16.decode b/target/arm/t16.decode new file mode 100644 index 0000000000..e954f61fe4 --- /dev/null +++ b/target/arm/t16.decode @@ -0,0 +1,20 @@ +# Thumb1 instructions +# +# Copyright (c) 2019 Linaro, Ltd +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, see <http://www.gnu.org/licenses/>. + +# +# This file is processed by scripts/decodetree.py +#
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/translate.c | 6 ++++++ target/arm/Makefile.objs | 6 ++++++ target/arm/t16.decode | 20 ++++++++++++++++++++ 3 files changed, 32 insertions(+) create mode 100644 target/arm/t16.decode -- 2.17.1