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V4.4 backport of arm64 Spectre patches
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[v4.4,V2,00/43] V4.4 backport of arm64 Spectre patches
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[v4.4,V2,01/43] arm64: barrier: Add CSDB macros to control data-value prediction
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[v4.4,V2,02/43] arm64: Implement array_index_mask_nospec()
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[v4.4,V2,03/43] arm64: move TASK_* definitions to <asm/processor.h>
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[v4.4,V2,04/43] arm64: Make USER_DS an inclusive limit
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[v4.4,V2,05/43] arm64: Use pointer masking to limit uaccess speculation
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[v4.4,V2,06/43] arm64: entry: Ensure branch through syscall table is bounded under speculation
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[v4.4,V2,07/43] arm64: uaccess: Prevent speculative use of the current addr_limit
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[v4.4,V2,08/43] arm64: uaccess: Don't bother eliding access_ok checks in __{get, put}_user
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[v4.4,V2,09/43] mm/kasan: add API to check memory regions
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[v4.4,V2,10/43] arm64: kasan: instrument user memory access API
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[v4.4,V2,11/43] arm64: uaccess: Mask __user pointers for __arch_{clear, copy_*}_user
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[v4.4,V2,12/43] arm64: cpufeature: Test 'matches' pointer to find the end of the list
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[v4.4,V2,13/43] arm64: cpufeature: Add scope for capability check
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[v4.4,V2,14/43] arm64: Introduce cpu_die_early
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[v4.4,V2,15/43] arm64: Move cpu_die_early to smp.c
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[v4.4,V2,16/43] arm64: Verify CPU errata work arounds on hotplugged CPU
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[v4.4,V2,17/43] arm64: errata: Calling enable functions for CPU errata too
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[v4.4,V2,18/43] arm64: Rearrange CPU errata workaround checks
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[v4.4,V2,19/43] arm64: Run enable method for errata work arounds on late CPUs
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[v4.4,V2,20/43] arm64: cpufeature: Pass capability structure to ->enable callback
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[v4.4,V2,21/43] drivers/firmware: Expose psci_get_version through psci_ops structure
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[v4.4,V2,22/43] arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro
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[v4.4,V2,23/43] arm64: Move post_ttbr_update_workaround to C code
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[v4.4,V2,24/43] arm64: Add skeleton to harden the branch predictor against aliasing attacks
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[v4.4,V2,25/43] arm64: Move BP hardening to check_and_switch_context
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[v4.4,V2,26/43] arm64: entry: Apply BP hardening for high-priority synchronous exceptions
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[v4.4,V2,27/43] arm64: entry: Apply BP hardening for suspicious interrupts from EL0
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[v4.4,V2,28/43] arm64: cputype: Add missing MIDR values for Cortex-A72 and Cortex-A75
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[v4.4,V2,29/43] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core
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[v4.4,V2,30/43] arm64: Implement branch predictor hardening for affected Cortex-A CPUs
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[v4.4,V2,31/43] arm64: cputype info for Broadcom Vulcan
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[v4.4,V2,32/43] arm64: cputype: Add MIDR values for Cavium ThunderX2 CPUs
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[v4.4,V2,33/43] arm64: Branch predictor hardening for Cavium ThunderX2
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[v4.4,V2,34/43] ARM: 8478/2: arm/arm64: add arm-smccc
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[v4.4,V2,35/43] arm/arm64: KVM: Advertise SMCCC v1.1
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[v4.4,V2,36/43] arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support
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[v4.4,V2,37/43] firmware/psci: Expose PSCI conduit
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[v4.4,V2,38/43] firmware/psci: Expose SMCCC version through psci_ops
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[v4.4,V2,39/43] arm/arm64: smccc: Make function identifiers an unsigned quantity
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[v4.4,V2,40/43] arm/arm64: smccc: Implement SMCCC v1.1 inline primitive
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[v4.4,V2,41/43] arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support
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[v4.4,V2,42/43] arm64: Kill PSCI_GET_VERSION as a variant-2 workaround
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[v4.4,V2,43/43] arm64: futex: Mask __user pointers prior to dereference
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