| Message ID | 20200502100628.24809-15-pragnesh.patel@sifive.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | RISC-V SiFive FU540 support SPL | expand |
On Sat, May 2, 2020 at 6:08 PM Pragnesh Patel <pragnesh.patel at sifive.com> wrote: > > Add place-holder for RISC-V fu540 CPU > > Signed-off-by: Pragnesh Patel <pragnesh.patel at sifive.com> > --- > arch/riscv/include/asm/arch-fu540/clk.h | 14 +++++++++ > arch/riscv/include/asm/arch-fu540/gpio.h | 38 ++++++++++++++++++++++++ > 2 files changed, 52 insertions(+) > create mode 100644 arch/riscv/include/asm/arch-fu540/clk.h > create mode 100644 arch/riscv/include/asm/arch-fu540/gpio.h > Reviewed-by: Bin Meng <bmeng.cn at gmail.com> Tested-by: Bin Meng <bmeng.cn at gmail.com>
On Sat, May 2, 2020 at 3:38 PM Pragnesh Patel <pragnesh.patel at sifive.com> wrote: > > Add place-holder for RISC-V fu540 CPU > > Signed-off-by: Pragnesh Patel <pragnesh.patel at sifive.com> > --- > arch/riscv/include/asm/arch-fu540/clk.h | 14 +++++++++ > arch/riscv/include/asm/arch-fu540/gpio.h | 38 ++++++++++++++++++++++++ Where is it using exactly? Jagan.
Hi Jagan, >-----Original Message----- >From: Jagan Teki <jagan at amarulasolutions.com> >Sent: 02 May 2020 21:58 >To: Pragnesh Patel <pragnesh.patel at sifive.com> >Cc: U-Boot-Denx <u-boot at lists.denx.de>; Atish Patra ><atish.patra at wdc.com>; Palmer Dabbelt <palmerdabbelt at google.com>; Bin >Meng <bmeng.cn at gmail.com>; Paul Walmsley <paul.walmsley at sifive.com>; >Troy Benjegerdes <troy.benjegerdes at sifive.com>; Anup Patel ><anup.patel at wdc.com>; Sagar Kadam <sagar.kadam at sifive.com>; Rick Chen ><rick at andestech.com> >Subject: Re: [PATCH v7 14/22] riscv: Add place-holder for driver compilation > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >On Sat, May 2, 2020 at 3:38 PM Pragnesh Patel <pragnesh.patel at sifive.com> >wrote: >> >> Add place-holder for RISC-V fu540 CPU >> >> Signed-off-by: Pragnesh Patel <pragnesh.patel at sifive.com> >> --- >> arch/riscv/include/asm/arch-fu540/clk.h | 14 +++++++++ >> arch/riscv/include/asm/arch-fu540/gpio.h | 38 ++++++++++++++++++++++++ > >Where is it using exactly? "drivers/gpio/sifive-gpio.c" > >Jagan.
On Sun, May 3, 2020 at 2:47 PM Pragnesh Patel <pragnesh.patel at sifive.com> wrote: > > Hi Jagan, > > >-----Original Message----- > >From: Jagan Teki <jagan at amarulasolutions.com> > >Sent: 02 May 2020 21:58 > >To: Pragnesh Patel <pragnesh.patel at sifive.com> > >Cc: U-Boot-Denx <u-boot at lists.denx.de>; Atish Patra > ><atish.patra at wdc.com>; Palmer Dabbelt <palmerdabbelt at google.com>; Bin > >Meng <bmeng.cn at gmail.com>; Paul Walmsley <paul.walmsley at sifive.com>; > >Troy Benjegerdes <troy.benjegerdes at sifive.com>; Anup Patel > ><anup.patel at wdc.com>; Sagar Kadam <sagar.kadam at sifive.com>; Rick Chen > ><rick at andestech.com> > >Subject: Re: [PATCH v7 14/22] riscv: Add place-holder for driver compilation > > > >[External Email] Do not click links or attachments unless you recognize the > >sender and know the content is safe > > > >On Sat, May 2, 2020 at 3:38 PM Pragnesh Patel <pragnesh.patel at sifive.com> > >wrote: > >> > >> Add place-holder for RISC-V fu540 CPU > >> > >> Signed-off-by: Pragnesh Patel <pragnesh.patel at sifive.com> > >> --- > >> arch/riscv/include/asm/arch-fu540/clk.h | 14 +++++++++ > >> arch/riscv/include/asm/arch-fu540/gpio.h | 38 ++++++++++++++++++++++++ > > > >Where is it using exactly? > > "drivers/gpio/sifive-gpio.c" I mean which patch used these headers? Jagan.
>-----Original Message----- >From: Jagan Teki <jagan at amarulasolutions.com> >Sent: 10 May 2020 14:42 >To: Pragnesh Patel <pragnesh.patel at sifive.com> >Cc: U-Boot-Denx <u-boot at lists.denx.de>; Atish Patra ><atish.patra at wdc.com>; Palmer Dabbelt <palmerdabbelt at google.com>; Bin >Meng <bmeng.cn at gmail.com>; Paul Walmsley <paul.walmsley at sifive.com>; >Troy Benjegerdes <troy.benjegerdes at sifive.com>; Anup Patel ><anup.patel at wdc.com>; Sagar Kadam <sagar.kadam at sifive.com>; Rick Chen ><rick at andestech.com> >Subject: Re: [PATCH v7 14/22] riscv: Add place-holder for driver compilation > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >On Sun, May 3, 2020 at 2:47 PM Pragnesh Patel <pragnesh.patel at sifive.com> >wrote: >> >> Hi Jagan, >> >> >-----Original Message----- >> >From: Jagan Teki <jagan at amarulasolutions.com> >> >Sent: 02 May 2020 21:58 >> >To: Pragnesh Patel <pragnesh.patel at sifive.com> >> >Cc: U-Boot-Denx <u-boot at lists.denx.de>; Atish Patra >> ><atish.patra at wdc.com>; Palmer Dabbelt <palmerdabbelt at google.com>; >Bin >> >Meng <bmeng.cn at gmail.com>; Paul Walmsley ><paul.walmsley at sifive.com>; >> >Troy Benjegerdes <troy.benjegerdes at sifive.com>; Anup Patel >> ><anup.patel at wdc.com>; Sagar Kadam <sagar.kadam at sifive.com>; Rick >Chen >> ><rick at andestech.com> >> >Subject: Re: [PATCH v7 14/22] riscv: Add place-holder for driver >> >compilation >> > >> >[External Email] Do not click links or attachments unless you >> >recognize the sender and know the content is safe >> > >> >On Sat, May 2, 2020 at 3:38 PM Pragnesh Patel >> ><pragnesh.patel at sifive.com> >> >wrote: >> >> >> >> Add place-holder for RISC-V fu540 CPU >> >> >> >> Signed-off-by: Pragnesh Patel <pragnesh.patel at sifive.com> >> >> --- >> >> arch/riscv/include/asm/arch-fu540/clk.h | 14 +++++++++ >> >> arch/riscv/include/asm/arch-fu540/gpio.h | 38 >> >> ++++++++++++++++++++++++ >> > >> >Where is it using exactly? >> >> "drivers/gpio/sifive-gpio.c" > >I mean which patch used these headers? This headers are necessary for existing SiFive drivers. Earlier CONFIG_SYS_CPU is "generic", so drivers use headers from " arch/riscv/include/asm/arch-generic/" now We have changed the CONFIG_SYS_CPU to "fu540" so now drivers will use headers from "arch/riscv/include/asm/arch-fu540/". > >Jagan.
On Mon, May 11, 2020 at 11:28 AM Pragnesh Patel <pragnesh.patel at sifive.com> wrote: > > >-----Original Message----- > >From: Jagan Teki <jagan at amarulasolutions.com> > >Sent: 10 May 2020 14:42 > >To: Pragnesh Patel <pragnesh.patel at sifive.com> > >Cc: U-Boot-Denx <u-boot at lists.denx.de>; Atish Patra > ><atish.patra at wdc.com>; Palmer Dabbelt <palmerdabbelt at google.com>; Bin > >Meng <bmeng.cn at gmail.com>; Paul Walmsley <paul.walmsley at sifive.com>; > >Troy Benjegerdes <troy.benjegerdes at sifive.com>; Anup Patel > ><anup.patel at wdc.com>; Sagar Kadam <sagar.kadam at sifive.com>; Rick Chen > ><rick at andestech.com> > >Subject: Re: [PATCH v7 14/22] riscv: Add place-holder for driver compilation > > > >[External Email] Do not click links or attachments unless you recognize the > >sender and know the content is safe > > > >On Sun, May 3, 2020 at 2:47 PM Pragnesh Patel <pragnesh.patel at sifive.com> > >wrote: > >> > >> Hi Jagan, > >> > >> >-----Original Message----- > >> >From: Jagan Teki <jagan at amarulasolutions.com> > >> >Sent: 02 May 2020 21:58 > >> >To: Pragnesh Patel <pragnesh.patel at sifive.com> > >> >Cc: U-Boot-Denx <u-boot at lists.denx.de>; Atish Patra > >> ><atish.patra at wdc.com>; Palmer Dabbelt <palmerdabbelt at google.com>; > >Bin > >> >Meng <bmeng.cn at gmail.com>; Paul Walmsley > ><paul.walmsley at sifive.com>; > >> >Troy Benjegerdes <troy.benjegerdes at sifive.com>; Anup Patel > >> ><anup.patel at wdc.com>; Sagar Kadam <sagar.kadam at sifive.com>; Rick > >Chen > >> ><rick at andestech.com> > >> >Subject: Re: [PATCH v7 14/22] riscv: Add place-holder for driver > >> >compilation > >> > > >> >[External Email] Do not click links or attachments unless you > >> >recognize the sender and know the content is safe > >> > > >> >On Sat, May 2, 2020 at 3:38 PM Pragnesh Patel > >> ><pragnesh.patel at sifive.com> > >> >wrote: > >> >> > >> >> Add place-holder for RISC-V fu540 CPU > >> >> > >> >> Signed-off-by: Pragnesh Patel <pragnesh.patel at sifive.com> > >> >> --- > >> >> arch/riscv/include/asm/arch-fu540/clk.h | 14 +++++++++ > >> >> arch/riscv/include/asm/arch-fu540/gpio.h | 38 > >> >> ++++++++++++++++++++++++ > >> > > >> >Where is it using exactly? > >> > >> "drivers/gpio/sifive-gpio.c" > > > >I mean which patch used these headers? > > This headers are necessary for existing SiFive drivers. > > Earlier CONFIG_SYS_CPU is "generic", so drivers use headers from " arch/riscv/include/asm/arch-generic/" now > We have changed the CONFIG_SYS_CPU to "fu540" so now drivers will use headers from > "arch/riscv/include/asm/arch-fu540/". How can someone understand the patch if you don't have any commit message explaining this? also add these headers to the patch that introduces CONFIG_SYS_CPU. It makes more sense to use the code or header which are relevant rather than a stale commit. Jagan.
>-----Original Message----- >From: Jagan Teki <jagan at amarulasolutions.com> >Sent: 11 May 2020 12:23 >To: Pragnesh Patel <pragnesh.patel at sifive.com> >Cc: U-Boot-Denx <u-boot at lists.denx.de>; Atish Patra ><atish.patra at wdc.com>; Palmer Dabbelt <palmerdabbelt at google.com>; Bin >Meng <bmeng.cn at gmail.com>; Paul Walmsley <paul.walmsley at sifive.com>; >Troy Benjegerdes <troy.benjegerdes at sifive.com>; Anup Patel ><anup.patel at wdc.com>; Sagar Kadam <sagar.kadam at sifive.com>; Rick Chen ><rick at andestech.com> >Subject: Re: [PATCH v7 14/22] riscv: Add place-holder for driver compilation > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >On Mon, May 11, 2020 at 11:28 AM Pragnesh Patel ><pragnesh.patel at sifive.com> wrote: >> >> >-----Original Message----- >> >From: Jagan Teki <jagan at amarulasolutions.com> >> >Sent: 10 May 2020 14:42 >> >To: Pragnesh Patel <pragnesh.patel at sifive.com> >> >Cc: U-Boot-Denx <u-boot at lists.denx.de>; Atish Patra >> ><atish.patra at wdc.com>; Palmer Dabbelt <palmerdabbelt at google.com>; >Bin >> >Meng <bmeng.cn at gmail.com>; Paul Walmsley ><paul.walmsley at sifive.com>; >> >Troy Benjegerdes <troy.benjegerdes at sifive.com>; Anup Patel >> ><anup.patel at wdc.com>; Sagar Kadam <sagar.kadam at sifive.com>; Rick >Chen >> ><rick at andestech.com> >> >Subject: Re: [PATCH v7 14/22] riscv: Add place-holder for driver >> >compilation >> > >> >[External Email] Do not click links or attachments unless you >> >recognize the sender and know the content is safe >> > >> >On Sun, May 3, 2020 at 2:47 PM Pragnesh Patel >> ><pragnesh.patel at sifive.com> >> >wrote: >> >> >> >> Hi Jagan, >> >> >> >> >-----Original Message----- >> >> >From: Jagan Teki <jagan at amarulasolutions.com> >> >> >Sent: 02 May 2020 21:58 >> >> >To: Pragnesh Patel <pragnesh.patel at sifive.com> >> >> >Cc: U-Boot-Denx <u-boot at lists.denx.de>; Atish Patra >> >> ><atish.patra at wdc.com>; Palmer Dabbelt ><palmerdabbelt at google.com>; >> >Bin >> >> >Meng <bmeng.cn at gmail.com>; Paul Walmsley >> ><paul.walmsley at sifive.com>; >> >> >Troy Benjegerdes <troy.benjegerdes at sifive.com>; Anup Patel >> >> ><anup.patel at wdc.com>; Sagar Kadam <sagar.kadam at sifive.com>; Rick >> >Chen >> >> ><rick at andestech.com> >> >> >Subject: Re: [PATCH v7 14/22] riscv: Add place-holder for driver >> >> >compilation >> >> > >> >> >[External Email] Do not click links or attachments unless you >> >> >recognize the sender and know the content is safe >> >> > >> >> >On Sat, May 2, 2020 at 3:38 PM Pragnesh Patel >> >> ><pragnesh.patel at sifive.com> >> >> >wrote: >> >> >> >> >> >> Add place-holder for RISC-V fu540 CPU >> >> >> >> >> >> Signed-off-by: Pragnesh Patel <pragnesh.patel at sifive.com> >> >> >> --- >> >> >> arch/riscv/include/asm/arch-fu540/clk.h | 14 +++++++++ >> >> >> arch/riscv/include/asm/arch-fu540/gpio.h | 38 >> >> >> ++++++++++++++++++++++++ >> >> > >> >> >Where is it using exactly? >> >> >> >> "drivers/gpio/sifive-gpio.c" >> > >> >I mean which patch used these headers? >> >> This headers are necessary for existing SiFive drivers. >> >> Earlier CONFIG_SYS_CPU is "generic", so drivers use headers from " >> arch/riscv/include/asm/arch-generic/" now We have changed the >> CONFIG_SYS_CPU to "fu540" so now drivers will use headers from >"arch/riscv/include/asm/arch-fu540/". > >How can someone understand the patch if you don't have any commit >message explaining this? also add these headers to the patch that introduces >CONFIG_SYS_CPU. It makes more sense to use the code or header which are >relevant rather than a stale commit. Okay, I will squash [v7 13/22] and [v7 14/22] and also change CONFIG_SYS_CPU to "fu540" in that patch. > >Jagan.
diff --git a/arch/riscv/include/asm/arch-fu540/clk.h b/arch/riscv/include/asm/arch-fu540/clk.h new file mode 100644 index 0000000000..d71ed4357c --- /dev/null +++ b/arch/riscv/include/asm/arch-fu540/clk.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2020 SiFive Inc + * + * Authors: + * Pragnesh Patel <pragnesh.patel at sifive.com> + */ + +#ifndef __CLK_SIFIVE_H +#define __CLK_SIFIVE_H + +/* Note: This is a placeholder header for driver compilation. */ + +#endif diff --git a/arch/riscv/include/asm/arch-fu540/gpio.h b/arch/riscv/include/asm/arch-fu540/gpio.h new file mode 100644 index 0000000000..0d16c59ca6 --- /dev/null +++ b/arch/riscv/include/asm/arch-fu540/gpio.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 SiFive, Inc. + */ + +#ifndef _GPIO_SIFIVE_H +#define _GPIO_SIFIVE_H + +#define GPIO_INPUT_VAL 0x00 +#define GPIO_INPUT_EN 0x04 +#define GPIO_OUTPUT_EN 0x08 +#define GPIO_OUTPUT_VAL 0x0C +#define GPIO_RISE_IE 0x18 +#define GPIO_RISE_IP 0x1C +#define GPIO_FALL_IE 0x20 +#define GPIO_FALL_IP 0x24 +#define GPIO_HIGH_IE 0x28 +#define GPIO_HIGH_IP 0x2C +#define GPIO_LOW_IE 0x30 +#define GPIO_LOW_IP 0x34 +#define GPIO_OUTPUT_XOR 0x40 + +#define NR_GPIOS 16 + +enum gpio_state { + LOW, + HIGH +}; + +/* Details about a GPIO bank */ +struct sifive_gpio_platdata { + void *base; /* address of registers in physical memory */ +}; + +#define SIFIVE_GENERIC_GPIO_NR(port, index) \ + (((port) * NR_GPIOS) + ((index) & (NR_GPIOS - 1))) + +#endif /* _GPIO_SIFIVE_H */
Add place-holder for RISC-V fu540 CPU Signed-off-by: Pragnesh Patel <pragnesh.patel at sifive.com> --- arch/riscv/include/asm/arch-fu540/clk.h | 14 +++++++++ arch/riscv/include/asm/arch-fu540/gpio.h | 38 ++++++++++++++++++++++++ 2 files changed, 52 insertions(+) create mode 100644 arch/riscv/include/asm/arch-fu540/clk.h create mode 100644 arch/riscv/include/asm/arch-fu540/gpio.h