diff mbox series

[v7,03/22] riscv: Add _image_binary_end for SPL

Message ID 20200502100628.24809-4-pragnesh.patel@sifive.com
State Superseded
Headers show
Series RISC-V SiFive FU540 support SPL | expand

Commit Message

Pragnesh Patel May 2, 2020, 10:06 a.m. UTC
For SPL_SEPARATE_BSS, Device tree will be put at _image_binary_end

Signed-off-by: Pragnesh Patel <pragnesh.patel at sifive.com>
Reviewed-by: Anup Patel <anup.patel at wdc.com>
Reviewed-by: Jagan Teki <jagan at amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
---
 arch/riscv/cpu/u-boot-spl.lds | 1 +
 1 file changed, 1 insertion(+)

Comments

Bin Meng May 2, 2020, 12:28 p.m. UTC | #1
On Sat, May 2, 2020 at 6:07 PM Pragnesh Patel <pragnesh.patel at sifive.com> wrote:
>
> For SPL_SEPARATE_BSS, Device tree will be put at _image_binary_end
>
> Signed-off-by: Pragnesh Patel <pragnesh.patel at sifive.com>
> Reviewed-by: Anup Patel <anup.patel at wdc.com>
> Reviewed-by: Jagan Teki <jagan at amarulasolutions.com>
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
> ---
>  arch/riscv/cpu/u-boot-spl.lds | 1 +
>  1 file changed, 1 insertion(+)
>

Tested-by: Bin Meng <bmeng.cn at gmail.com>
diff mbox series

Patch

diff --git a/arch/riscv/cpu/u-boot-spl.lds b/arch/riscv/cpu/u-boot-spl.lds
index 955dd3106d..d0495ce248 100644
--- a/arch/riscv/cpu/u-boot-spl.lds
+++ b/arch/riscv/cpu/u-boot-spl.lds
@@ -72,6 +72,7 @@  SECTIONS
 	. = ALIGN(4);
 
 	_end = .;
+	_image_binary_end = .;
 
 	.bss : {
 		__bss_start = .;