[v2,20/27] target/arm: Implement pauth_strip

Message ID	20181214052410.11863-21-richard.henderson@linaro.org
State	Superseded
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Date: Thu, 13 Dec 2018 23:24:03 -0600 Message-Id: <20181214052410.11863-21-richard.henderson@linaro.org> In-Reply-To: <20181214052410.11863-1-richard.henderson@linaro.org> References: <20181214052410.11863-1-richard.henderson@linaro.org> Subject: [Qemu-devel] [PATCH v2 20/27] target/arm: Implement pauth_strip Precedence: list Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	target/arm: Implement ARMv8.3-PAuth \| expand [v2,00/27] target/arm: Implement ARMv8.3-PAuth [v2,01/27] target/arm: Add state for the ARMv8.3-PAuth extension [v2,02/27] target/arm: Add SCTLR bits through ARMv8.5 [v2,03/27] target/arm: Add PAuth active bit to tbflags [v2,04/27] target/arm: Add PAuth helpers [v2,05/27] target/arm: Decode PAuth within system hint space [v2,06/27] target/arm: Rearrange decode in disas_data_proc_1src [v2,07/27] target/arm: Decode PAuth within disas_data_proc_1src [v2,08/27] target/arm: Decode PAuth within disas_data_proc_2src [v2,09/27] target/arm: Move helper_exception_return to helper-a64.c [v2,10/27] target/arm: Add new_pc argument to helper_exception_return [v2,11/27] target/arm: Rearrange decode in disas_uncond_b_reg [v2,12/27] target/arm: Decode PAuth within disas_uncond_b_reg [v2,13/27] target/arm: Decode Load/store register (pac) [v2,14/27] target/arm: Move cpu_mmu_index out of line [v2,15/27] target/arm: Introduce arm_mmu_idx [v2,16/27] target/arm: Introduce arm_stage1_mmu_idx [v2,17/27] target/arm: Create ARMVAParameters and helpers [v2,18/27] target/arm: Reuse aa64_va_parameters for setting tbflags [v2,19/27] target/arm: Export aa64_va_parameters to internals.h [v2,20/27] target/arm: Implement pauth_strip [v2,21/27] target/arm: Implement pauth_auth [v2,22/27] target/arm: Implement pauth_addpac [v2,23/27] target/arm: Implement pauth_computepac [v2,24/27] target/arm: Add PAuth system registers [v2,25/27] target/arm: Enable PAuth for -cpu max [v2,26/27] target/arm: Enable PAuth for user-only, part 2 [v2,27/27] target/arm: Tidy TBI handling in gen_a64_set_pc

Message ID

20181214052410.11863-21-richard.henderson@linaro.org

State

Superseded

Headers

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	qemu-devel-bounces+patch=linaro.org@nongnu.org designates
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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Date: Thu, 13 Dec 2018 23:24:03 -0600
Message-Id: <20181214052410.11863-21-richard.henderson@linaro.org>
In-Reply-To: <20181214052410.11863-1-richard.henderson@linaro.org>
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Subject: [Qemu-devel] [PATCH v2 20/27] target/arm: Implement pauth_strip
Precedence: list
Cc: peter.maydell@linaro.org
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Series

target/arm: Implement ARMv8.3-PAuth | expand

Commit Message

Richard Henderson Dec. 14, 2018, 5:24 a.m. UTC

Stripping out the authentication data does not require any crypto,
it merely requires the virtual address parameters.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/helper-a64.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

-- 
2.17.2

Comments

Peter Maydell Jan. 7, 2019, 11:52 a.m. UTC | #1

On Fri, 14 Dec 2018 at 05:24, Richard Henderson
<richard.henderson@linaro.org> wrote:
>

> Stripping out the authentication data does not require any crypto,

> it merely requires the virtual address parameters.

>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>


thanks
-- PMM

diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index 79cc9cf47b..329af51232 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -1069,6 +1069,15 @@  static uint64_t pauth_addpac(CPUARMState *env, uint64_t ptr, uint64_t modifier,
     g_assert_not_reached(); /* FIXME */
 }
 
+static uint64_t pauth_original_ptr(uint64_t ptr, ARMVAParameters param)
+{
+    uint64_t extfield = -param.select;
+    int bot_pac_bit = 64 - param.tsz;
+    int top_pac_bit = 64 - 8 * param.tbi;
+
+    return deposit64(ptr, bot_pac_bit, top_pac_bit - bot_pac_bit, extfield);
+}
+
 static uint64_t pauth_auth(CPUARMState *env, uint64_t ptr, uint64_t modifier,
                            ARMPACKey *key, bool data, int keynumber)
 {
@@ -1077,7 +1086,10 @@  static uint64_t pauth_auth(CPUARMState *env, uint64_t ptr, uint64_t modifier,
 
 static uint64_t pauth_strip(CPUARMState *env, uint64_t ptr, bool data)
 {
-    g_assert_not_reached(); /* FIXME */
+    ARMMMUIdx mmu_idx = arm_stage1_mmu_idx(env);
+    ARMVAParameters param = aa64_va_parameters(env, ptr, mmu_idx, data);
+
+    return pauth_original_ptr(ptr, param);
 }
 
 static void QEMU_NORETURN pauth_trap(CPUARMState *env, int target_el,

[v2,20/27] target/arm: Implement pauth_strip

Commit Message

Comments

Patch