| Message ID | 20190814125012.8700-1-vkoul@kernel.org |
|---|---|
| Headers | show |
| Series | arm64: dts: qcom: sm8150: Add SM8150 DTS | expand |
Quoting Vinod Koul (2019-08-14 05:49:55) > Add SPMI node which is used for spmi_bus > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > --- > arch/arm64/boot/dts/qcom/sm8150.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) Squash?
Quoting Vinod Koul (2019-08-14 05:49:58) > @@ -25,6 +26,33 @@ > }; > }; > > + pm8150_adc: adc@3100 { > + compatible = "qcom,spmi-adc5"; > + reg = <0x3100>; > + #address-cells = <1>; > + #size-cells = <0>; > + #io-channel-cells = <1>; > + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; status = "disabled"? I imagine there are cases where some board doesn't want to use the ADC for anything. > + > + ref-gnd@0 { > + reg = <ADC5_REF_GND>; > + qcom,pre-scaling = <1 1>; > + label = "ref_gnd"; > + }; > + > + vref-1p25@1 { > + reg = <ADC5_1P25VREF>; > + qcom,pre-scaling = <1 1>; > + label = "vref_1p25"; > + }; > + > + die-temp@6 { > + reg = <ADC5_DIE_TEMP>; > + qcom,pre-scaling = <1 1>; > + label = "die_temp"; > + }; Are these board level details? > + }; > + > rtc@6000 { > compatible = "qcom,pm8941-rtc"; > reg = <0x6000>; > -- > 2.20.1 >
Quoting Vinod Koul (2019-08-14 05:50:07) > Add apss_shared and apps_rsc node including the rpmhcc child node > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > --- Can't this be squashed with the original dtsi file? > arch/arm64/boot/dts/qcom/sm8150.dtsi | 30 ++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi > index 5c6b103b042b..5258b79676f6 100644 > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi > @@ -4,6 +4,7 @@ > > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/clock/qcom,gcc-sm8150.h> > +#include <dt-bindings/soc/qcom,rpmh-rsc.h> But not the rpmh clk bindings? > @@ -272,6 +279,29 @@ > }; > }; > > + apps_rsc: rsc@18200000 { > + label = "apps_rsc"; > + compatible = "qcom,rpmh-rsc"; > + reg = <0x18200000 0x10000>, > + <0x18210000 0x10000>, > + <0x18220000 0x10000>; > + reg-names = "drv-0", "drv-1", "drv-2"; > + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; > + qcom,tcs-offset = <0xd00>; > + qcom,drv-id = <2>; > + qcom,tcs-config = <ACTIVE_TCS 2>, > + <SLEEP_TCS 1>, > + <WAKE_TCS 1>, > + <CONTROL_TCS 0>; > + > + rpmhcc: clock-controller { > + compatible = "qcom,sm8150-rpmh-clk"; > + #clock-cells = <1>; Should take some sort of clocks property to get the board clock for XO? > + }; > + }; > +
Quoting Vinod Koul (2019-08-14 05:50:08) > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi > index 5258b79676f6..7111e1f092f4 100644 > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi > @@ -153,6 +153,117 @@ > method = "smc"; > }; > > + reserved_memory: reserved-memory { Does this need a label? > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + hyp_mem: memory@85700000 { > + reg = <0x0 0x85700000 0x0 0x600000>; > + no-map;
Quoting Vinod Koul (2019-08-14 05:50:10) > From: Sibi Sankar <sibis@codeaurora.org> > > Add the CPU PMU on SM8150 to get perf support for hardware events. > > Signed-off-by: Sibi Sankar <sibis@codeaurora.org> > Signed-off-by: Vinod Koul <vkoul@kernel.org> > --- Squash it?
On 14-08-19, 10:12, Stephen Boyd wrote: > Quoting Vinod Koul (2019-08-14 05:50:07) > > Add apss_shared and apps_rsc node including the rpmhcc child node > > > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > > --- > > Can't this be squashed with the original dtsi file? That makes it a huge blob, imo hard to review. I will still go ahead and squash things in v2, but will still keep logical chunks.. (this can go in original though) > > > arch/arm64/boot/dts/qcom/sm8150.dtsi | 30 ++++++++++++++++++++++++++++ > > 1 file changed, 30 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi > > index 5c6b103b042b..5258b79676f6 100644 > > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi > > @@ -4,6 +4,7 @@ > > > > #include <dt-bindings/interrupt-controller/arm-gic.h> > > #include <dt-bindings/clock/qcom,gcc-sm8150.h> > > +#include <dt-bindings/soc/qcom,rpmh-rsc.h> > > But not the rpmh clk bindings? Thats missing will add > > > @@ -272,6 +279,29 @@ > > }; > > }; > > > > + apps_rsc: rsc@18200000 { > > + label = "apps_rsc"; > > + compatible = "qcom,rpmh-rsc"; > > + reg = <0x18200000 0x10000>, > > + <0x18210000 0x10000>, > > + <0x18220000 0x10000>; > > + reg-names = "drv-0", "drv-1", "drv-2"; > > + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; > > + qcom,tcs-offset = <0xd00>; > > + qcom,drv-id = <2>; > > + qcom,tcs-config = <ACTIVE_TCS 2>, > > + <SLEEP_TCS 1>, > > + <WAKE_TCS 1>, > > + <CONTROL_TCS 0>; > > + > > + rpmhcc: clock-controller { > > + compatible = "qcom,sm8150-rpmh-clk"; > > + #clock-cells = <1>; > > Should take some sort of clocks property to get the board clock for XO? Yes after conversion, I have updated this now -- ~Vinod
On 14-08-19, 10:13, Stephen Boyd wrote: > Quoting Vinod Koul (2019-08-14 05:50:08) > > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi > > index 5258b79676f6..7111e1f092f4 100644 > > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi > > @@ -153,6 +153,117 @@ > > method = "smc"; > > }; > > > > + reserved_memory: reserved-memory { > > Does this need a label? will remove > > > + #address-cells = <2>; > > + #size-cells = <2>; > > + ranges; > > + > > + hyp_mem: memory@85700000 { > > + reg = <0x0 0x85700000 0x0 0x600000>; > > + no-map; -- ~Vinod
On 19-08-19, 10:56, Stephen Boyd wrote: > Quoting Vinod Koul (2019-08-19 10:43:31) > > On 14-08-19, 10:08, Stephen Boyd wrote: > > > > > > > > > > > diff --git a/arch/arm64/boot/dts/qcom/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/pm8150b.dtsi > > > > index c0a678b0f159..846197bd65cd 100644 > > > > --- a/arch/arm64/boot/dts/qcom/pm8150b.dtsi > > > > +++ b/arch/arm64/boot/dts/qcom/pm8150b.dtsi > > > > @@ -2,6 +2,7 @@ > > > > // Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. > > > > // Copyright (c) 2019, Linaro Limited > > > > > > > > +#include <dt-bindings/iio/qcom,spmi-vadc.h> > > > > #include <dt-bindings/interrupt-controller/irq.h> > > > > #include <dt-bindings/spmi/spmi.h> > > > > > > > > @@ -11,6 +12,59 @@ > > > > reg = <0x2 SPMI_USID>; > > > > #address-cells = <1>; > > > > #size-cells = <0>; > > > > + > > > > + pon@800 { > > > > > > Maybe pon node name should be 'key' or 'power-on'? > > > > pon stands for power on device. See Documentation/devicetree/bindings/power/reset/qcom,pon.txt > > Right. I was hoping for a more standard node name vs. an acronym that's > SoC specific. Sure that sounds better to me, I will make it "power-on" -- ~Vinod