diff mbox series

[v1,02/15] dt-bindings: pinctrl: add ns3 pads definition

Message ID 20200517081945.21282-3-rayagonda.kokatanur@broadcom.com
State Accepted
Commit 3ce080862576c482a8b128a36869cc49a4b3bef1
Headers show
Series add basic driver support for broadcom NS3 soc | expand

Commit Message

Rayagonda Kokatanur May 17, 2020, 8:19 a.m. UTC 
Add NS3 pads definitions.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur at broadcom.com>
---
 .../dt-bindings/pinctrl/brcm,pinctrl-ns3.h    | 41 +++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h

Comments

Simon Glass May 25, 2020, 2:14 a.m. UTC | #1 
On Sun, 17 May 2020 at 02:20, Rayagonda Kokatanur
<rayagonda.kokatanur at broadcom.com> wrote:
>
> Add NS3 pads definitions.
>
> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur at broadcom.com>
> ---
>  .../dt-bindings/pinctrl/brcm,pinctrl-ns3.h    | 41 +++++++++++++++++++
>  1 file changed, 41 insertions(+)
>  create mode 100644 include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h

Reviewed-by: Simon Glass <sjg at chromium.org>
diff mbox series

Patch

diff --git a/include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h b/include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h
new file mode 100644
index 0000000000..81ebd58ca5
--- /dev/null
+++ b/include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h
@@ -0,0 +1,41 @@ 
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Broadcom.
+ */
+
+#ifndef __DT_BINDINGS_PINCTRL_BRCM_STINGRAY_H__
+#define __DT_BINDINGS_PINCTRL_BRCM_STINGRAY_H__
+
+/* Alternate functions available in MUX controller */
+#define MODE_NITRO				0
+#define MODE_NAND				1
+#define MODE_PNOR				2
+#define MODE_GPIO				3
+
+/* Pad configuration attribute */
+#define PAD_SLEW_RATE_ENA			BIT(0)
+#define PAD_SLEW_RATE_ENA_MASK			BIT(0)
+
+#define PAD_DRIVE_STRENGTH_2_MA			(0 << 1)
+#define PAD_DRIVE_STRENGTH_4_MA			BIT(1)
+#define PAD_DRIVE_STRENGTH_6_MA			(2 << 1)
+#define PAD_DRIVE_STRENGTH_8_MA			(3 << 1)
+#define PAD_DRIVE_STRENGTH_10_MA		(4 << 1)
+#define PAD_DRIVE_STRENGTH_12_MA		(5 << 1)
+#define PAD_DRIVE_STRENGTH_14_MA		(6 << 1)
+#define PAD_DRIVE_STRENGTH_16_MA		(7 << 1)
+#define PAD_DRIVE_STRENGTH_MASK			(7 << 1)
+
+#define PAD_PULL_UP_ENA				BIT(4)
+#define PAD_PULL_UP_ENA_MASK			BIT(4)
+
+#define PAD_PULL_DOWN_ENA			BIT(5)
+#define PAD_PULL_DOWN_ENA_MASK			BIT(5)
+
+#define PAD_INPUT_PATH_DIS			BIT(6)
+#define PAD_INPUT_PATH_DIS_MASK			BIT(6)
+
+#define PAD_HYSTERESIS_ENA			BIT(7)
+#define PAD_HYSTERESIS_ENA_MASK			BIT(7)
+
+#endif