diff mbox series

[v1] pinctrl: merrifield: Set default bias in case no particular value given

Message ID 20201111120605.50881-1-andriy.shevchenko@linux.intel.com
State Accepted
Commit 0fa86fc2e28227f1e64f13867e73cf864c6d25ad
Headers show
Series [v1] pinctrl: merrifield: Set default bias in case no particular value given | expand

Commit Message

Andy Shevchenko Nov. 11, 2020, 12:06 p.m. UTC
When GPIO library asks pin control to set the bias, it doesn't pass
any value of it and argument is considered boolean (and this is true
for ACPI GpioIo() / GpioInt() resources, by the way). Thus, individual
drivers must behave well, when they got the resistance value of 1 Ohm,
i.e. transforming it to sane default.

In case of Intel Merrifield pin control hardware the 20 kOhm sounds plausible
because it gives a good trade off between weakness and minimization of leakage
current (will be only 50 uA with the above choice).

Fixes: 4e80c8f50574 ("pinctrl: intel: Add Intel Merrifield pin controller support")
Depends-on: 2956b5d94a76 ("pinctrl / gpio: Introduce .set_config() callback for GPIO chips")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/pinctrl/intel/pinctrl-merrifield.c | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Mika Westerberg Nov. 12, 2020, 8:06 a.m. UTC | #1
On Wed, Nov 11, 2020 at 02:06:05PM +0200, Andy Shevchenko wrote:
> When GPIO library asks pin control to set the bias, it doesn't pass

> any value of it and argument is considered boolean (and this is true

> for ACPI GpioIo() / GpioInt() resources, by the way). Thus, individual

> drivers must behave well, when they got the resistance value of 1 Ohm,

> i.e. transforming it to sane default.

> 

> In case of Intel Merrifield pin control hardware the 20 kOhm sounds plausible

> because it gives a good trade off between weakness and minimization of leakage

> current (will be only 50 uA with the above choice).

> 

> Fixes: 4e80c8f50574 ("pinctrl: intel: Add Intel Merrifield pin controller support")

> Depends-on: 2956b5d94a76 ("pinctrl / gpio: Introduce .set_config() callback for GPIO chips")

> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>


Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Andy Shevchenko Nov. 12, 2020, 1:59 p.m. UTC | #2
On Thu, Nov 12, 2020 at 10:06:50AM +0200, Mika Westerberg wrote:
> On Wed, Nov 11, 2020 at 02:06:05PM +0200, Andy Shevchenko wrote:

> > When GPIO library asks pin control to set the bias, it doesn't pass

> > any value of it and argument is considered boolean (and this is true

> > for ACPI GpioIo() / GpioInt() resources, by the way). Thus, individual

> > drivers must behave well, when they got the resistance value of 1 Ohm,

> > i.e. transforming it to sane default.

> > 

> > In case of Intel Merrifield pin control hardware the 20 kOhm sounds plausible

> > because it gives a good trade off between weakness and minimization of leakage

> > current (will be only 50 uA with the above choice).

> > 

> > Fixes: 4e80c8f50574 ("pinctrl: intel: Add Intel Merrifield pin controller support")

> > Depends-on: 2956b5d94a76 ("pinctrl / gpio: Introduce .set_config() callback for GPIO chips")

> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

> 

> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>


Pushed to my review and testing queue, thanks!

-- 
With Best Regards,
Andy Shevchenko
diff mbox series

Patch

diff --git a/drivers/pinctrl/intel/pinctrl-merrifield.c b/drivers/pinctrl/intel/pinctrl-merrifield.c
index e4ff8da1b894..3ae141e0b421 100644
--- a/drivers/pinctrl/intel/pinctrl-merrifield.c
+++ b/drivers/pinctrl/intel/pinctrl-merrifield.c
@@ -745,6 +745,10 @@  static int mrfld_config_set_pin(struct mrfld_pinctrl *mp, unsigned int pin,
 		mask |= BUFCFG_Px_EN_MASK | BUFCFG_PUPD_VAL_MASK;
 		bits |= BUFCFG_PU_EN;
 
+		/* Set default strength value in case none is given */
+		if (arg == 1)
+			arg = 20000;
+
 		switch (arg) {
 		case 50000:
 			bits |= BUFCFG_PUPD_VAL_50K << BUFCFG_PUPD_VAL_SHIFT;
@@ -765,6 +769,10 @@  static int mrfld_config_set_pin(struct mrfld_pinctrl *mp, unsigned int pin,
 		mask |= BUFCFG_Px_EN_MASK | BUFCFG_PUPD_VAL_MASK;
 		bits |= BUFCFG_PD_EN;
 
+		/* Set default strength value in case none is given */
+		if (arg == 1)
+			arg = 20000;
+
 		switch (arg) {
 		case 50000:
 			bits |= BUFCFG_PUPD_VAL_50K << BUFCFG_PUPD_VAL_SHIFT;