| Message ID | 167995346010.2857312.16383291901753972325.stgit@djiang5-mobl3 |
|---|---|
| State | Superseded |
| Headers | show |
| Series | cxl: Add support for QTG ID retrieval for CXL subsystem | expand |
Dave Jiang wrote: > Move read_cdat_data() from endpoint probe to general port probe to > allow reading of CDAT data for CXL switches as well as CXL device. > Add wrapper support for cxl_test to bypass the cdat reading. I'm not sure why you needed to add this wrapper. Overall I don't have an issue with it though. Reviewed-by: Ira Weiny <ira.weiny@intel.com> > > Signed-off-by: Dave Jiang <dave.jiang@intel.com> > --- > drivers/cxl/core/pci.c | 20 +++++++++++++++----- > drivers/cxl/port.c | 6 +++--- > tools/testing/cxl/Kbuild | 1 + > tools/testing/cxl/test/mock.c | 5 +++++ > 4 files changed, 24 insertions(+), 8 deletions(-) > > diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c > index e0d5e6525c0d..4241c7b8d5c2 100644 > --- a/drivers/cxl/core/pci.c > +++ b/drivers/cxl/core/pci.c > @@ -546,16 +546,26 @@ static unsigned char cdat_checksum(void *buf, size_t size) > */ > void read_cdat_data(struct cxl_port *port) > { > - struct pci_doe_mb *cdat_doe; > - struct device *dev = &port->dev; > struct device *uport = port->uport; > - struct cxl_memdev *cxlmd = to_cxl_memdev(uport); > - struct cxl_dev_state *cxlds = cxlmd->cxlds; > - struct pci_dev *pdev = to_pci_dev(cxlds->dev); > + struct device *dev = &port->dev; > + struct cxl_dev_state *cxlds; > + struct pci_doe_mb *cdat_doe; > + struct cxl_memdev *cxlmd; > + struct pci_dev *pdev; > size_t cdat_length; > void *cdat_table; > int rc; > > + if (is_cxl_memdev(uport)) { > + cxlmd = to_cxl_memdev(uport); > + cxlds = cxlmd->cxlds; > + pdev = to_pci_dev(cxlds->dev); > + } else if (dev_is_pci(uport)) { > + pdev = to_pci_dev(uport); > + } else { > + return; > + } > + > cdat_doe = pci_find_doe_mailbox(pdev, PCI_DVSEC_VENDOR_ID_CXL, > CXL_DOE_PROTOCOL_TABLE_ACCESS); > if (!cdat_doe) { > diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c > index 1049bb5ea496..60a865680e22 100644 > --- a/drivers/cxl/port.c > +++ b/drivers/cxl/port.c > @@ -93,9 +93,6 @@ static int cxl_endpoint_port_probe(struct cxl_port *port) > if (IS_ERR(cxlhdm)) > return PTR_ERR(cxlhdm); > > - /* Cache the data early to ensure is_visible() works */ > - read_cdat_data(port); > - > get_device(&cxlmd->dev); > rc = devm_add_action_or_reset(&port->dev, schedule_detach, cxlmd); > if (rc) > @@ -135,6 +132,9 @@ static int cxl_port_probe(struct device *dev) > { > struct cxl_port *port = to_cxl_port(dev); > > + /* Cache the data early to ensure is_visible() works */ > + read_cdat_data(port); > + > if (is_cxl_endpoint(port)) > return cxl_endpoint_port_probe(port); > return cxl_switch_port_probe(port); > diff --git a/tools/testing/cxl/Kbuild b/tools/testing/cxl/Kbuild > index fba7bec96acd..2637c71f3378 100644 > --- a/tools/testing/cxl/Kbuild > +++ b/tools/testing/cxl/Kbuild > @@ -12,6 +12,7 @@ ldflags-y += --wrap=cxl_await_media_ready > ldflags-y += --wrap=cxl_hdm_decode_init > ldflags-y += --wrap=cxl_dvsec_rr_decode > ldflags-y += --wrap=cxl_rcrb_to_component > +ldflags-y += --wrap=read_cdat_data > > DRIVERS := ../../../drivers > CXL_SRC := $(DRIVERS)/cxl > diff --git a/tools/testing/cxl/test/mock.c b/tools/testing/cxl/test/mock.c > index c4e53f22e421..3a75909b2aae 100644 > --- a/tools/testing/cxl/test/mock.c > +++ b/tools/testing/cxl/test/mock.c > @@ -263,6 +263,11 @@ resource_size_t __wrap_cxl_rcrb_to_component(struct device *dev, > } > EXPORT_SYMBOL_NS_GPL(__wrap_cxl_rcrb_to_component, CXL); > > +void __wrap_read_cdat_data(struct cxl_port *port) > +{ > +} > +EXPORT_SYMBOL_NS_GPL(__wrap_read_cdat_data, CXL); > + > MODULE_LICENSE("GPL v2"); > MODULE_IMPORT_NS(ACPI); > MODULE_IMPORT_NS(CXL); > >
diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c index e0d5e6525c0d..4241c7b8d5c2 100644 --- a/drivers/cxl/core/pci.c +++ b/drivers/cxl/core/pci.c @@ -546,16 +546,26 @@ static unsigned char cdat_checksum(void *buf, size_t size) */ void read_cdat_data(struct cxl_port *port) { - struct pci_doe_mb *cdat_doe; - struct device *dev = &port->dev; struct device *uport = port->uport; - struct cxl_memdev *cxlmd = to_cxl_memdev(uport); - struct cxl_dev_state *cxlds = cxlmd->cxlds; - struct pci_dev *pdev = to_pci_dev(cxlds->dev); + struct device *dev = &port->dev; + struct cxl_dev_state *cxlds; + struct pci_doe_mb *cdat_doe; + struct cxl_memdev *cxlmd; + struct pci_dev *pdev; size_t cdat_length; void *cdat_table; int rc; + if (is_cxl_memdev(uport)) { + cxlmd = to_cxl_memdev(uport); + cxlds = cxlmd->cxlds; + pdev = to_pci_dev(cxlds->dev); + } else if (dev_is_pci(uport)) { + pdev = to_pci_dev(uport); + } else { + return; + } + cdat_doe = pci_find_doe_mailbox(pdev, PCI_DVSEC_VENDOR_ID_CXL, CXL_DOE_PROTOCOL_TABLE_ACCESS); if (!cdat_doe) { diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c index 1049bb5ea496..60a865680e22 100644 --- a/drivers/cxl/port.c +++ b/drivers/cxl/port.c @@ -93,9 +93,6 @@ static int cxl_endpoint_port_probe(struct cxl_port *port) if (IS_ERR(cxlhdm)) return PTR_ERR(cxlhdm); - /* Cache the data early to ensure is_visible() works */ - read_cdat_data(port); - get_device(&cxlmd->dev); rc = devm_add_action_or_reset(&port->dev, schedule_detach, cxlmd); if (rc) @@ -135,6 +132,9 @@ static int cxl_port_probe(struct device *dev) { struct cxl_port *port = to_cxl_port(dev); + /* Cache the data early to ensure is_visible() works */ + read_cdat_data(port); + if (is_cxl_endpoint(port)) return cxl_endpoint_port_probe(port); return cxl_switch_port_probe(port); diff --git a/tools/testing/cxl/Kbuild b/tools/testing/cxl/Kbuild index fba7bec96acd..2637c71f3378 100644 --- a/tools/testing/cxl/Kbuild +++ b/tools/testing/cxl/Kbuild @@ -12,6 +12,7 @@ ldflags-y += --wrap=cxl_await_media_ready ldflags-y += --wrap=cxl_hdm_decode_init ldflags-y += --wrap=cxl_dvsec_rr_decode ldflags-y += --wrap=cxl_rcrb_to_component +ldflags-y += --wrap=read_cdat_data DRIVERS := ../../../drivers CXL_SRC := $(DRIVERS)/cxl diff --git a/tools/testing/cxl/test/mock.c b/tools/testing/cxl/test/mock.c index c4e53f22e421..3a75909b2aae 100644 --- a/tools/testing/cxl/test/mock.c +++ b/tools/testing/cxl/test/mock.c @@ -263,6 +263,11 @@ resource_size_t __wrap_cxl_rcrb_to_component(struct device *dev, } EXPORT_SYMBOL_NS_GPL(__wrap_cxl_rcrb_to_component, CXL); +void __wrap_read_cdat_data(struct cxl_port *port) +{ +} +EXPORT_SYMBOL_NS_GPL(__wrap_read_cdat_data, CXL); + MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS(ACPI); MODULE_IMPORT_NS(CXL);
Move read_cdat_data() from endpoint probe to general port probe to allow reading of CDAT data for CXL switches as well as CXL device. Add wrapper support for cxl_test to bypass the cdat reading. Signed-off-by: Dave Jiang <dave.jiang@intel.com> --- drivers/cxl/core/pci.c | 20 +++++++++++++++----- drivers/cxl/port.c | 6 +++--- tools/testing/cxl/Kbuild | 1 + tools/testing/cxl/test/mock.c | 5 +++++ 4 files changed, 24 insertions(+), 8 deletions(-)