diff mbox series

[3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay

Message ID 20230417090159.191346-3-biju.das.jz@bp.renesas.com
State New
Headers show
Series [1/3] arm64: dts: renesas: r9a07g044: Add MTU3a node | expand

Commit Message

Biju Das April 17, 2023, 9:01 a.m. UTC
Enable mtu3 node using dt overlay and disable scif2 node and delete
{sd1_mux,sd1_mux_uhs} nodes as the pins are shared with mtu3 external
clock input pins and Z phase signal(MTIOC1A).

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/Makefile          |  2 +
 .../boot/dts/renesas/rzg2l-smarc-pmod.dtso    | 43 +++++++++++++++++++
 2 files changed, 45 insertions(+)
 create mode 100644 arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso

Comments

Biju Das April 20, 2023, 3:49 p.m. UTC | #1
Hi Geert,

Thanks for the feedback.

> -----Original Message-----
> From: Geert Uytterhoeven <geert@linux-m68k.org>
> Sent: Thursday, April 20, 2023 4:40 PM
> To: Biju Das <biju.das.jz@bp.renesas.com>
> Cc: Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Geert Uytterhoeven
> <geert+renesas@glider.be>; Magnus Damm <magnus.damm@gmail.com>; linux-
> renesas-soc@vger.kernel.org; devicetree@vger.kernel.org; Prabhakar Mahadev
> Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a
> counter using DT overlay
> 
> Hi Biju,
> 
> On Mon, Apr 17, 2023 at 11:02 AM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > Enable mtu3 node using dt overlay and disable scif2 node and delete
> > {sd1_mux,sd1_mux_uhs} nodes as the pins are shared with mtu3 external
> > clock input pins and Z phase signal(MTIOC1A).
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> 
> Thanks for your patch!
> 
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> > @@ -0,0 +1,43 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK PMOD parts
> 
> Please add a comment here to document what exactly this provides.

OK will add.

> 
> > + *
> > + * Copyright (C) 2023 Renesas Electronics Corp.
> > + */
> > +
> > +/dts-v1/;
> > +/plugin/;
> > +
> > +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> > +
> > +&mtu3 {
> > +       pinctrl-0 = <&mtu3_pins>;
> > +       pinctrl-names = "default";
> > +
> > +       status = "okay";
> > +};
> > +
> > +&pinctrl {
> > +       mtu3_pins: mtu3 {
> > +               mtu3-zphase-clk {
> > +                       pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /* MTIOC1A
> */
> > +               };
> 
> Unless I'm missing something, this signal is not available on the PMOD
> connector?

Yes, it is not available on the PMOD connector. SD card detection signal,
is muxed with MTIOC1A (Z Phase signal). So for counter use case, we use it
as MTIOC1A pins.

> 
> > +
> > +               mtu3-ext-clk-input-pin {
> > +                       pinmux = <RZG2L_PORT_PINMUX(48, 0, 4)>, /* MTCLKA
> */
> > +                                <RZG2L_PORT_PINMUX(48, 1, 4)>; /* MTCLKB
> */
> > +               };
> 
> So this provides two external clock inputs on the pins on the PMOD connector
> that usually provides a UART?

Yes that is correct. UART signals are muxed with external phase clock inputs.
So for counter use case, using this overlay, we use it is as external phase clock inputs.

> 
> > +       };
> > +};
> > +
> > +&scif2 {
> > +       status = "disabled";
> > +};
> > +
> > +&sdhi1_pins {
> > +       /delete-node/ sd1_mux;
> > +};
> > +
> > +&sdhi1_pins_uhs {
> > +       /delete-node/ sd1_mux_uhs;
> > +};
> 
> As you disable CD functionality, don't you need to add "broken-cd" to the
> sdhi1 node?

OK, will add "broken-cd" to sdhi1 node while using this overlay.

Cheers,
Biju
Biju Das April 20, 2023, 6:16 p.m. UTC | #2
Hi Geert,

> -----Original Message-----
> From: Geert Uytterhoeven <geert@linux-m68k.org>
> Sent: Thursday, April 20, 2023 6:15 PM
> To: Biju Das <biju.das.jz@bp.renesas.com>
> Cc: Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Magnus Damm <magnus.damm@gmail.com>;
> linux-renesas-soc@vger.kernel.org; devicetree@vger.kernel.org; Prabhakar
> Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a
> counter using DT overlay
> 
> Hi Biju,
> 
> On Thu, Apr 20, 2023 at 5:49 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > > -----Original Message-----
> > > From: Geert Uytterhoeven <geert@linux-m68k.org>
> > > Sent: Thursday, April 20, 2023 4:40 PM
> > > To: Biju Das <biju.das.jz@bp.renesas.com>
> > > Cc: Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> > > <krzysztof.kozlowski+dt@linaro.org>; Geert Uytterhoeven
> > > <geert+renesas@glider.be>; Magnus Damm <magnus.damm@gmail.com>;
> > > linux- renesas-soc@vger.kernel.org; devicetree@vger.kernel.org;
> > > Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > Subject: Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable
> > > MTU3a counter using DT overlay
> > >
> > > Hi Biju,
> > >
> > > On Mon, Apr 17, 2023 at 11:02 AM Biju Das
> > > <biju.das.jz@bp.renesas.com>
> > > wrote:
> > > > Enable mtu3 node using dt overlay and disable scif2 node and
> > > > delete {sd1_mux,sd1_mux_uhs} nodes as the pins are shared with
> > > > mtu3 external clock input pins and Z phase signal(MTIOC1A).
> > > >
> > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> 
> > > > --- /dev/null
> > > > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> > > > @@ -0,0 +1,43 @@
> > > > +// SPDX-License-Identifier: GPL-2.0
> > > > +/*
> > > > + * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK PMOD parts
> > > > + *
> > > > + * Copyright (C) 2023 Renesas Electronics Corp.
> > > > + */
> > > > +
> > > > +/dts-v1/;
> > > > +/plugin/;
> > > > +
> > > > +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> > > > +
> > > > +&mtu3 {
> > > > +       pinctrl-0 = <&mtu3_pins>;
> > > > +       pinctrl-names = "default";
> > > > +
> > > > +       status = "okay";
> > > > +};
> > > > +
> > > > +&pinctrl {
> > > > +       mtu3_pins: mtu3 {
> > > > +               mtu3-zphase-clk {
> > > > +                       pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /*
> > > > +MTIOC1A
> > > */
> > > > +               };
> > >
> > > Unless I'm missing something, this signal is not available on the
> > > PMOD connector?
> >
> > Yes, it is not available on the PMOD connector. SD card detection
> > signal, is muxed with MTIOC1A (Z Phase signal). So for counter use
> > case, we use it as MTIOC1A pins.
> 
> As the signal is not available on the PMOD connector, can't you just ignore
> the Z Phase signal, and keep the SD card CD signal available instead?


Some customers are using Z phase signal in their product to clear the counter.
Maybe we define a macro in overlay, by default Z phase signal is disabled.

Is it ok?

Note:-
I use SD card removal/insert which changes the Z phase signal level for
clearing the counter.


Cheers,
Biju
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index f130165577a8..57727bcd1334 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -81,8 +81,10 @@  dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043-smarc-pmod.dtbo
 dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb
 dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb
 dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc-cru-csi-ov5645.dtbo
+dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-smarc-pmod.dtbo
 
 dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb
+dtb-$(CONFIG_ARCH_R9A07G054) += rzg2l-smarc-pmod.dtbo
 
 dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb
 
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
new file mode 100644
index 000000000000..a502faf6e1ad
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
@@ -0,0 +1,43 @@ 
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK PMOD parts
+ *
+ * Copyright (C) 2023 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+&mtu3 {
+	pinctrl-0 = <&mtu3_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+
+&pinctrl {
+	mtu3_pins: mtu3 {
+		mtu3-zphase-clk {
+			pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /* MTIOC1A */
+		};
+
+		mtu3-ext-clk-input-pin {
+			pinmux = <RZG2L_PORT_PINMUX(48, 0, 4)>, /* MTCLKA */
+				 <RZG2L_PORT_PINMUX(48, 1, 4)>; /* MTCLKB */
+		};
+	};
+};
+
+&scif2 {
+	status = "disabled";
+};
+
+&sdhi1_pins {
+	/delete-node/ sd1_mux;
+};
+
+&sdhi1_pins_uhs {
+	/delete-node/ sd1_mux_uhs;
+};