diff mbox series

soundwire: debugfs: Add missing SCP registers

Message ID 20230607020632.1030309-1-yung-chuan.liao@linux.intel.com
State New
Headers show
Series soundwire: debugfs: Add missing SCP registers | expand

Commit Message

Liao, Bard June 7, 2023, 2:06 a.m. UTC
From: Uday M Bhat <uday.m.bhat@intel.com>

SCP registers needs to be updated to accommodate additional
register entries as per the Soundwire 1.2 specification.

Signed-off-by: Uday M Bhat <uday.m.bhat@intel.com>
Signed-off-by: Yong Zhi <yong.zhi@intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
---
 drivers/soundwire/debugfs.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

Comments

Vinod Koul June 8, 2023, 11:40 a.m. UTC | #1
On 07-06-23, 10:06, Bard Liao wrote:
> From: Uday M Bhat <uday.m.bhat@intel.com>
> 
> SCP registers needs to be updated to accommodate additional
> register entries as per the Soundwire 1.2 specification.

Applied, thanks
diff mbox series

Patch

diff --git a/drivers/soundwire/debugfs.c b/drivers/soundwire/debugfs.c
index c3a1a359ee5c..d1553cb77187 100644
--- a/drivers/soundwire/debugfs.c
+++ b/drivers/soundwire/debugfs.c
@@ -86,10 +86,17 @@  static int sdw_slave_reg_show(struct seq_file *s_file, void *data)
 
 	/* SCP registers */
 	ret += scnprintf(buf + ret, RD_BUF - ret, "\nSCP\n");
-	for (i = SDW_SCP_INT1; i <= SDW_SCP_BANKDELAY; i++)
+	for (i = SDW_SCP_INT1; i <= SDW_SCP_BUS_CLOCK_BASE; i++)
 		ret += sdw_sprintf(slave, buf, ret, i);
 	for (i = SDW_SCP_DEVID_0; i <= SDW_SCP_DEVID_5; i++)
 		ret += sdw_sprintf(slave, buf, ret, i);
+	for (i = SDW_SCP_FRAMECTRL_B0; i <= SDW_SCP_BUSCLOCK_SCALE_B0; i++)
+		ret += sdw_sprintf(slave, buf, ret, i);
+	for (i = SDW_SCP_FRAMECTRL_B1; i <= SDW_SCP_BUSCLOCK_SCALE_B1; i++)
+		ret += sdw_sprintf(slave, buf, ret, i);
+	for (i = SDW_SCP_PHY_OUT_CTRL_0; i <= SDW_SCP_PHY_OUT_CTRL_7; i++)
+		ret += sdw_sprintf(slave, buf, ret, i);
+
 
 	/*
 	 * SCP Bank 0/1 registers are read-only and cannot be