Message ID | 20180925172043.20248-6-julien.grall@arm.com |
---|---|
State | Superseded |
Headers | show |
Series | xen/arm: SMCCC fixup and improvement | expand |
On Tue, 25 Sep 2018, Julien Grall wrote: > Signed-off-by: Julien Grall <julien.grall@arm.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> > --- > Changes in v2: > - Invert the condition > - Add missing includes > --- > xen/arch/arm/psci.c | 4 ++++ > xen/include/asm-arm/cpufeature.h | 3 ++- > xen/include/asm-arm/smccc.h | 11 +++++++++++ > 3 files changed, 17 insertions(+), 1 deletion(-) > > diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c > index 3cf5ecf0f3..941eec921b 100644 > --- a/xen/arch/arm/psci.c > +++ b/xen/arch/arm/psci.c > @@ -21,6 +21,7 @@ > #include <xen/types.h> > #include <xen/mm.h> > #include <xen/smp.h> > +#include <asm/cpufeature.h> > #include <asm/psci.h> > #include <asm/acpi.h> > > @@ -118,6 +119,9 @@ static void __init psci_init_smccc(void) > smccc_ver = ret; > } > > + if ( smccc_ver >= SMCCC_VERSION(1, 1) ) > + cpus_set_cap(ARM_SMCCC_1_1); > + > printk(XENLOG_INFO "Using SMC Calling Convention v%u.%u\n", > SMCCC_VERSION_MAJOR(smccc_ver), SMCCC_VERSION_MINOR(smccc_ver)); > } > diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h > index c6cbc2ec84..2d82264427 100644 > --- a/xen/include/asm-arm/cpufeature.h > +++ b/xen/include/asm-arm/cpufeature.h > @@ -44,8 +44,9 @@ > #define SKIP_CTXT_SWITCH_SERROR_SYNC 6 > #define ARM_HARDEN_BRANCH_PREDICTOR 7 > #define ARM_SSBD 8 > +#define ARM_SMCCC_1_1 9 > > -#define ARM_NCAPS 9 > +#define ARM_NCAPS 10 > > #ifndef __ASSEMBLY__ > > diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h > index 1ed6cbaa48..126399dd70 100644 > --- a/xen/include/asm-arm/smccc.h > +++ b/xen/include/asm-arm/smccc.h > @@ -16,6 +16,9 @@ > #ifndef __ASM_ARM_SMCCC_H__ > #define __ASM_ARM_SMCCC_H__ > > +#include <asm/alternative.h> > +#include <asm/cpufeature.h> > + > #define SMCCC_VERSION_MAJOR_SHIFT 16 > #define SMCCC_VERSION_MINOR_MASK \ > ((1U << SMCCC_VERSION_MAJOR_SHIFT) - 1) > @@ -213,6 +216,7 @@ struct arm_smccc_res { > */ > #ifdef CONFIG_ARM_32 > #define arm_smccc_1_0_smc(...) arm_smccc_1_1_smc(__VA_ARGS__) > +#define arm_smccc_smc(...) arm_smccc_1_1_smc(__VA_ARGS__) > #else > > void __arm_smccc_1_0_smc(register_t a0, register_t a1, register_t a2, > @@ -254,6 +258,13 @@ void __arm_smccc_1_0_smc(register_t a0, register_t a1, register_t a2, > #define arm_smccc_1_0_smc(...) \ > __arm_smccc_1_0_smc_count(__count_args(__VA_ARGS__), __VA_ARGS__) > > +#define arm_smccc_smc(...) \ > + do { \ > + if ( cpus_have_const_cap(ARM_SMCCC_1_1) ) \ > + arm_smccc_1_1_smc(__VA_ARGS__); \ > + else \ > + arm_smccc_1_0_smc(__VA_ARGS__); \ > + } while ( 0 ) > #endif /* CONFIG_ARM_64 */ > > #endif /* __ASSEMBLY__ */ > -- > 2.11.0 >
Hi Julien, On 25.09.18 20:20, Julien Grall wrote: > Signed-off-by: Julien Grall <julien.grall@arm.com> Reviewed-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> > > --- > Changes in v2: > - Invert the condition > - Add missing includes > --- > xen/arch/arm/psci.c | 4 ++++ > xen/include/asm-arm/cpufeature.h | 3 ++- > xen/include/asm-arm/smccc.h | 11 +++++++++++ > 3 files changed, 17 insertions(+), 1 deletion(-) > > diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c > index 3cf5ecf0f3..941eec921b 100644 > --- a/xen/arch/arm/psci.c > +++ b/xen/arch/arm/psci.c > @@ -21,6 +21,7 @@ > #include <xen/types.h> > #include <xen/mm.h> > #include <xen/smp.h> > +#include <asm/cpufeature.h> > #include <asm/psci.h> > #include <asm/acpi.h> > > @@ -118,6 +119,9 @@ static void __init psci_init_smccc(void) > smccc_ver = ret; > } > > + if ( smccc_ver >= SMCCC_VERSION(1, 1) ) > + cpus_set_cap(ARM_SMCCC_1_1); > + > printk(XENLOG_INFO "Using SMC Calling Convention v%u.%u\n", > SMCCC_VERSION_MAJOR(smccc_ver), SMCCC_VERSION_MINOR(smccc_ver)); > } > diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h > index c6cbc2ec84..2d82264427 100644 > --- a/xen/include/asm-arm/cpufeature.h > +++ b/xen/include/asm-arm/cpufeature.h > @@ -44,8 +44,9 @@ > #define SKIP_CTXT_SWITCH_SERROR_SYNC 6 > #define ARM_HARDEN_BRANCH_PREDICTOR 7 > #define ARM_SSBD 8 > +#define ARM_SMCCC_1_1 9 > > -#define ARM_NCAPS 9 > +#define ARM_NCAPS 10 > > #ifndef __ASSEMBLY__ > > diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h > index 1ed6cbaa48..126399dd70 100644 > --- a/xen/include/asm-arm/smccc.h > +++ b/xen/include/asm-arm/smccc.h > @@ -16,6 +16,9 @@ > #ifndef __ASM_ARM_SMCCC_H__ > #define __ASM_ARM_SMCCC_H__ > > +#include <asm/alternative.h> > +#include <asm/cpufeature.h> > + > #define SMCCC_VERSION_MAJOR_SHIFT 16 > #define SMCCC_VERSION_MINOR_MASK \ > ((1U << SMCCC_VERSION_MAJOR_SHIFT) - 1) > @@ -213,6 +216,7 @@ struct arm_smccc_res { > */ > #ifdef CONFIG_ARM_32 > #define arm_smccc_1_0_smc(...) arm_smccc_1_1_smc(__VA_ARGS__) > +#define arm_smccc_smc(...) arm_smccc_1_1_smc(__VA_ARGS__) > #else > > void __arm_smccc_1_0_smc(register_t a0, register_t a1, register_t a2, > @@ -254,6 +258,13 @@ void __arm_smccc_1_0_smc(register_t a0, register_t a1, register_t a2, > #define arm_smccc_1_0_smc(...) \ > __arm_smccc_1_0_smc_count(__count_args(__VA_ARGS__), __VA_ARGS__) > > +#define arm_smccc_smc(...) \ > + do { \ > + if ( cpus_have_const_cap(ARM_SMCCC_1_1) ) \ > + arm_smccc_1_1_smc(__VA_ARGS__); \ > + else \ > + arm_smccc_1_0_smc(__VA_ARGS__); \ > + } while ( 0 ) > #endif /* CONFIG_ARM_64 */ > > #endif /* __ASSEMBLY__ */ >
diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c index 3cf5ecf0f3..941eec921b 100644 --- a/xen/arch/arm/psci.c +++ b/xen/arch/arm/psci.c @@ -21,6 +21,7 @@ #include <xen/types.h> #include <xen/mm.h> #include <xen/smp.h> +#include <asm/cpufeature.h> #include <asm/psci.h> #include <asm/acpi.h> @@ -118,6 +119,9 @@ static void __init psci_init_smccc(void) smccc_ver = ret; } + if ( smccc_ver >= SMCCC_VERSION(1, 1) ) + cpus_set_cap(ARM_SMCCC_1_1); + printk(XENLOG_INFO "Using SMC Calling Convention v%u.%u\n", SMCCC_VERSION_MAJOR(smccc_ver), SMCCC_VERSION_MINOR(smccc_ver)); } diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h index c6cbc2ec84..2d82264427 100644 --- a/xen/include/asm-arm/cpufeature.h +++ b/xen/include/asm-arm/cpufeature.h @@ -44,8 +44,9 @@ #define SKIP_CTXT_SWITCH_SERROR_SYNC 6 #define ARM_HARDEN_BRANCH_PREDICTOR 7 #define ARM_SSBD 8 +#define ARM_SMCCC_1_1 9 -#define ARM_NCAPS 9 +#define ARM_NCAPS 10 #ifndef __ASSEMBLY__ diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h index 1ed6cbaa48..126399dd70 100644 --- a/xen/include/asm-arm/smccc.h +++ b/xen/include/asm-arm/smccc.h @@ -16,6 +16,9 @@ #ifndef __ASM_ARM_SMCCC_H__ #define __ASM_ARM_SMCCC_H__ +#include <asm/alternative.h> +#include <asm/cpufeature.h> + #define SMCCC_VERSION_MAJOR_SHIFT 16 #define SMCCC_VERSION_MINOR_MASK \ ((1U << SMCCC_VERSION_MAJOR_SHIFT) - 1) @@ -213,6 +216,7 @@ struct arm_smccc_res { */ #ifdef CONFIG_ARM_32 #define arm_smccc_1_0_smc(...) arm_smccc_1_1_smc(__VA_ARGS__) +#define arm_smccc_smc(...) arm_smccc_1_1_smc(__VA_ARGS__) #else void __arm_smccc_1_0_smc(register_t a0, register_t a1, register_t a2, @@ -254,6 +258,13 @@ void __arm_smccc_1_0_smc(register_t a0, register_t a1, register_t a2, #define arm_smccc_1_0_smc(...) \ __arm_smccc_1_0_smc_count(__count_args(__VA_ARGS__), __VA_ARGS__) +#define arm_smccc_smc(...) \ + do { \ + if ( cpus_have_const_cap(ARM_SMCCC_1_1) ) \ + arm_smccc_1_1_smc(__VA_ARGS__); \ + else \ + arm_smccc_1_0_smc(__VA_ARGS__); \ + } while ( 0 ) #endif /* CONFIG_ARM_64 */ #endif /* __ASSEMBLY__ */
Signed-off-by: Julien Grall <julien.grall@arm.com> --- Changes in v2: - Invert the condition - Add missing includes --- xen/arch/arm/psci.c | 4 ++++ xen/include/asm-arm/cpufeature.h | 3 ++- xen/include/asm-arm/smccc.h | 11 +++++++++++ 3 files changed, 17 insertions(+), 1 deletion(-)