| Message ID | 20181109173553.22341-3-peter.maydell@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Fix the last Hyp mode bug and turn it on for A7, A15 | expand |
On Fri, Nov 9, 2018 at 6:42 PM Peter Maydell <peter.maydell@linaro.org> wrote: > > The Cortex-A15 and Cortex-A7 both have EL2; now we've implemented still PL2 there :) > it properly we can enable the feature bit. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > target/arm/cpu.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/target/arm/cpu.c b/target/arm/cpu.c > index 784a4c2dfcc..b7185234d85 100644 > --- a/target/arm/cpu.c > +++ b/target/arm/cpu.c > @@ -1587,6 +1587,7 @@ static void cortex_a7_initfn(Object *obj) > set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); > set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); > set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); > + set_feature(&cpu->env, ARM_FEATURE_EL2); > set_feature(&cpu->env, ARM_FEATURE_EL3); > cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A7; > cpu->midr = 0x410fc075; > @@ -1633,6 +1634,7 @@ static void cortex_a15_initfn(Object *obj) > set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); > set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); > set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); > + set_feature(&cpu->env, ARM_FEATURE_EL2); > set_feature(&cpu->env, ARM_FEATURE_EL3); > cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A15; > cpu->midr = 0x412fc0f1; > -- > 2.19.1 > >
On Fri, Nov 09, 2018 at 05:35:53PM +0000, Peter Maydell wrote: > The Cortex-A15 and Cortex-A7 both have EL2; now we've implemented > it properly we can enable the feature bit. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > --- > target/arm/cpu.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/target/arm/cpu.c b/target/arm/cpu.c > index 784a4c2dfcc..b7185234d85 100644 > --- a/target/arm/cpu.c > +++ b/target/arm/cpu.c > @@ -1587,6 +1587,7 @@ static void cortex_a7_initfn(Object *obj) > set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); > set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); > set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); > + set_feature(&cpu->env, ARM_FEATURE_EL2); > set_feature(&cpu->env, ARM_FEATURE_EL3); > cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A7; > cpu->midr = 0x410fc075; > @@ -1633,6 +1634,7 @@ static void cortex_a15_initfn(Object *obj) > set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); > set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); > set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); > + set_feature(&cpu->env, ARM_FEATURE_EL2); > set_feature(&cpu->env, ARM_FEATURE_EL3); > cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A15; > cpu->midr = 0x412fc0f1; > -- > 2.19.1 >
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 784a4c2dfcc..b7185234d85 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1587,6 +1587,7 @@ static void cortex_a7_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); + set_feature(&cpu->env, ARM_FEATURE_EL2); set_feature(&cpu->env, ARM_FEATURE_EL3); cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A7; cpu->midr = 0x410fc075; @@ -1633,6 +1634,7 @@ static void cortex_a15_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); + set_feature(&cpu->env, ARM_FEATURE_EL2); set_feature(&cpu->env, ARM_FEATURE_EL3); cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A15; cpu->midr = 0x412fc0f1;
The Cortex-A15 and Cortex-A7 both have EL2; now we've implemented it properly we can enable the feature bit. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/cpu.c | 2 ++ 1 file changed, 2 insertions(+) -- 2.19.1