| Message ID | 20201016204019.2606-2-linux@fw-web.de |
|---|---|
| State | New |
| Headers | show |
| Series | add available pwm for bananapi-r64 | expand |
On 16/10/2020 22:40, Frank Wunderlich wrote: > From: Frank Wunderlich <frank-w@public-files.de> > > mt7622 only supports 6 pwm-channels so drop pwm7 > > third pwm (pwm2) is inverted and connected to fan-socket > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Patch 1 and 2 now pushed to v5.10-next/dts64 Thanks! > --- > .../boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts > index 1cc4dcb0008c..ad5b1592182d 100644 > --- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts > +++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts > @@ -414,10 +414,15 @@ mux { > }; > }; > > - pwm7_pins: pwm1-2-pins { > + pwm_pins: pwm-pins { > mux { > function = "pwm"; > - groups = "pwm_ch7_2"; > + groups = "pwm_ch1_0", /* mt7622_pwm_ch1_0_pins[] = { 51, }; */ > + "pwm_ch2_0", /* mt7622_pwm_ch2_0_pins[] = { 52, }; */ > + "pwm_ch3_2", /* mt7622_pwm_ch3_2_pins[] = { 97, }; */ > + "pwm_ch4_1", /* mt7622_pwm_ch4_1_pins[] = { 67, }; */ > + "pwm_ch5_0", /* mt7622_pwm_ch5_0_pins[] = { 68, }; */ > + "pwm_ch6_0"; /* mt7622_pwm_ch6_0_pins[] = { 69, }; */ > }; > }; > > @@ -537,7 +542,7 @@ mux { > > &pwm { > pinctrl-names = "default"; > - pinctrl-0 = <&pwm7_pins>; > + pinctrl-0 = <&pwm_pins>; > status = "okay"; > }; > >
diff --git a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts index 1cc4dcb0008c..ad5b1592182d 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts +++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts @@ -414,10 +414,15 @@ mux { }; }; - pwm7_pins: pwm1-2-pins { + pwm_pins: pwm-pins { mux { function = "pwm"; - groups = "pwm_ch7_2"; + groups = "pwm_ch1_0", /* mt7622_pwm_ch1_0_pins[] = { 51, }; */ + "pwm_ch2_0", /* mt7622_pwm_ch2_0_pins[] = { 52, }; */ + "pwm_ch3_2", /* mt7622_pwm_ch3_2_pins[] = { 97, }; */ + "pwm_ch4_1", /* mt7622_pwm_ch4_1_pins[] = { 67, }; */ + "pwm_ch5_0", /* mt7622_pwm_ch5_0_pins[] = { 68, }; */ + "pwm_ch6_0"; /* mt7622_pwm_ch6_0_pins[] = { 69, }; */ }; }; @@ -537,7 +542,7 @@ mux { &pwm { pinctrl-names = "default"; - pinctrl-0 = <&pwm7_pins>; + pinctrl-0 = <&pwm_pins>; status = "okay"; };